1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Qualcomm SDM845 interconnect IDs 4 * 5 * Copyright (c) 2018, Linaro Ltd. 6 * Author: Georgi Djakov <georgi.djakov@linaro.org> 7 */ 8 9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 10#define __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H 11 12#define MASTER_A1NOC_CFG 0 13#define MASTER_TSIF 1 14#define MASTER_SDCC_2 2 15#define MASTER_SDCC_4 3 16#define MASTER_UFS_CARD 4 17#define MASTER_UFS_MEM 5 18#define MASTER_PCIE_0 6 19#define SLAVE_A1NOC_SNOC 7 20#define SLAVE_SERVICE_A1NOC 8 21#define SLAVE_ANOC_PCIE_A1NOC_SNOC 9 22 23#define MASTER_A2NOC_CFG 0 24#define MASTER_QDSS_BAM 1 25#define MASTER_CNOC_A2NOC 2 26#define MASTER_CRYPTO 3 27#define MASTER_IPA 4 28#define MASTER_PCIE_1 5 29#define MASTER_QDSS_ETR 6 30#define MASTER_USB3_0 7 31#define MASTER_USB3_1 8 32#define SLAVE_A2NOC_SNOC 9 33#define SLAVE_ANOC_PCIE_SNOC 10 34#define SLAVE_SERVICE_A2NOC 11 35 36#define MASTER_SPDM 0 37#define MASTER_TIC 1 38#define MASTER_SNOC_CNOC 2 39#define MASTER_QDSS_DAP 3 40#define SLAVE_A1NOC_CFG 4 41#define SLAVE_A2NOC_CFG 5 42#define SLAVE_AOP 6 43#define SLAVE_AOSS 7 44#define SLAVE_CAMERA_CFG 8 45#define SLAVE_CLK_CTL 9 46#define SLAVE_CDSP_CFG 10 47#define SLAVE_RBCPR_CX_CFG 11 48#define SLAVE_CRYPTO_0_CFG 12 49#define SLAVE_DCC_CFG 13 50#define SLAVE_CNOC_DDRSS 14 51#define SLAVE_DISPLAY_CFG 15 52#define SLAVE_GLM 16 53#define SLAVE_GFX3D_CFG 17 54#define SLAVE_IMEM_CFG 18 55#define SLAVE_IPA_CFG 19 56#define SLAVE_CNOC_MNOC_CFG 20 57#define SLAVE_PCIE_0_CFG 21 58#define SLAVE_PCIE_1_CFG 22 59#define SLAVE_PDM 23 60#define SLAVE_SOUTH_PHY_CFG 24 61#define SLAVE_PIMEM_CFG 25 62#define SLAVE_PRNG 26 63#define SLAVE_QDSS_CFG 27 64#define SLAVE_BLSP_2 28 65#define SLAVE_BLSP_1 29 66#define SLAVE_SDCC_2 30 67#define SLAVE_SDCC_4 31 68#define SLAVE_SNOC_CFG 32 69#define SLAVE_SPDM_WRAPPER 33 70#define SLAVE_SPSS_CFG 34 71#define SLAVE_TCSR 35 72#define SLAVE_TLMM_NORTH 36 73#define SLAVE_TLMM_SOUTH 37 74#define SLAVE_TSIF 38 75#define SLAVE_UFS_CARD_CFG 39 76#define SLAVE_UFS_MEM_CFG 40 77#define SLAVE_USB3_0 41 78#define SLAVE_USB3_1 42 79#define SLAVE_VENUS_CFG 43 80#define SLAVE_VSENSE_CTRL_CFG 44 81#define SLAVE_CNOC_A2NOC 45 82#define SLAVE_SERVICE_CNOC 46 83 84#define MASTER_CNOC_DC_NOC 0 85#define SLAVE_LLCC_CFG 1 86#define SLAVE_MEM_NOC_CFG 2 87 88#define MASTER_APPSS_PROC 0 89#define MASTER_GNOC_CFG 1 90#define SLAVE_GNOC_SNOC 2 91#define SLAVE_GNOC_MEM_NOC 3 92#define SLAVE_SERVICE_GNOC 4 93 94#define MASTER_TCU_0 0 95#define MASTER_MEM_NOC_CFG 1 96#define MASTER_GNOC_MEM_NOC 2 97#define MASTER_MNOC_HF_MEM_NOC 3 98#define MASTER_MNOC_SF_MEM_NOC 4 99#define MASTER_SNOC_GC_MEM_NOC 5 100#define MASTER_SNOC_SF_MEM_NOC 6 101#define MASTER_GFX3D 7 102#define SLAVE_MSS_PROC_MS_MPU_CFG 8 103#define SLAVE_MEM_NOC_GNOC 9 104#define SLAVE_LLCC 10 105#define SLAVE_MEM_NOC_SNOC 11 106#define SLAVE_SERVICE_MEM_NOC 12 107#define MASTER_LLCC 13 108#define SLAVE_EBI1 14 109 110#define MASTER_CNOC_MNOC_CFG 0 111#define MASTER_CAMNOC_HF0 1 112#define MASTER_CAMNOC_HF1 2 113#define MASTER_CAMNOC_SF 3 114#define MASTER_MDP0 4 115#define MASTER_MDP1 5 116#define MASTER_ROTATOR 6 117#define MASTER_VIDEO_P0 7 118#define MASTER_VIDEO_P1 8 119#define MASTER_VIDEO_PROC 9 120#define SLAVE_MNOC_SF_MEM_NOC 10 121#define SLAVE_MNOC_HF_MEM_NOC 11 122#define SLAVE_SERVICE_MNOC 12 123#define MASTER_CAMNOC_HF0_UNCOMP 13 124#define MASTER_CAMNOC_HF1_UNCOMP 14 125#define MASTER_CAMNOC_SF_UNCOMP 15 126#define SLAVE_CAMNOC_UNCOMP 16 127 128#define MASTER_SNOC_CFG 0 129#define MASTER_A1NOC_SNOC 1 130#define MASTER_A2NOC_SNOC 2 131#define MASTER_GNOC_SNOC 3 132#define MASTER_MEM_NOC_SNOC 4 133#define MASTER_ANOC_PCIE_SNOC 5 134#define MASTER_PIMEM 6 135#define MASTER_GIC 7 136#define SLAVE_APPSS 8 137#define SLAVE_SNOC_CNOC 9 138#define SLAVE_SNOC_MEM_NOC_GC 10 139#define SLAVE_SNOC_MEM_NOC_SF 11 140#define SLAVE_IMEM 12 141#define SLAVE_PCIE_0 13 142#define SLAVE_PCIE_1 14 143#define SLAVE_PIMEM 15 144#define SLAVE_SERVICE_SNOC 16 145#define SLAVE_QDSS_STM 17 146#define SLAVE_TCU 18 147 148#endif 149