1/*-
2 * Copyright (c) 2011
3 *	Ben Gray <ben.r.gray@gmail.com>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30#ifndef TI_GPIO_H
31#define	TI_GPIO_H
32
33/* The maximum number of banks for any SoC */
34#define	MAX_GPIO_BANKS			6
35
36/*
37 * Maximum GPIOS possible, max of *_MAX_GPIO_BANKS * *_INTR_PER_BANK.
38 * These are defined in ti_gpio.c
39 */
40#define	MAX_GPIO_INTRS			8
41
42struct ti_gpio_irqsrc {
43	struct intr_irqsrc	tgi_isrc;
44	u_int			tgi_irq;
45	uint32_t		tgi_mask;
46	uint32_t		tgi_mode;
47};
48
49/**
50 *	Structure that stores the driver context.
51 *
52 *	This structure is allocated during driver attach.
53 */
54struct ti_gpio_softc {
55	device_t		sc_dev;
56	device_t		sc_busdev;
57	int			sc_bank;
58	int			sc_maxpin;
59	struct mtx		sc_mtx;
60
61	int			sc_mem_rid;
62	struct resource		*sc_mem_res;
63	int			sc_irq_rid;
64	struct resource		*sc_irq_res;
65	struct ti_gpio_irqsrc	*sc_isrcs;
66	/* The handle for the register IRQ handlers. */
67	void			*sc_irq_hdl;
68};
69
70#endif /* TI_GPIO_H */
71