1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 */
29
30#ifndef _MV_CP110_SYSCON_H_
31#define	_MV_CP110_SYSCON_H_
32
33enum mv_cp110_clk_id {
34	CP110_PLL_0 = 0,
35	CP110_PPV2_CORE,
36	CP110_X2CORE,
37	CP110_CORE,
38	CP110_NAND,
39	CP110_SDIO,
40	CP110_MAX_CLOCK
41};
42
43/* Gates */
44#define	CP110_CLOCK_GATING_OFFSET	0x220
45
46struct cp110_gate {
47	const char	*name;
48	uint32_t	shift;
49};
50
51#define	CCU_GATE(idx, clkname, s)		\
52	[idx] = {					\
53		.name = clkname,			\
54		.shift = s,				\
55	},
56
57#define	CP110_GATE_AUDIO		0
58#define	CP110_GATE_COMM_UNIT		1
59#define	CP110_GATE_NAND			2
60#define	CP110_GATE_PPV2			3
61#define	CP110_GATE_SDIO			4
62#define	CP110_GATE_MG			5
63#define	CP110_GATE_MG_CORE		6
64#define	CP110_GATE_XOR1			7
65#define	CP110_GATE_XOR0			8
66#define	CP110_GATE_GOP_DP		9
67#define	CP110_GATE_PCIE_X1_0		11
68#define	CP110_GATE_PCIE_X1_1		12
69#define	CP110_GATE_PCIE_X4		13
70#define	CP110_GATE_PCIE_XOR		14
71#define	CP110_GATE_SATA			15
72#define	CP110_GATE_SATA_USB		16
73#define	CP110_GATE_MAIN			17
74#define	CP110_GATE_SDMMC_GOP		18
75#define	CP110_GATE_SLOW_IO		21
76#define	CP110_GATE_USB3H0		22
77#define	CP110_GATE_USB3H1		23
78#define	CP110_GATE_USB3DEV		24
79#define	CP110_GATE_EIP150		25
80#define	CP110_GATE_EIP197		26
81
82#endif
83