1/*- 2 * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Vladimir Belian <fate10@gmail.com> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD$"); 30 31#include <sys/param.h> 32#include <sys/bus.h> 33#include <sys/time.h> 34#include <sys/rman.h> 35#include <sys/clock.h> 36#include <sys/systm.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/resource.h> 40 41#include <machine/bus.h> 42#include <machine/resource.h> 43 44#include <dev/ofw/ofw_bus.h> 45#include <dev/ofw/ofw_bus_subr.h> 46 47#include <dev/extres/clk/clk_fixed.h> 48 49#include <arm/allwinner/aw_machdep.h> 50 51#include "clock_if.h" 52 53#define LOSC_CTRL_REG 0x00 54#define A10_RTC_DATE_REG 0x04 55#define A10_RTC_TIME_REG 0x08 56#define A31_LOSC_AUTO_SWT_STA 0x04 57#define A31_RTC_DATE_REG 0x10 58#define A31_RTC_TIME_REG 0x14 59 60#define TIME_MASK 0x001f3f3f 61 62#define LOSC_OSC_SRC (1 << 0) 63#define LOSC_GSM (1 << 3) 64#define LOSC_AUTO_SW_EN (1 << 14) 65#define LOSC_MAGIC 0x16aa0000 66#define LOSC_BUSY_MASK 0x00000380 67 68#define IS_SUN7I (sc->conf->is_a20 == true) 69 70#define YEAR_MIN (IS_SUN7I ? 1970 : 2010) 71#define YEAR_MAX (IS_SUN7I ? 2100 : 2073) 72#define YEAR_OFFSET (IS_SUN7I ? 1900 : 2010) 73#define YEAR_MASK (IS_SUN7I ? 0xff : 0x3f) 74#define LEAP_BIT (IS_SUN7I ? 24 : 22) 75 76#define GET_SEC_VALUE(x) ((x) & 0x0000003f) 77#define GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8) 78#define GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16) 79#define GET_DAY_VALUE(x) ((x) & 0x0000001f) 80#define GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8) 81#define GET_YEAR_VALUE(x) (((x) >> 16) & YEAR_MASK) 82 83#define SET_DAY_VALUE(x) GET_DAY_VALUE(x) 84#define SET_MON_VALUE(x) (((x) & 0x0000000f) << 8) 85#define SET_YEAR_VALUE(x) (((x) & YEAR_MASK) << 16) 86#define SET_LEAP_VALUE(x) (((x) & 0x00000001) << LEAP_BIT) 87#define SET_SEC_VALUE(x) GET_SEC_VALUE(x) 88#define SET_MIN_VALUE(x) (((x) & 0x0000003f) << 8) 89#define SET_HOUR_VALUE(x) (((x) & 0x0000001f) << 16) 90 91#define HALF_OF_SEC_NS 500000000 92#define RTC_RES_US 1000000 93#define RTC_TIMEOUT 70 94 95#define RTC_READ(sc, reg) bus_read_4((sc)->res, (reg)) 96#define RTC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 97 98#define IS_LEAP_YEAR(y) (((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0)) 99 100struct aw_rtc_conf { 101 uint64_t iosc_freq; 102 bus_size_t rtc_date; 103 bus_size_t rtc_time; 104 bus_size_t rtc_losc_sta; 105 bool is_a20; 106}; 107 108struct aw_rtc_conf a10_conf = { 109 .rtc_date = A10_RTC_DATE_REG, 110 .rtc_time = A10_RTC_TIME_REG, 111 .rtc_losc_sta = LOSC_CTRL_REG, 112}; 113 114struct aw_rtc_conf a20_conf = { 115 .rtc_date = A10_RTC_DATE_REG, 116 .rtc_time = A10_RTC_TIME_REG, 117 .rtc_losc_sta = LOSC_CTRL_REG, 118 .is_a20 = true, 119}; 120 121struct aw_rtc_conf a31_conf = { 122 .iosc_freq = 650000, /* between 600 and 700 Khz */ 123 .rtc_date = A31_RTC_DATE_REG, 124 .rtc_time = A31_RTC_TIME_REG, 125 .rtc_losc_sta = A31_LOSC_AUTO_SWT_STA, 126}; 127 128struct aw_rtc_conf h3_conf = { 129 .iosc_freq = 16000000, 130 .rtc_date = A31_RTC_DATE_REG, 131 .rtc_time = A31_RTC_TIME_REG, 132 .rtc_losc_sta = A31_LOSC_AUTO_SWT_STA, 133}; 134 135static struct ofw_compat_data compat_data[] = { 136 { "allwinner,sun4i-a10-rtc", (uintptr_t) &a10_conf }, 137 { "allwinner,sun7i-a20-rtc", (uintptr_t) &a20_conf }, 138 { "allwinner,sun6i-a31-rtc", (uintptr_t) &a31_conf }, 139 { "allwinner,sun8i-h3-rtc", (uintptr_t) &h3_conf }, 140 { "allwinner,sun50i-h5-rtc", (uintptr_t) &h3_conf }, 141 { "allwinner,sun50i-h6-rtc", (uintptr_t) &h3_conf }, 142 { NULL, 0 } 143}; 144 145struct aw_rtc_softc { 146 struct resource *res; 147 struct aw_rtc_conf *conf; 148 int type; 149}; 150 151static struct clk_fixed_def aw_rtc_osc32k = { 152 .clkdef.id = 0, 153 .freq = 32768, 154}; 155 156static struct clk_fixed_def aw_rtc_iosc = { 157 .clkdef.id = 2, 158}; 159 160static void aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev); 161 162static int aw_rtc_probe(device_t dev); 163static int aw_rtc_attach(device_t dev); 164static int aw_rtc_detach(device_t dev); 165 166static int aw_rtc_gettime(device_t dev, struct timespec *ts); 167static int aw_rtc_settime(device_t dev, struct timespec *ts); 168 169static device_method_t aw_rtc_methods[] = { 170 DEVMETHOD(device_probe, aw_rtc_probe), 171 DEVMETHOD(device_attach, aw_rtc_attach), 172 DEVMETHOD(device_detach, aw_rtc_detach), 173 174 DEVMETHOD(clock_gettime, aw_rtc_gettime), 175 DEVMETHOD(clock_settime, aw_rtc_settime), 176 177 DEVMETHOD_END 178}; 179 180static driver_t aw_rtc_driver = { 181 "rtc", 182 aw_rtc_methods, 183 sizeof(struct aw_rtc_softc), 184}; 185 186static devclass_t aw_rtc_devclass; 187 188EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, aw_rtc_devclass, 0, 0, 189 BUS_PASS_RESOURCE + BUS_PASS_ORDER_FIRST); 190MODULE_VERSION(aw_rtc, 1); 191SIMPLEBUS_PNP_INFO(compat_data); 192 193static int 194aw_rtc_probe(device_t dev) 195{ 196 if (!ofw_bus_status_okay(dev)) 197 return (ENXIO); 198 199 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 200 return (ENXIO); 201 202 device_set_desc(dev, "Allwinner RTC"); 203 204 return (BUS_PROBE_DEFAULT); 205} 206 207static int 208aw_rtc_attach(device_t dev) 209{ 210 struct aw_rtc_softc *sc = device_get_softc(dev); 211 uint32_t val; 212 int rid = 0; 213 214 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 215 if (!sc->res) { 216 device_printf(dev, "could not allocate resources\n"); 217 return (ENXIO); 218 } 219 220 sc->conf = (struct aw_rtc_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 221 val = RTC_READ(sc, LOSC_CTRL_REG); 222 val |= LOSC_AUTO_SW_EN; 223 val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC; 224 RTC_WRITE(sc, LOSC_CTRL_REG, val); 225 226 DELAY(100); 227 228 if (bootverbose) { 229 val = RTC_READ(sc, sc->conf->rtc_losc_sta); 230 if ((val & LOSC_OSC_SRC) == 0) 231 device_printf(dev, "Using internal oscillator\n"); 232 else 233 device_printf(dev, "Using external oscillator\n"); 234 } 235 236 aw_rtc_install_clocks(sc, dev); 237 238 clock_register(dev, RTC_RES_US); 239 240 return (0); 241} 242 243static int 244aw_rtc_detach(device_t dev) 245{ 246 /* can't support detach, since there's no clock_unregister function */ 247 return (EBUSY); 248} 249 250static void 251aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev) { 252 struct clkdom *clkdom; 253 const char **clknames; 254 phandle_t node; 255 int nclocks; 256 257 node = ofw_bus_get_node(dev); 258 nclocks = ofw_bus_string_list_to_array(node, "clock-output-names", &clknames); 259 /* No clocks to export */ 260 if (nclocks <= 0) 261 return; 262 263 if (nclocks != 3) { 264 device_printf(dev, "Having only %d clocks instead of 3, aborting\n", nclocks); 265 return; 266 } 267 268 clkdom = clkdom_create(dev); 269 270 aw_rtc_osc32k.clkdef.name = clknames[0]; 271 if (clknode_fixed_register(clkdom, &aw_rtc_osc32k) != 0) 272 device_printf(dev, "Cannot register osc32k clock\n"); 273 274 aw_rtc_iosc.clkdef.name = clknames[2]; 275 aw_rtc_iosc.freq = sc->conf->iosc_freq; 276 if (clknode_fixed_register(clkdom, &aw_rtc_iosc) != 0) 277 device_printf(dev, "Cannot register iosc clock\n"); 278 279 clkdom_finit(clkdom); 280 281 if (bootverbose) 282 clkdom_dump(clkdom); 283} 284 285static int 286aw_rtc_gettime(device_t dev, struct timespec *ts) 287{ 288 struct aw_rtc_softc *sc = device_get_softc(dev); 289 struct clocktime ct; 290 uint32_t rdate, rtime; 291 292 rdate = RTC_READ(sc, sc->conf->rtc_date); 293 rtime = RTC_READ(sc, sc->conf->rtc_time); 294 295 if ((rtime & TIME_MASK) == 0) 296 rdate = RTC_READ(sc, sc->conf->rtc_date); 297 298 ct.sec = GET_SEC_VALUE(rtime); 299 ct.min = GET_MIN_VALUE(rtime); 300 ct.hour = GET_HOUR_VALUE(rtime); 301 ct.day = GET_DAY_VALUE(rdate); 302 ct.mon = GET_MON_VALUE(rdate); 303 ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET; 304 ct.dow = -1; 305 /* RTC resolution is 1 sec */ 306 ct.nsec = 0; 307 308 return (clock_ct_to_ts(&ct, ts)); 309} 310 311static int 312aw_rtc_settime(device_t dev, struct timespec *ts) 313{ 314 struct aw_rtc_softc *sc = device_get_softc(dev); 315 struct clocktime ct; 316 uint32_t clk, rdate, rtime; 317 318 /* RTC resolution is 1 sec */ 319 if (ts->tv_nsec >= HALF_OF_SEC_NS) 320 ts->tv_sec++; 321 ts->tv_nsec = 0; 322 323 clock_ts_to_ct(ts, &ct); 324 325 if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) { 326 device_printf(dev, "could not set time, year out of range\n"); 327 return (EINVAL); 328 } 329 330 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 331 if (clk > RTC_TIMEOUT) { 332 device_printf(dev, "could not set time, RTC busy\n"); 333 return (EINVAL); 334 } 335 DELAY(1); 336 } 337 /* reset time register to avoid unexpected date increment */ 338 RTC_WRITE(sc, sc->conf->rtc_time, 0); 339 340 rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) | 341 SET_YEAR_VALUE(ct.year - YEAR_OFFSET) | 342 SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year)); 343 344 rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) | 345 SET_HOUR_VALUE(ct.hour); 346 347 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 348 if (clk > RTC_TIMEOUT) { 349 device_printf(dev, "could not set date, RTC busy\n"); 350 return (EINVAL); 351 } 352 DELAY(1); 353 } 354 RTC_WRITE(sc, sc->conf->rtc_date, rdate); 355 356 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 357 if (clk > RTC_TIMEOUT) { 358 device_printf(dev, "could not set time, RTC busy\n"); 359 return (EINVAL); 360 } 361 DELAY(1); 362 } 363 RTC_WRITE(sc, sc->conf->rtc_time, rtime); 364 365 DELAY(RTC_TIMEOUT); 366 367 return (0); 368} 369