1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 * Copyright (c) 1994 John S. Dyson
7 * All rights reserved.
8 * Copyright (c) 2003 Peter Wemm
9 * All rights reserved.
10 *
11 * This code is derived from software contributed to Berkeley by
12 * William Jolitz.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 *    must display the following acknowledgement:
24 *	This product includes software developed by the University of
25 *	California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 *    may be used to endorse or promote products derived from this software
28 *    without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 *
42 *	from: @(#)vmparam.h	5.9 (Berkeley) 5/12/91
43 * $FreeBSD$
44 */
45
46#ifndef _MACHINE_VMPARAM_H_
47#define	_MACHINE_VMPARAM_H_ 1
48
49/*
50 * Machine dependent constants for AMD64.
51 */
52
53/*
54 * Virtual memory related constants, all in bytes
55 */
56#define	MAXTSIZ		(32768UL*1024*1024)	/* max text size */
57#ifndef DFLDSIZ
58#define	DFLDSIZ		(32768UL*1024*1024)	/* initial data size limit */
59#endif
60#ifndef MAXDSIZ
61#define	MAXDSIZ		(32768UL*1024*1024)	/* max data size */
62#endif
63#ifndef	DFLSSIZ
64#define	DFLSSIZ		(8UL*1024*1024)		/* initial stack size limit */
65#endif
66#ifndef	MAXSSIZ
67#define	MAXSSIZ		(512UL*1024*1024)	/* max stack size */
68#endif
69#ifndef SGROWSIZ
70#define	SGROWSIZ	(128UL*1024)		/* amount to grow stack */
71#endif
72
73/*
74 * We provide a machine specific single page allocator through the use
75 * of the direct mapped segment.  This uses 2MB pages for reduced
76 * TLB pressure.
77 */
78#define	UMA_MD_SMALL_ALLOC
79
80/*
81 * The physical address space is densely populated.
82 */
83#define	VM_PHYSSEG_DENSE
84
85/*
86 * The number of PHYSSEG entries must be one greater than the number
87 * of phys_avail entries because the phys_avail entry that spans the
88 * largest physical address that is accessible by ISA DMA is split
89 * into two PHYSSEG entries.
90 */
91#define	VM_PHYSSEG_MAX		63
92
93/*
94 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
95 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
96 * the pool from which physical pages for page tables and small UMA
97 * objects are allocated.
98 */
99#define	VM_NFREEPOOL		2
100#define	VM_FREEPOOL_DEFAULT	0
101#define	VM_FREEPOOL_DIRECT	1
102
103/*
104 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
105 * that have physical addresses below 4G but are not accessible by ISA DMA,
106 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
107 * DMA.
108 */
109#define	VM_NFREELIST		3
110#define	VM_FREELIST_DEFAULT	0
111#define	VM_FREELIST_DMA32	1
112#define	VM_FREELIST_LOWMEM	2
113
114#define VM_LOWMEM_BOUNDARY	(16 << 20)	/* 16MB ISA DMA limit */
115
116/*
117 * Create the DMA32 free list only if the number of physical pages above
118 * physical address 4G is at least 16M, which amounts to 64GB of physical
119 * memory.
120 */
121#define	VM_DMA32_NPAGES_THRESHOLD	16777216
122
123/*
124 * An allocation size of 16MB is supported in order to optimize the
125 * use of the direct map by UMA.  Specifically, a cache line contains
126 * at most 8 PDEs, collectively mapping 16MB of physical memory.  By
127 * reducing the number of distinct 16MB "pages" that are used by UMA,
128 * the physical memory allocator reduces the likelihood of both 2MB
129 * page TLB misses and cache misses caused by 2MB page TLB misses.
130 */
131#define	VM_NFREEORDER		13
132
133/*
134 * Enable superpage reservations: 1 level.
135 */
136#ifndef	VM_NRESERVLEVEL
137#define	VM_NRESERVLEVEL		1
138#endif
139
140/*
141 * Level 0 reservations consist of 512 pages.
142 */
143#ifndef	VM_LEVEL_0_ORDER
144#define	VM_LEVEL_0_ORDER	9
145#endif
146
147#ifdef	SMP
148#define	PA_LOCK_COUNT	256
149#endif
150
151/*
152 * Kernel physical load address. Needs to be aligned at 2MB superpage
153 * boundary.
154 */
155#ifndef KERNLOAD
156#define	KERNLOAD	0x200000
157#endif
158
159/*
160 * Virtual addresses of things.  Derived from the page directory and
161 * page table indexes from pmap.h for precision.
162 *
163 * 0x0000000000000000 - 0x00007fffffffffff   user map
164 * 0x0000800000000000 - 0xffff7fffffffffff   does not exist (hole)
165 * 0xffff800000000000 - 0xffff804020100fff   recursive page table (512GB slot)
166 * 0xffff804020100fff - 0xffff807fffffffff   unused
167 * 0xffff808000000000 - 0xffff847fffffffff   large map (can be tuned up)
168 * 0xffff848000000000 - 0xfffff7ffffffffff   unused (large map extends there)
169 * 0xfffff80000000000 - 0xfffffbffffffffff   4TB direct map
170 * 0xfffffc0000000000 - 0xfffffdffffffffff   unused
171 * 0xfffffe0000000000 - 0xffffffffffffffff   2TB kernel map
172 *
173 * Within the kernel map:
174 *
175 * 0xfffffe0000000000                        vm_page_array
176 * 0xffffffff80000000                        KERNBASE
177 */
178
179#define	VM_MIN_KERNEL_ADDRESS	KV4ADDR(KPML4BASE, 0, 0, 0)
180#define	VM_MAX_KERNEL_ADDRESS	KV4ADDR(KPML4BASE + NKPML4E - 1, \
181					NPDPEPG-1, NPDEPG-1, NPTEPG-1)
182
183#define	DMAP_MIN_ADDRESS	KV4ADDR(DMPML4I, 0, 0, 0)
184#define	DMAP_MAX_ADDRESS	KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0)
185
186#define	LARGEMAP_MIN_ADDRESS	KV4ADDR(LMSPML4I, 0, 0, 0)
187#define	LARGEMAP_MAX_ADDRESS	KV4ADDR(LMEPML4I + 1, 0, 0, 0)
188
189#define	KERNBASE		KV4ADDR(KPML4I, KPDPI, 0, 0)
190
191#define	UPT_MAX_ADDRESS		KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)
192#define	UPT_MIN_ADDRESS		KV4ADDR(PML4PML4I, 0, 0, 0)
193
194#define	VM_MAXUSER_ADDRESS_LA57	UVADDR(NUPML5E, 0, 0, 0, 0)
195#define	VM_MAXUSER_ADDRESS_LA48	UVADDR(0, NUP4ML4E, 0, 0, 0)
196#define	VM_MAXUSER_ADDRESS	VM_MAXUSER_ADDRESS_LA57
197
198#define	SHAREDPAGE_LA57		(VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE)
199#define	SHAREDPAGE_LA48		(VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE)
200#define	USRSTACK_LA57		SHAREDPAGE_LA57
201#define	USRSTACK_LA48		SHAREDPAGE_LA48
202#define	USRSTACK		USRSTACK_LA48
203#define	PS_STRINGS_LA57		(USRSTACK_LA57 - sizeof(struct ps_strings))
204#define	PS_STRINGS_LA48		(USRSTACK_LA48 - sizeof(struct ps_strings))
205
206#define	VM_MAX_ADDRESS		UPT_MAX_ADDRESS
207#define	VM_MIN_ADDRESS		(0)
208
209/*
210 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's
211 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works
212 * because the result is not actually accessed until later, but the early
213 * vt fb startup needs to be reworked.
214 */
215#define	PMAP_HAS_DMAP	1
216#define	PHYS_TO_DMAP(x)	({						\
217	KASSERT(dmaplimit == 0 || (x) < dmaplimit,			\
218	    ("physical address %#jx not covered by the DMAP",		\
219	    (uintmax_t)x));						\
220	(x) | DMAP_MIN_ADDRESS; })
221
222#define	DMAP_TO_PHYS(x)	({						\
223	KASSERT((x) < (DMAP_MIN_ADDRESS + dmaplimit) &&			\
224	    (x) >= DMAP_MIN_ADDRESS,					\
225	    ("virtual address %#jx not covered by the DMAP",		\
226	    (uintmax_t)x));						\
227	(x) & ~DMAP_MIN_ADDRESS; })
228
229/*
230 * amd64 maps the page array into KVA so that it can be more easily
231 * allocated on the correct memory domains.
232 */
233#define	PMAP_HAS_PAGE_ARRAY	1
234
235/*
236 * How many physical pages per kmem arena virtual page.
237 */
238#ifndef VM_KMEM_SIZE_SCALE
239#define	VM_KMEM_SIZE_SCALE	(1)
240#endif
241
242/*
243 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
244 * kernel map.
245 */
246#ifndef VM_KMEM_SIZE_MAX
247#define	VM_KMEM_SIZE_MAX	((VM_MAX_KERNEL_ADDRESS - \
248    VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5)
249#endif
250
251/* initial pagein size of beginning of executable file */
252#ifndef VM_INITIAL_PAGEIN
253#define	VM_INITIAL_PAGEIN	16
254#endif
255
256#define	ZERO_REGION_SIZE	(2 * 1024 * 1024)	/* 2MB */
257
258/*
259 * Use a fairly large batch size since we expect amd64 systems to have lots of
260 * memory.
261 */
262#define	VM_BATCHQUEUE_SIZE	31
263
264/*
265 * The pmap can create non-transparent large page mappings.
266 */
267#define	PMAP_HAS_LARGEPAGES	1
268
269/*
270 * Need a page dump array for minidump.
271 */
272#define MINIDUMP_PAGE_TRACKING	1
273
274#endif /* _MACHINE_VMPARAM_H_ */
275