1//===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This tablegen backend emits information about intrinsic functions.
10//
11//===----------------------------------------------------------------------===//
12
13#include "CodeGenIntrinsics.h"
14#include "CodeGenTarget.h"
15#include "SequenceToOffsetTable.h"
16#include "TableGenBackends.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/Support/CommandLine.h"
19#include "llvm/TableGen/Error.h"
20#include "llvm/TableGen/Record.h"
21#include "llvm/TableGen/StringMatcher.h"
22#include "llvm/TableGen/StringToOffsetTable.h"
23#include "llvm/TableGen/TableGenBackend.h"
24#include <algorithm>
25using namespace llvm;
26
27cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums");
28cl::opt<std::string>
29    IntrinsicPrefix("intrinsic-prefix",
30                    cl::desc("Generate intrinsics with this target prefix"),
31                    cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat));
32
33namespace {
34class IntrinsicEmitter {
35  RecordKeeper &Records;
36
37public:
38  IntrinsicEmitter(RecordKeeper &R) : Records(R) {}
39
40  void run(raw_ostream &OS, bool Enums);
41
42  void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
43  void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
44  void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints,
45                                raw_ostream &OS);
46  void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints,
47                                    raw_ostream &OS);
48  void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
49  void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
50  void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsGCC,
51                                 raw_ostream &OS);
52};
53} // End anonymous namespace
54
55//===----------------------------------------------------------------------===//
56// IntrinsicEmitter Implementation
57//===----------------------------------------------------------------------===//
58
59void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) {
60  emitSourceFileHeader("Intrinsic Function Source Fragment", OS);
61
62  CodeGenIntrinsicTable Ints(Records);
63
64  if (Enums) {
65    // Emit the enum information.
66    EmitEnumInfo(Ints, OS);
67  } else {
68    // Emit the target metadata.
69    EmitTargetInfo(Ints, OS);
70
71    // Emit the intrinsic ID -> name table.
72    EmitIntrinsicToNameTable(Ints, OS);
73
74    // Emit the intrinsic ID -> overload table.
75    EmitIntrinsicToOverloadTable(Ints, OS);
76
77    // Emit the intrinsic declaration generator.
78    EmitGenerator(Ints, OS);
79
80    // Emit the intrinsic parameter attributes.
81    EmitAttributes(Ints, OS);
82
83    // Emit code to translate GCC builtins into LLVM intrinsics.
84    EmitIntrinsicToBuiltinMap(Ints, true, OS);
85
86    // Emit code to translate MS builtins into LLVM intrinsics.
87    EmitIntrinsicToBuiltinMap(Ints, false, OS);
88  }
89}
90
91void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints,
92                                    raw_ostream &OS) {
93  // Find the TargetSet for which to generate enums. There will be an initial
94  // set with an empty target prefix which will include target independent
95  // intrinsics like dbg.value.
96  const CodeGenIntrinsicTable::TargetSet *Set = nullptr;
97  for (const auto &Target : Ints.Targets) {
98    if (Target.Name == IntrinsicPrefix) {
99      Set = &Target;
100      break;
101    }
102  }
103  if (!Set) {
104    std::vector<std::string> KnownTargets;
105    for (const auto &Target : Ints.Targets)
106      if (!Target.Name.empty())
107        KnownTargets.push_back(Target.Name);
108    PrintFatalError("tried to generate intrinsics for unknown target " +
109                    IntrinsicPrefix +
110                    "\nKnown targets are: " + join(KnownTargets, ", ") + "\n");
111  }
112
113  // Generate a complete header for target specific intrinsics.
114  if (!IntrinsicPrefix.empty()) {
115    std::string UpperPrefix = StringRef(IntrinsicPrefix).upper();
116    OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n";
117    OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n";
118    OS << "namespace llvm {\n";
119    OS << "namespace Intrinsic {\n";
120    OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n";
121  }
122
123  OS << "// Enum values for intrinsics\n";
124  for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) {
125    OS << "    " << Ints[i].EnumName;
126
127    // Assign a value to the first intrinsic in this target set so that all
128    // intrinsic ids are distinct.
129    if (i == Set->Offset)
130      OS << " = " << (Set->Offset + 1);
131
132    OS << ", ";
133    if (Ints[i].EnumName.size() < 40)
134      OS.indent(40 - Ints[i].EnumName.size());
135    OS << " // " << Ints[i].Name << "\n";
136  }
137
138  // Emit num_intrinsics into the target neutral enum.
139  if (IntrinsicPrefix.empty()) {
140    OS << "    num_intrinsics = " << (Ints.size() + 1) << "\n";
141  } else {
142    OS << "}; // enum\n";
143    OS << "} // namespace Intrinsic\n";
144    OS << "} // namespace llvm\n\n";
145    OS << "#endif\n";
146  }
147}
148
149void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints,
150                                    raw_ostream &OS) {
151  OS << "// Target mapping\n";
152  OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n";
153  OS << "struct IntrinsicTargetInfo {\n"
154     << "  llvm::StringLiteral Name;\n"
155     << "  size_t Offset;\n"
156     << "  size_t Count;\n"
157     << "};\n";
158  OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n";
159  for (auto Target : Ints.Targets)
160    OS << "  {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset
161       << ", " << Target.Count << "},\n";
162  OS << "};\n";
163  OS << "#endif\n\n";
164}
165
166void IntrinsicEmitter::EmitIntrinsicToNameTable(
167    const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
168  OS << "// Intrinsic ID to name table\n";
169  OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n";
170  OS << "  // Note that entry #0 is the invalid intrinsic!\n";
171  for (unsigned i = 0, e = Ints.size(); i != e; ++i)
172    OS << "  \"" << Ints[i].Name << "\",\n";
173  OS << "#endif\n\n";
174}
175
176void IntrinsicEmitter::EmitIntrinsicToOverloadTable(
177    const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
178  OS << "// Intrinsic ID to overload bitset\n";
179  OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n";
180  OS << "static const uint8_t OTable[] = {\n";
181  OS << "  0";
182  for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
183    // Add one to the index so we emit a null bit for the invalid #0 intrinsic.
184    if ((i+1)%8 == 0)
185      OS << ",\n  0";
186    if (Ints[i].isOverloaded)
187      OS << " | (1<<" << (i+1)%8 << ')';
188  }
189  OS << "\n};\n\n";
190  // OTable contains a true bit at the position if the intrinsic is overloaded.
191  OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n";
192  OS << "#endif\n\n";
193}
194
195
196// NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp!
197enum IIT_Info {
198  // Common values should be encoded with 0-15.
199  IIT_Done = 0,
200  IIT_I1   = 1,
201  IIT_I8   = 2,
202  IIT_I16  = 3,
203  IIT_I32  = 4,
204  IIT_I64  = 5,
205  IIT_F16  = 6,
206  IIT_F32  = 7,
207  IIT_F64  = 8,
208  IIT_V2   = 9,
209  IIT_V4   = 10,
210  IIT_V8   = 11,
211  IIT_V16  = 12,
212  IIT_V32  = 13,
213  IIT_PTR  = 14,
214  IIT_ARG  = 15,
215
216  // Values from 16+ are only encodable with the inefficient encoding.
217  IIT_V64  = 16,
218  IIT_MMX  = 17,
219  IIT_TOKEN = 18,
220  IIT_METADATA = 19,
221  IIT_EMPTYSTRUCT = 20,
222  IIT_STRUCT2 = 21,
223  IIT_STRUCT3 = 22,
224  IIT_STRUCT4 = 23,
225  IIT_STRUCT5 = 24,
226  IIT_EXTEND_ARG = 25,
227  IIT_TRUNC_ARG = 26,
228  IIT_ANYPTR = 27,
229  IIT_V1   = 28,
230  IIT_VARARG = 29,
231  IIT_HALF_VEC_ARG = 30,
232  IIT_SAME_VEC_WIDTH_ARG = 31,
233  IIT_PTR_TO_ARG = 32,
234  IIT_PTR_TO_ELT = 33,
235  IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
236  IIT_I128 = 35,
237  IIT_V512 = 36,
238  IIT_V1024 = 37,
239  IIT_STRUCT6 = 38,
240  IIT_STRUCT7 = 39,
241  IIT_STRUCT8 = 40,
242  IIT_F128 = 41,
243  IIT_VEC_ELEMENT = 42,
244  IIT_SCALABLE_VEC = 43,
245  IIT_SUBDIVIDE2_ARG = 44,
246  IIT_SUBDIVIDE4_ARG = 45,
247  IIT_VEC_OF_BITCASTS_TO_INT = 46,
248  IIT_V128 = 47,
249  IIT_BF16 = 48
250};
251
252static void EncodeFixedValueType(MVT::SimpleValueType VT,
253                                 std::vector<unsigned char> &Sig) {
254  if (MVT(VT).isInteger()) {
255    unsigned BitWidth = MVT(VT).getSizeInBits();
256    switch (BitWidth) {
257    default: PrintFatalError("unhandled integer type width in intrinsic!");
258    case 1: return Sig.push_back(IIT_I1);
259    case 8: return Sig.push_back(IIT_I8);
260    case 16: return Sig.push_back(IIT_I16);
261    case 32: return Sig.push_back(IIT_I32);
262    case 64: return Sig.push_back(IIT_I64);
263    case 128: return Sig.push_back(IIT_I128);
264    }
265  }
266
267  switch (VT) {
268  default: PrintFatalError("unhandled MVT in intrinsic!");
269  case MVT::f16: return Sig.push_back(IIT_F16);
270  case MVT::bf16: return Sig.push_back(IIT_BF16);
271  case MVT::f32: return Sig.push_back(IIT_F32);
272  case MVT::f64: return Sig.push_back(IIT_F64);
273  case MVT::f128: return Sig.push_back(IIT_F128);
274  case MVT::token: return Sig.push_back(IIT_TOKEN);
275  case MVT::Metadata: return Sig.push_back(IIT_METADATA);
276  case MVT::x86mmx: return Sig.push_back(IIT_MMX);
277  // MVT::OtherVT is used to mean the empty struct type here.
278  case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
279  // MVT::isVoid is used to represent varargs here.
280  case MVT::isVoid: return Sig.push_back(IIT_VARARG);
281  }
282}
283
284#if defined(_MSC_VER) && !defined(__clang__)
285#pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function.
286#endif
287
288static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes,
289                            unsigned &NextArgCode,
290                            std::vector<unsigned char> &Sig,
291                            ArrayRef<unsigned char> Mapping) {
292
293  if (R->isSubClassOf("LLVMMatchType")) {
294    unsigned Number = Mapping[R->getValueAsInt("Number")];
295    assert(Number < ArgCodes.size() && "Invalid matching number!");
296    if (R->isSubClassOf("LLVMExtendedType"))
297      Sig.push_back(IIT_EXTEND_ARG);
298    else if (R->isSubClassOf("LLVMTruncatedType"))
299      Sig.push_back(IIT_TRUNC_ARG);
300    else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
301      Sig.push_back(IIT_HALF_VEC_ARG);
302    else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) {
303      Sig.push_back(IIT_SAME_VEC_WIDTH_ARG);
304      Sig.push_back((Number << 3) | ArgCodes[Number]);
305      MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy"));
306      EncodeFixedValueType(VT, Sig);
307      return;
308    }
309    else if (R->isSubClassOf("LLVMPointerTo"))
310      Sig.push_back(IIT_PTR_TO_ARG);
311    else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
312      Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT);
313      // Encode overloaded ArgNo
314      Sig.push_back(NextArgCode++);
315      // Encode LLVMMatchType<Number> ArgNo
316      Sig.push_back(Number);
317      return;
318    } else if (R->isSubClassOf("LLVMPointerToElt"))
319      Sig.push_back(IIT_PTR_TO_ELT);
320    else if (R->isSubClassOf("LLVMVectorElementType"))
321      Sig.push_back(IIT_VEC_ELEMENT);
322    else if (R->isSubClassOf("LLVMSubdivide2VectorType"))
323      Sig.push_back(IIT_SUBDIVIDE2_ARG);
324    else if (R->isSubClassOf("LLVMSubdivide4VectorType"))
325      Sig.push_back(IIT_SUBDIVIDE4_ARG);
326    else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt"))
327      Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT);
328    else
329      Sig.push_back(IIT_ARG);
330    return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/);
331  }
332
333  MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT"));
334
335  unsigned Tmp = 0;
336  switch (VT) {
337  default: break;
338  case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH;
339  case MVT::vAny: ++Tmp;    LLVM_FALLTHROUGH;
340  case MVT::fAny: ++Tmp;    LLVM_FALLTHROUGH;
341  case MVT::iAny: ++Tmp;    LLVM_FALLTHROUGH;
342  case MVT::Any: {
343    // If this is an "any" valuetype, then the type is the type of the next
344    // type in the list specified to getIntrinsic().
345    Sig.push_back(IIT_ARG);
346
347    // Figure out what arg # this is consuming, and remember what kind it was.
348    assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp &&
349           "Invalid or no ArgCode associated with overloaded VT!");
350    unsigned ArgNo = NextArgCode++;
351
352    // Encode what sort of argument it must be in the low 3 bits of the ArgNo.
353    return Sig.push_back((ArgNo << 3) | Tmp);
354  }
355
356  case MVT::iPTR: {
357    unsigned AddrSpace = 0;
358    if (R->isSubClassOf("LLVMQualPointerType")) {
359      AddrSpace = R->getValueAsInt("AddrSpace");
360      assert(AddrSpace < 256 && "Address space exceeds 255");
361    }
362    if (AddrSpace) {
363      Sig.push_back(IIT_ANYPTR);
364      Sig.push_back(AddrSpace);
365    } else {
366      Sig.push_back(IIT_PTR);
367    }
368    return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig,
369                           Mapping);
370  }
371  }
372
373  if (MVT(VT).isVector()) {
374    MVT VVT = VT;
375    if (VVT.isScalableVector())
376      Sig.push_back(IIT_SCALABLE_VEC);
377    switch (VVT.getVectorNumElements()) {
378    default: PrintFatalError("unhandled vector type width in intrinsic!");
379    case 1: Sig.push_back(IIT_V1); break;
380    case 2: Sig.push_back(IIT_V2); break;
381    case 4: Sig.push_back(IIT_V4); break;
382    case 8: Sig.push_back(IIT_V8); break;
383    case 16: Sig.push_back(IIT_V16); break;
384    case 32: Sig.push_back(IIT_V32); break;
385    case 64: Sig.push_back(IIT_V64); break;
386    case 128: Sig.push_back(IIT_V128); break;
387    case 512: Sig.push_back(IIT_V512); break;
388    case 1024: Sig.push_back(IIT_V1024); break;
389    }
390
391    return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig);
392  }
393
394  EncodeFixedValueType(VT, Sig);
395}
396
397static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes,
398                           unsigned int &NumInserted,
399                           SmallVectorImpl<unsigned char> &Mapping) {
400  if (R->isSubClassOf("LLVMMatchType")) {
401    if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
402      ArgCodes.push_back(3 /*vAny*/);
403      ++NumInserted;
404    }
405    return;
406  }
407
408  unsigned Tmp = 0;
409  switch (getValueType(R->getValueAsDef("VT"))) {
410  default: break;
411  case MVT::iPTR:
412    UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping);
413    break;
414  case MVT::iPTRAny:
415    ++Tmp;
416    LLVM_FALLTHROUGH;
417  case MVT::vAny:
418    ++Tmp;
419    LLVM_FALLTHROUGH;
420  case MVT::fAny:
421    ++Tmp;
422    LLVM_FALLTHROUGH;
423  case MVT::iAny:
424    ++Tmp;
425    LLVM_FALLTHROUGH;
426  case MVT::Any:
427    unsigned OriginalIdx = ArgCodes.size() - NumInserted;
428    assert(OriginalIdx >= Mapping.size());
429    Mapping.resize(OriginalIdx+1);
430    Mapping[OriginalIdx] = ArgCodes.size();
431    ArgCodes.push_back(Tmp);
432    break;
433  }
434}
435
436#if defined(_MSC_VER) && !defined(__clang__)
437#pragma optimize("",on)
438#endif
439
440/// ComputeFixedEncoding - If we can encode the type signature for this
441/// intrinsic into 32 bits, return it.  If not, return ~0U.
442static void ComputeFixedEncoding(const CodeGenIntrinsic &Int,
443                                 std::vector<unsigned char> &TypeSig) {
444  std::vector<unsigned char> ArgCodes;
445
446  // Add codes for any overloaded result VTs.
447  unsigned int NumInserted = 0;
448  SmallVector<unsigned char, 8> ArgMapping;
449  for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
450    UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
451
452  // Add codes for any overloaded operand VTs.
453  for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
454    UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
455
456  unsigned NextArgCode = 0;
457  if (Int.IS.RetVTs.empty())
458    TypeSig.push_back(IIT_Done);
459  else if (Int.IS.RetVTs.size() == 1 &&
460           Int.IS.RetVTs[0] == MVT::isVoid)
461    TypeSig.push_back(IIT_Done);
462  else {
463    switch (Int.IS.RetVTs.size()) {
464      case 1: break;
465      case 2: TypeSig.push_back(IIT_STRUCT2); break;
466      case 3: TypeSig.push_back(IIT_STRUCT3); break;
467      case 4: TypeSig.push_back(IIT_STRUCT4); break;
468      case 5: TypeSig.push_back(IIT_STRUCT5); break;
469      case 6: TypeSig.push_back(IIT_STRUCT6); break;
470      case 7: TypeSig.push_back(IIT_STRUCT7); break;
471      case 8: TypeSig.push_back(IIT_STRUCT8); break;
472      default: llvm_unreachable("Unhandled case in struct");
473    }
474
475    for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
476      EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
477                      ArgMapping);
478  }
479
480  for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
481    EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
482                    ArgMapping);
483}
484
485static void printIITEntry(raw_ostream &OS, unsigned char X) {
486  OS << (unsigned)X;
487}
488
489void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints,
490                                     raw_ostream &OS) {
491  // If we can compute a 32-bit fixed encoding for this intrinsic, do so and
492  // capture it in this vector, otherwise store a ~0U.
493  std::vector<unsigned> FixedEncodings;
494
495  SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable;
496
497  std::vector<unsigned char> TypeSig;
498
499  // Compute the unique argument type info.
500  for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
501    // Get the signature for the intrinsic.
502    TypeSig.clear();
503    ComputeFixedEncoding(Ints[i], TypeSig);
504
505    // Check to see if we can encode it into a 32-bit word.  We can only encode
506    // 8 nibbles into a 32-bit word.
507    if (TypeSig.size() <= 8) {
508      bool Failed = false;
509      unsigned Result = 0;
510      for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) {
511        // If we had an unencodable argument, bail out.
512        if (TypeSig[i] > 15) {
513          Failed = true;
514          break;
515        }
516        Result = (Result << 4) | TypeSig[e-i-1];
517      }
518
519      // If this could be encoded into a 31-bit word, return it.
520      if (!Failed && (Result >> 31) == 0) {
521        FixedEncodings.push_back(Result);
522        continue;
523      }
524    }
525
526    // Otherwise, we're going to unique the sequence into the
527    // LongEncodingTable, and use its offset in the 32-bit table instead.
528    LongEncodingTable.add(TypeSig);
529
530    // This is a placehold that we'll replace after the table is laid out.
531    FixedEncodings.push_back(~0U);
532  }
533
534  LongEncodingTable.layout();
535
536  OS << "// Global intrinsic function declaration type table.\n";
537  OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n";
538
539  OS << "static const unsigned IIT_Table[] = {\n  ";
540
541  for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) {
542    if ((i & 7) == 7)
543      OS << "\n  ";
544
545    // If the entry fit in the table, just emit it.
546    if (FixedEncodings[i] != ~0U) {
547      OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", ";
548      continue;
549    }
550
551    TypeSig.clear();
552    ComputeFixedEncoding(Ints[i], TypeSig);
553
554
555    // Otherwise, emit the offset into the long encoding table.  We emit it this
556    // way so that it is easier to read the offset in the .def file.
557    OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", ";
558  }
559
560  OS << "0\n};\n\n";
561
562  // Emit the shared table of register lists.
563  OS << "static const unsigned char IIT_LongEncodingTable[] = {\n";
564  if (!LongEncodingTable.empty())
565    LongEncodingTable.emit(OS, printIITEntry);
566  OS << "  255\n};\n\n";
567
568  OS << "#endif\n\n";  // End of GET_INTRINSIC_GENERATOR_GLOBAL
569}
570
571namespace {
572struct AttributeComparator {
573  bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const {
574    // Sort throwing intrinsics after non-throwing intrinsics.
575    if (L->canThrow != R->canThrow)
576      return R->canThrow;
577
578    if (L->isNoDuplicate != R->isNoDuplicate)
579      return R->isNoDuplicate;
580
581    if (L->isNoReturn != R->isNoReturn)
582      return R->isNoReturn;
583
584    if (L->isNoSync != R->isNoSync)
585      return R->isNoSync;
586
587    if (L->isNoFree != R->isNoFree)
588      return R->isNoFree;
589
590    if (L->isWillReturn != R->isWillReturn)
591      return R->isWillReturn;
592
593    if (L->isCold != R->isCold)
594      return R->isCold;
595
596    if (L->isConvergent != R->isConvergent)
597      return R->isConvergent;
598
599    if (L->isSpeculatable != R->isSpeculatable)
600      return R->isSpeculatable;
601
602    if (L->hasSideEffects != R->hasSideEffects)
603      return R->hasSideEffects;
604
605    // Try to order by readonly/readnone attribute.
606    CodeGenIntrinsic::ModRefBehavior LK = L->ModRef;
607    CodeGenIntrinsic::ModRefBehavior RK = R->ModRef;
608    if (LK != RK) return (LK > RK);
609    // Order by argument attributes.
610    // This is reliable because each side is already sorted internally.
611    return (L->ArgumentAttributes < R->ArgumentAttributes);
612  }
613};
614} // End anonymous namespace
615
616/// EmitAttributes - This emits the Intrinsic::getAttributes method.
617void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints,
618                                      raw_ostream &OS) {
619  OS << "// Add parameter attributes that are not common to all intrinsics.\n";
620  OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n";
621  OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n";
622
623  // Compute the maximum number of attribute arguments and the map
624  typedef std::map<const CodeGenIntrinsic*, unsigned,
625                   AttributeComparator> UniqAttrMapTy;
626  UniqAttrMapTy UniqAttributes;
627  unsigned maxArgAttrs = 0;
628  unsigned AttrNum = 0;
629  for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
630    const CodeGenIntrinsic &intrinsic = Ints[i];
631    maxArgAttrs =
632      std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size()));
633    unsigned &N = UniqAttributes[&intrinsic];
634    if (N) continue;
635    assert(AttrNum < 256 && "Too many unique attributes for table!");
636    N = ++AttrNum;
637  }
638
639  // Emit an array of AttributeList.  Most intrinsics will have at least one
640  // entry, for the function itself (index ~1), which is usually nounwind.
641  OS << "  static const uint8_t IntrinsicsToAttributesMap[] = {\n";
642
643  for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
644    const CodeGenIntrinsic &intrinsic = Ints[i];
645
646    OS << "    " << UniqAttributes[&intrinsic] << ", // "
647       << intrinsic.Name << "\n";
648  }
649  OS << "  };\n\n";
650
651  OS << "  AttributeList AS[" << maxArgAttrs + 1 << "];\n";
652  OS << "  unsigned NumAttrs = 0;\n";
653  OS << "  if (id != 0) {\n";
654  OS << "    switch(IntrinsicsToAttributesMap[id - 1]) {\n";
655  OS << "    default: llvm_unreachable(\"Invalid attribute number\");\n";
656  for (UniqAttrMapTy::const_iterator I = UniqAttributes.begin(),
657       E = UniqAttributes.end(); I != E; ++I) {
658    OS << "    case " << I->second << ": {\n";
659
660    const CodeGenIntrinsic &intrinsic = *(I->first);
661
662    // Keep track of the number of attributes we're writing out.
663    unsigned numAttrs = 0;
664
665    // The argument attributes are alreadys sorted by argument index.
666    unsigned ai = 0, ae = intrinsic.ArgumentAttributes.size();
667    if (ae) {
668      while (ai != ae) {
669        unsigned attrIdx = intrinsic.ArgumentAttributes[ai].Index;
670
671        OS << "      const Attribute::AttrKind AttrParam" << attrIdx << "[]= {";
672        bool addComma = false;
673
674        bool AllValuesAreZero = true;
675        SmallVector<uint64_t, 8> Values;
676        do {
677          switch (intrinsic.ArgumentAttributes[ai].Kind) {
678          case CodeGenIntrinsic::NoCapture:
679            if (addComma)
680              OS << ",";
681            OS << "Attribute::NoCapture";
682            addComma = true;
683            break;
684          case CodeGenIntrinsic::NoAlias:
685            if (addComma)
686              OS << ",";
687            OS << "Attribute::NoAlias";
688            addComma = true;
689            break;
690          case CodeGenIntrinsic::Returned:
691            if (addComma)
692              OS << ",";
693            OS << "Attribute::Returned";
694            addComma = true;
695            break;
696          case CodeGenIntrinsic::ReadOnly:
697            if (addComma)
698              OS << ",";
699            OS << "Attribute::ReadOnly";
700            addComma = true;
701            break;
702          case CodeGenIntrinsic::WriteOnly:
703            if (addComma)
704              OS << ",";
705            OS << "Attribute::WriteOnly";
706            addComma = true;
707            break;
708          case CodeGenIntrinsic::ReadNone:
709            if (addComma)
710              OS << ",";
711            OS << "Attribute::ReadNone";
712            addComma = true;
713            break;
714          case CodeGenIntrinsic::ImmArg:
715            if (addComma)
716              OS << ',';
717            OS << "Attribute::ImmArg";
718            addComma = true;
719            break;
720          case CodeGenIntrinsic::Alignment:
721            if (addComma)
722              OS << ',';
723            OS << "Attribute::Alignment";
724            addComma = true;
725            break;
726          }
727          uint64_t V = intrinsic.ArgumentAttributes[ai].Value;
728          Values.push_back(V);
729          AllValuesAreZero &= (V == 0);
730
731          ++ai;
732        } while (ai != ae && intrinsic.ArgumentAttributes[ai].Index == attrIdx);
733        OS << "};\n";
734
735        // Generate attribute value array if not all attribute values are zero.
736        if (!AllValuesAreZero) {
737          OS << "      const uint64_t AttrValParam" << attrIdx << "[]= {";
738          addComma = false;
739          for (const auto V : Values) {
740            if (addComma)
741              OS << ',';
742            OS << V;
743            addComma = true;
744          }
745          OS << "};\n";
746        }
747
748        OS << "      AS[" << numAttrs++ << "] = AttributeList::get(C, "
749           << attrIdx << ", AttrParam" << attrIdx;
750        if (!AllValuesAreZero)
751          OS << ", AttrValParam" << attrIdx;
752        OS << ");\n";
753      }
754    }
755
756    if (!intrinsic.canThrow ||
757        (intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem &&
758         !intrinsic.hasSideEffects) ||
759        intrinsic.isNoReturn || intrinsic.isNoSync || intrinsic.isNoFree ||
760        intrinsic.isWillReturn || intrinsic.isCold || intrinsic.isNoDuplicate ||
761        intrinsic.isConvergent || intrinsic.isSpeculatable) {
762      OS << "      const Attribute::AttrKind Atts[] = {";
763      bool addComma = false;
764      if (!intrinsic.canThrow) {
765        OS << "Attribute::NoUnwind";
766        addComma = true;
767      }
768      if (intrinsic.isNoReturn) {
769        if (addComma)
770          OS << ",";
771        OS << "Attribute::NoReturn";
772        addComma = true;
773      }
774      if (intrinsic.isNoSync) {
775        if (addComma)
776          OS << ",";
777        OS << "Attribute::NoSync";
778        addComma = true;
779      }
780      if (intrinsic.isNoFree) {
781        if (addComma)
782          OS << ",";
783        OS << "Attribute::NoFree";
784        addComma = true;
785      }
786      if (intrinsic.isWillReturn) {
787        if (addComma)
788          OS << ",";
789        OS << "Attribute::WillReturn";
790        addComma = true;
791      }
792      if (intrinsic.isCold) {
793        if (addComma)
794          OS << ",";
795        OS << "Attribute::Cold";
796        addComma = true;
797      }
798      if (intrinsic.isNoDuplicate) {
799        if (addComma)
800          OS << ",";
801        OS << "Attribute::NoDuplicate";
802        addComma = true;
803      }
804      if (intrinsic.isConvergent) {
805        if (addComma)
806          OS << ",";
807        OS << "Attribute::Convergent";
808        addComma = true;
809      }
810      if (intrinsic.isSpeculatable) {
811        if (addComma)
812          OS << ",";
813        OS << "Attribute::Speculatable";
814        addComma = true;
815      }
816
817      switch (intrinsic.ModRef) {
818      case CodeGenIntrinsic::NoMem:
819        if (intrinsic.hasSideEffects)
820          break;
821        if (addComma)
822          OS << ",";
823        OS << "Attribute::ReadNone";
824        break;
825      case CodeGenIntrinsic::ReadArgMem:
826        if (addComma)
827          OS << ",";
828        OS << "Attribute::ReadOnly,";
829        OS << "Attribute::ArgMemOnly";
830        break;
831      case CodeGenIntrinsic::ReadMem:
832        if (addComma)
833          OS << ",";
834        OS << "Attribute::ReadOnly";
835        break;
836      case CodeGenIntrinsic::ReadInaccessibleMem:
837        if (addComma)
838          OS << ",";
839        OS << "Attribute::ReadOnly,";
840        OS << "Attribute::InaccessibleMemOnly";
841        break;
842      case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem:
843        if (addComma)
844          OS << ",";
845        OS << "Attribute::ReadOnly,";
846        OS << "Attribute::InaccessibleMemOrArgMemOnly";
847        break;
848      case CodeGenIntrinsic::WriteArgMem:
849        if (addComma)
850          OS << ",";
851        OS << "Attribute::WriteOnly,";
852        OS << "Attribute::ArgMemOnly";
853        break;
854      case CodeGenIntrinsic::WriteMem:
855        if (addComma)
856          OS << ",";
857        OS << "Attribute::WriteOnly";
858        break;
859      case CodeGenIntrinsic::WriteInaccessibleMem:
860        if (addComma)
861          OS << ",";
862        OS << "Attribute::WriteOnly,";
863        OS << "Attribute::InaccessibleMemOnly";
864        break;
865      case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem:
866        if (addComma)
867          OS << ",";
868        OS << "Attribute::WriteOnly,";
869        OS << "Attribute::InaccessibleMemOrArgMemOnly";
870        break;
871      case CodeGenIntrinsic::ReadWriteArgMem:
872        if (addComma)
873          OS << ",";
874        OS << "Attribute::ArgMemOnly";
875        break;
876      case CodeGenIntrinsic::ReadWriteInaccessibleMem:
877        if (addComma)
878          OS << ",";
879        OS << "Attribute::InaccessibleMemOnly";
880        break;
881      case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem:
882        if (addComma)
883          OS << ",";
884        OS << "Attribute::InaccessibleMemOrArgMemOnly";
885        break;
886      case CodeGenIntrinsic::ReadWriteMem:
887        break;
888      }
889      OS << "};\n";
890      OS << "      AS[" << numAttrs++ << "] = AttributeList::get(C, "
891         << "AttributeList::FunctionIndex, Atts);\n";
892    }
893
894    if (numAttrs) {
895      OS << "      NumAttrs = " << numAttrs << ";\n";
896      OS << "      break;\n";
897      OS << "      }\n";
898    } else {
899      OS << "      return AttributeList();\n";
900      OS << "      }\n";
901    }
902  }
903
904  OS << "    }\n";
905  OS << "  }\n";
906  OS << "  return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n";
907  OS << "}\n";
908  OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n";
909}
910
911void IntrinsicEmitter::EmitIntrinsicToBuiltinMap(
912    const CodeGenIntrinsicTable &Ints, bool IsGCC, raw_ostream &OS) {
913  StringRef CompilerName = (IsGCC ? "GCC" : "MS");
914  typedef std::map<std::string, std::map<std::string, std::string>> BIMTy;
915  BIMTy BuiltinMap;
916  StringToOffsetTable Table;
917  for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
918    const std::string &BuiltinName =
919        IsGCC ? Ints[i].GCCBuiltinName : Ints[i].MSBuiltinName;
920    if (!BuiltinName.empty()) {
921      // Get the map for this target prefix.
922      std::map<std::string, std::string> &BIM =
923          BuiltinMap[Ints[i].TargetPrefix];
924
925      if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second)
926        PrintFatalError(Ints[i].TheDef->getLoc(),
927                        "Intrinsic '" + Ints[i].TheDef->getName() +
928                            "': duplicate " + CompilerName + " builtin name!");
929      Table.GetOrAddStringOffset(BuiltinName);
930    }
931  }
932
933  OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n";
934  OS << "// This is used by the C front-end.  The builtin name is passed\n";
935  OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n";
936  OS << "// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.\n";
937  OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << CompilerName << "_BUILTIN\n";
938
939  OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName
940     << "Builtin(const char "
941     << "*TargetPrefixStr, StringRef BuiltinNameStr) {\n";
942
943  if (Table.Empty()) {
944    OS << "  return Intrinsic::not_intrinsic;\n";
945    OS << "}\n";
946    OS << "#endif\n\n";
947    return;
948  }
949
950  OS << "  static const char BuiltinNames[] = {\n";
951  Table.EmitCharArray(OS);
952  OS << "  };\n\n";
953
954  OS << "  struct BuiltinEntry {\n";
955  OS << "    Intrinsic::ID IntrinID;\n";
956  OS << "    unsigned StrTabOffset;\n";
957  OS << "    const char *getName() const {\n";
958  OS << "      return &BuiltinNames[StrTabOffset];\n";
959  OS << "    }\n";
960  OS << "    bool operator<(StringRef RHS) const {\n";
961  OS << "      return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n";
962  OS << "    }\n";
963  OS << "  };\n";
964
965  OS << "  StringRef TargetPrefix(TargetPrefixStr);\n\n";
966
967  // Note: this could emit significantly better code if we cared.
968  for (BIMTy::iterator I = BuiltinMap.begin(), E = BuiltinMap.end();I != E;++I){
969    OS << "  ";
970    if (!I->first.empty())
971      OS << "if (TargetPrefix == \"" << I->first << "\") ";
972    else
973      OS << "/* Target Independent Builtins */ ";
974    OS << "{\n";
975
976    // Emit the comparisons for this target prefix.
977    OS << "    static const BuiltinEntry " << I->first << "Names[] = {\n";
978    for (const auto &P : I->second) {
979      OS << "      {Intrinsic::" << P.second << ", "
980         << Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n";
981    }
982    OS << "    };\n";
983    OS << "    auto I = std::lower_bound(std::begin(" << I->first << "Names),\n";
984    OS << "                              std::end(" << I->first << "Names),\n";
985    OS << "                              BuiltinNameStr);\n";
986    OS << "    if (I != std::end(" << I->first << "Names) &&\n";
987    OS << "        I->getName() == BuiltinNameStr)\n";
988    OS << "      return I->IntrinID;\n";
989    OS << "  }\n";
990  }
991  OS << "  return ";
992  OS << "Intrinsic::not_intrinsic;\n";
993  OS << "}\n";
994  OS << "#endif\n\n";
995}
996
997void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) {
998  IntrinsicEmitter(RK).run(OS, /*Enums=*/true);
999}
1000
1001void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) {
1002  IntrinsicEmitter(RK).run(OS, /*Enums=*/false);
1003}
1004