1//===-- RISCVTargetStreamer.cpp - RISCV Target Streamer Methods -----------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file provides RISCV specific target streamer methods. 10// 11//===----------------------------------------------------------------------===// 12 13#include "RISCVTargetStreamer.h" 14#include "RISCVSubtarget.h" 15#include "llvm/Support/FormattedStream.h" 16#include "llvm/Support/RISCVAttributes.h" 17 18using namespace llvm; 19 20RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {} 21 22void RISCVTargetStreamer::finish() { finishAttributeSection(); } 23 24void RISCVTargetStreamer::emitDirectiveOptionPush() {} 25void RISCVTargetStreamer::emitDirectiveOptionPop() {} 26void RISCVTargetStreamer::emitDirectiveOptionPIC() {} 27void RISCVTargetStreamer::emitDirectiveOptionNoPIC() {} 28void RISCVTargetStreamer::emitDirectiveOptionRVC() {} 29void RISCVTargetStreamer::emitDirectiveOptionNoRVC() {} 30void RISCVTargetStreamer::emitDirectiveOptionRelax() {} 31void RISCVTargetStreamer::emitDirectiveOptionNoRelax() {} 32void RISCVTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {} 33void RISCVTargetStreamer::finishAttributeSection() {} 34void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute, 35 StringRef String) {} 36void RISCVTargetStreamer::emitIntTextAttribute(unsigned Attribute, 37 unsigned IntValue, 38 StringRef StringValue) {} 39 40void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) { 41 if (STI.hasFeature(RISCV::FeatureRV32E)) 42 emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_4); 43 else 44 emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_16); 45 46 std::string Arch = "rv32"; 47 if (STI.hasFeature(RISCV::Feature64Bit)) 48 Arch = "rv64"; 49 if (STI.hasFeature(RISCV::FeatureRV32E)) 50 Arch += "e1p9"; 51 else 52 Arch += "i2p0"; 53 if (STI.hasFeature(RISCV::FeatureStdExtM)) 54 Arch += "_m2p0"; 55 if (STI.hasFeature(RISCV::FeatureStdExtA)) 56 Arch += "_a2p0"; 57 if (STI.hasFeature(RISCV::FeatureStdExtF)) 58 Arch += "_f2p0"; 59 if (STI.hasFeature(RISCV::FeatureStdExtD)) 60 Arch += "_d2p0"; 61 if (STI.hasFeature(RISCV::FeatureStdExtC)) 62 Arch += "_c2p0"; 63 64 emitTextAttribute(RISCVAttrs::ARCH, Arch); 65} 66 67// This part is for ascii assembly output 68RISCVTargetAsmStreamer::RISCVTargetAsmStreamer(MCStreamer &S, 69 formatted_raw_ostream &OS) 70 : RISCVTargetStreamer(S), OS(OS) {} 71 72void RISCVTargetAsmStreamer::emitDirectiveOptionPush() { 73 OS << "\t.option\tpush\n"; 74} 75 76void RISCVTargetAsmStreamer::emitDirectiveOptionPop() { 77 OS << "\t.option\tpop\n"; 78} 79 80void RISCVTargetAsmStreamer::emitDirectiveOptionPIC() { 81 OS << "\t.option\tpic\n"; 82} 83 84void RISCVTargetAsmStreamer::emitDirectiveOptionNoPIC() { 85 OS << "\t.option\tnopic\n"; 86} 87 88void RISCVTargetAsmStreamer::emitDirectiveOptionRVC() { 89 OS << "\t.option\trvc\n"; 90} 91 92void RISCVTargetAsmStreamer::emitDirectiveOptionNoRVC() { 93 OS << "\t.option\tnorvc\n"; 94} 95 96void RISCVTargetAsmStreamer::emitDirectiveOptionRelax() { 97 OS << "\t.option\trelax\n"; 98} 99 100void RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax() { 101 OS << "\t.option\tnorelax\n"; 102} 103 104void RISCVTargetAsmStreamer::emitAttribute(unsigned Attribute, unsigned Value) { 105 OS << "\t.attribute\t" << Attribute << ", " << Twine(Value) << "\n"; 106} 107 108void RISCVTargetAsmStreamer::emitTextAttribute(unsigned Attribute, 109 StringRef String) { 110 OS << "\t.attribute\t" << Attribute << ", \"" << String << "\"\n"; 111} 112 113void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute, 114 unsigned IntValue, 115 StringRef StringValue) {} 116 117void RISCVTargetAsmStreamer::finishAttributeSection() {} 118