1//===- NVPTXInstrInfo.h - NVPTX Instruction Information----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the NVPTX implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXINSTRINFO_H
14#define LLVM_LIB_TARGET_NVPTX_NVPTXINSTRINFO_H
15
16#include "NVPTX.h"
17#include "NVPTXRegisterInfo.h"
18#include "llvm/CodeGen/TargetInstrInfo.h"
19
20#define GET_INSTRINFO_HEADER
21#include "NVPTXGenInstrInfo.inc"
22
23namespace llvm {
24
25class NVPTXInstrInfo : public NVPTXGenInstrInfo {
26  const NVPTXRegisterInfo RegInfo;
27  virtual void anchor();
28public:
29  explicit NVPTXInstrInfo();
30
31  const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; }
32
33  /* The following virtual functions are used in register allocation.
34   * They are not implemented because the existing interface and the logic
35   * at the caller side do not work for the elementized vector load and store.
36   *
37   * virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
38   *                                  int &FrameIndex) const;
39   * virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
40   *                                 int &FrameIndex) const;
41   * virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
42   *                              MachineBasicBlock::iterator MBBI,
43   *                             unsigned SrcReg, bool isKill, int FrameIndex,
44   *                              const TargetRegisterClass *RC) const;
45   * virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
46   *                               MachineBasicBlock::iterator MBBI,
47   *                               unsigned DestReg, int FrameIndex,
48   *                               const TargetRegisterClass *RC) const;
49   */
50
51  void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
52                   const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
53                   bool KillSrc) const override;
54
55  // Branch analysis.
56  bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
57                     MachineBasicBlock *&FBB,
58                     SmallVectorImpl<MachineOperand> &Cond,
59                     bool AllowModify) const override;
60  unsigned removeBranch(MachineBasicBlock &MBB,
61                        int *BytesRemoved = nullptr) const override;
62  unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
63                        MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
64                        const DebugLoc &DL,
65                        int *BytesAdded = nullptr) const override;
66};
67
68} // namespace llvm
69
70#endif
71