1//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an AArch64 MCInst to a .s file.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
14#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
15
16#include "MCTargetDesc/AArch64MCTargetDesc.h"
17#include "llvm/ADT/StringRef.h"
18#include "llvm/MC/MCInstPrinter.h"
19#include "../Utils/AArch64BaseInfo.h"
20
21namespace llvm {
22
23class AArch64InstPrinter : public MCInstPrinter {
24public:
25  AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26                     const MCRegisterInfo &MRI);
27
28  void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29                 const MCSubtargetInfo &STI, raw_ostream &O) override;
30  void printRegName(raw_ostream &OS, unsigned RegNo) const override;
31
32  // Autogenerated by tblgen.
33  virtual void printInstruction(const MCInst *MI, uint64_t Address,
34                                const MCSubtargetInfo &STI, raw_ostream &O);
35  virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
36                               const MCSubtargetInfo &STI, raw_ostream &O);
37  virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
38                                       unsigned OpIdx, unsigned PrintMethodIdx,
39                                       const MCSubtargetInfo &STI,
40                                       raw_ostream &O);
41
42  virtual StringRef getRegName(unsigned RegNo) const {
43    return getRegisterName(RegNo);
44  }
45
46  static const char *getRegisterName(unsigned RegNo,
47                                     unsigned AltIdx = AArch64::NoRegAltName);
48
49protected:
50  bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
51                     raw_ostream &O);
52  // Operand printers
53  void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54                    raw_ostream &O);
55  void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
56                raw_ostream &O);
57  void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
58                   raw_ostream &O);
59  template <int Size>
60  void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
61                 raw_ostream &O);
62  template <typename T> void printImmSVE(T Value, raw_ostream &O);
63  void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
64                           raw_ostream &O);
65  template <int Amount>
66  void printPostIncOperand(const MCInst *MI, unsigned OpNo,
67                           const MCSubtargetInfo &STI, raw_ostream &O) {
68    printPostIncOperand(MI, OpNo, Amount, O);
69  }
70
71  void printVRegOperand(const MCInst *MI, unsigned OpNo,
72                        const MCSubtargetInfo &STI, raw_ostream &O);
73  void printSysCROperand(const MCInst *MI, unsigned OpNo,
74                         const MCSubtargetInfo &STI, raw_ostream &O);
75  void printAddSubImm(const MCInst *MI, unsigned OpNum,
76                      const MCSubtargetInfo &STI, raw_ostream &O);
77  template <typename T>
78  void printLogicalImm(const MCInst *MI, unsigned OpNum,
79                       const MCSubtargetInfo &STI, raw_ostream &O);
80  void printShifter(const MCInst *MI, unsigned OpNum,
81                    const MCSubtargetInfo &STI, raw_ostream &O);
82  void printShiftedRegister(const MCInst *MI, unsigned OpNum,
83                            const MCSubtargetInfo &STI, raw_ostream &O);
84  void printExtendedRegister(const MCInst *MI, unsigned OpNum,
85                             const MCSubtargetInfo &STI, raw_ostream &O);
86  void printArithExtend(const MCInst *MI, unsigned OpNum,
87                        const MCSubtargetInfo &STI, raw_ostream &O);
88
89  void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
90                      char SrcRegKind, unsigned Width);
91  template <char SrcRegKind, unsigned Width>
92  void printMemExtend(const MCInst *MI, unsigned OpNum,
93                      const MCSubtargetInfo &STI, raw_ostream &O) {
94    printMemExtend(MI, OpNum, O, SrcRegKind, Width);
95  }
96  template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
97  void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
98                               const MCSubtargetInfo &STI, raw_ostream &O);
99  void printCondCode(const MCInst *MI, unsigned OpNum,
100                     const MCSubtargetInfo &STI, raw_ostream &O);
101  void printInverseCondCode(const MCInst *MI, unsigned OpNum,
102                            const MCSubtargetInfo &STI, raw_ostream &O);
103  void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
104                         const MCSubtargetInfo &STI, raw_ostream &O);
105  void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
106                         raw_ostream &O);
107  void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
108                        raw_ostream &O);
109
110  template <int Scale>
111  void printUImm12Offset(const MCInst *MI, unsigned OpNum,
112                         const MCSubtargetInfo &STI, raw_ostream &O) {
113    printUImm12Offset(MI, OpNum, Scale, O);
114  }
115
116  template <int BitWidth>
117  void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
118                        const MCSubtargetInfo &STI, raw_ostream &O) {
119    printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
120  }
121
122  void printAMNoIndex(const MCInst *MI, unsigned OpNum,
123                      const MCSubtargetInfo &STI, raw_ostream &O);
124
125  template <int Scale>
126  void printImmScale(const MCInst *MI, unsigned OpNum,
127                     const MCSubtargetInfo &STI, raw_ostream &O);
128
129  template <bool IsSVEPrefetch = false>
130  void printPrefetchOp(const MCInst *MI, unsigned OpNum,
131                       const MCSubtargetInfo &STI, raw_ostream &O);
132
133  void printPSBHintOp(const MCInst *MI, unsigned OpNum,
134                      const MCSubtargetInfo &STI, raw_ostream &O);
135
136  void printBTIHintOp(const MCInst *MI, unsigned OpNum,
137                      const MCSubtargetInfo &STI, raw_ostream &O);
138
139  void printFPImmOperand(const MCInst *MI, unsigned OpNum,
140                         const MCSubtargetInfo &STI, raw_ostream &O);
141
142  void printVectorList(const MCInst *MI, unsigned OpNum,
143                       const MCSubtargetInfo &STI, raw_ostream &O,
144                       StringRef LayoutSuffix);
145
146  /// Print a list of vector registers where the type suffix is implicit
147  /// (i.e. attached to the instruction rather than the registers).
148  void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
149                                      const MCSubtargetInfo &STI,
150                                      raw_ostream &O);
151
152  template <unsigned NumLanes, char LaneKind>
153  void printTypedVectorList(const MCInst *MI, unsigned OpNum,
154                            const MCSubtargetInfo &STI, raw_ostream &O);
155
156  void printVectorIndex(const MCInst *MI, unsigned OpNum,
157                        const MCSubtargetInfo &STI, raw_ostream &O);
158  void printAdrpLabel(const MCInst *MI, unsigned OpNum,
159                      const MCSubtargetInfo &STI, raw_ostream &O);
160  void printBarrierOption(const MCInst *MI, unsigned OpNum,
161                          const MCSubtargetInfo &STI, raw_ostream &O);
162  void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
163                              const MCSubtargetInfo &STI, raw_ostream &O);
164  void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
165                              const MCSubtargetInfo &STI, raw_ostream &O);
166  void printSystemPStateField(const MCInst *MI, unsigned OpNum,
167                              const MCSubtargetInfo &STI, raw_ostream &O);
168  void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
169                              const MCSubtargetInfo &STI, raw_ostream &O);
170  template<int64_t Angle, int64_t Remainder>
171  void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
172                            const MCSubtargetInfo &STI, raw_ostream &O);
173  template<unsigned size>
174  void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
175                                    const MCSubtargetInfo &STI,
176                                    raw_ostream &O);
177  template <typename T>
178  void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
179                       const MCSubtargetInfo &STI, raw_ostream &O);
180  template <typename T>
181  void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
182                          const MCSubtargetInfo &STI, raw_ostream &O);
183  void printSVEPattern(const MCInst *MI, unsigned OpNum,
184                       const MCSubtargetInfo &STI, raw_ostream &O);
185  template <char = 0>
186  void printSVERegOp(const MCInst *MI, unsigned OpNum,
187                    const MCSubtargetInfo &STI, raw_ostream &O);
188  void printGPR64as32(const MCInst *MI, unsigned OpNum,
189                      const MCSubtargetInfo &STI, raw_ostream &O);
190  template <int Width>
191  void printZPRasFPR(const MCInst *MI, unsigned OpNum,
192                     const MCSubtargetInfo &STI, raw_ostream &O);
193  template <unsigned ImmIs0, unsigned ImmIs1>
194  void printExactFPImm(const MCInst *MI, unsigned OpNum,
195                       const MCSubtargetInfo &STI, raw_ostream &O);
196};
197
198class AArch64AppleInstPrinter : public AArch64InstPrinter {
199public:
200  AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
201                          const MCRegisterInfo &MRI);
202
203  void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
204                 const MCSubtargetInfo &STI, raw_ostream &O) override;
205
206  void printInstruction(const MCInst *MI, uint64_t Address,
207                        const MCSubtargetInfo &STI, raw_ostream &O) override;
208  bool printAliasInstr(const MCInst *MI, uint64_t Address,
209                       const MCSubtargetInfo &STI, raw_ostream &O) override;
210  void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
211                               unsigned OpIdx, unsigned PrintMethodIdx,
212                               const MCSubtargetInfo &STI,
213                               raw_ostream &O) override;
214
215  StringRef getRegName(unsigned RegNo) const override {
216    return getRegisterName(RegNo);
217  }
218
219  static const char *getRegisterName(unsigned RegNo,
220                                     unsigned AltIdx = AArch64::NoRegAltName);
221};
222
223} // end namespace llvm
224
225#endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
226