1//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise hardware features such as
10// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Support/TargetParser.h"
15#include "llvm/ADT/ArrayRef.h"
16#include "llvm/ADT/SmallString.h"
17#include "llvm/ADT/StringSwitch.h"
18#include "llvm/ADT/Twine.h"
19#include "llvm/Support/ARMBuildAttributes.h"
20
21using namespace llvm;
22using namespace AMDGPU;
23
24namespace {
25
26struct GPUInfo {
27  StringLiteral Name;
28  StringLiteral CanonicalName;
29  AMDGPU::GPUKind Kind;
30  unsigned Features;
31};
32
33constexpr GPUInfo R600GPUs[26] = {
34  // Name       Canonical    Kind        Features
35  //            Name
36  {{"r600"},    {"r600"},    GK_R600,    FEATURE_NONE },
37  {{"rv630"},   {"r600"},    GK_R600,    FEATURE_NONE },
38  {{"rv635"},   {"r600"},    GK_R600,    FEATURE_NONE },
39  {{"r630"},    {"r630"},    GK_R630,    FEATURE_NONE },
40  {{"rs780"},   {"rs880"},   GK_RS880,   FEATURE_NONE },
41  {{"rs880"},   {"rs880"},   GK_RS880,   FEATURE_NONE },
42  {{"rv610"},   {"rs880"},   GK_RS880,   FEATURE_NONE },
43  {{"rv620"},   {"rs880"},   GK_RS880,   FEATURE_NONE },
44  {{"rv670"},   {"rv670"},   GK_RV670,   FEATURE_NONE },
45  {{"rv710"},   {"rv710"},   GK_RV710,   FEATURE_NONE },
46  {{"rv730"},   {"rv730"},   GK_RV730,   FEATURE_NONE },
47  {{"rv740"},   {"rv770"},   GK_RV770,   FEATURE_NONE },
48  {{"rv770"},   {"rv770"},   GK_RV770,   FEATURE_NONE },
49  {{"cedar"},   {"cedar"},   GK_CEDAR,   FEATURE_NONE },
50  {{"palm"},    {"cedar"},   GK_CEDAR,   FEATURE_NONE },
51  {{"cypress"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA  },
52  {{"hemlock"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA  },
53  {{"juniper"}, {"juniper"}, GK_JUNIPER, FEATURE_NONE },
54  {{"redwood"}, {"redwood"}, GK_REDWOOD, FEATURE_NONE },
55  {{"sumo"},    {"sumo"},    GK_SUMO,    FEATURE_NONE },
56  {{"sumo2"},   {"sumo"},    GK_SUMO,    FEATURE_NONE },
57  {{"barts"},   {"barts"},   GK_BARTS,   FEATURE_NONE },
58  {{"caicos"},  {"caicos"},  GK_CAICOS,  FEATURE_NONE },
59  {{"aruba"},   {"cayman"},  GK_CAYMAN,  FEATURE_FMA  },
60  {{"cayman"},  {"cayman"},  GK_CAYMAN,  FEATURE_FMA  },
61  {{"turks"},   {"turks"},   GK_TURKS,   FEATURE_NONE }
62};
63
64// This table should be sorted by the value of GPUKind
65// Don't bother listing the implicitly true features
66constexpr GPUInfo AMDGCNGPUs[38] = {
67  // Name         Canonical    Kind        Features
68  //              Name
69  {{"gfx600"},    {"gfx600"},  GK_GFX600,  FEATURE_FAST_FMA_F32},
70  {{"tahiti"},    {"gfx600"},  GK_GFX600,  FEATURE_FAST_FMA_F32},
71  {{"gfx601"},    {"gfx601"},  GK_GFX601,  FEATURE_NONE},
72  {{"hainan"},    {"gfx601"},  GK_GFX601,  FEATURE_NONE},
73  {{"oland"},     {"gfx601"},  GK_GFX601,  FEATURE_NONE},
74  {{"pitcairn"},  {"gfx601"},  GK_GFX601,  FEATURE_NONE},
75  {{"verde"},     {"gfx601"},  GK_GFX601,  FEATURE_NONE},
76  {{"gfx700"},    {"gfx700"},  GK_GFX700,  FEATURE_NONE},
77  {{"kaveri"},    {"gfx700"},  GK_GFX700,  FEATURE_NONE},
78  {{"gfx701"},    {"gfx701"},  GK_GFX701,  FEATURE_FAST_FMA_F32},
79  {{"hawaii"},    {"gfx701"},  GK_GFX701,  FEATURE_FAST_FMA_F32},
80  {{"gfx702"},    {"gfx702"},  GK_GFX702,  FEATURE_FAST_FMA_F32},
81  {{"gfx703"},    {"gfx703"},  GK_GFX703,  FEATURE_NONE},
82  {{"kabini"},    {"gfx703"},  GK_GFX703,  FEATURE_NONE},
83  {{"mullins"},   {"gfx703"},  GK_GFX703,  FEATURE_NONE},
84  {{"gfx704"},    {"gfx704"},  GK_GFX704,  FEATURE_NONE},
85  {{"bonaire"},   {"gfx704"},  GK_GFX704,  FEATURE_NONE},
86  {{"gfx801"},    {"gfx801"},  GK_GFX801,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
87  {{"carrizo"},   {"gfx801"},  GK_GFX801,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
88  {{"gfx802"},    {"gfx802"},  GK_GFX802,  FEATURE_FAST_DENORMAL_F32},
89  {{"iceland"},   {"gfx802"},  GK_GFX802,  FEATURE_FAST_DENORMAL_F32},
90  {{"tonga"},     {"gfx802"},  GK_GFX802,  FEATURE_FAST_DENORMAL_F32},
91  {{"gfx803"},    {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
92  {{"fiji"},      {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
93  {{"polaris10"}, {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
94  {{"polaris11"}, {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
95  {{"gfx810"},    {"gfx810"},  GK_GFX810,  FEATURE_FAST_DENORMAL_F32},
96  {{"stoney"},    {"gfx810"},  GK_GFX810,  FEATURE_FAST_DENORMAL_F32},
97  {{"gfx900"},    {"gfx900"},  GK_GFX900,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
98  {{"gfx902"},    {"gfx902"},  GK_GFX902,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
99  {{"gfx904"},    {"gfx904"},  GK_GFX904,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
100  {{"gfx906"},    {"gfx906"},  GK_GFX906,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
101  {{"gfx908"},    {"gfx908"},  GK_GFX908,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
102  {{"gfx909"},    {"gfx909"},  GK_GFX909,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
103  {{"gfx1010"},   {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
104  {{"gfx1011"},   {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
105  {{"gfx1012"},   {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
106  {{"gfx1030"},   {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
107};
108
109const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
110  GPUInfo Search = { {""}, {""}, AK, AMDGPU::FEATURE_NONE };
111
112  auto I = std::lower_bound(Table.begin(), Table.end(), Search,
113    [](const GPUInfo &A, const GPUInfo &B) {
114      return A.Kind < B.Kind;
115    });
116
117  if (I == Table.end())
118    return nullptr;
119  return I;
120}
121
122} // namespace
123
124StringRef llvm::AMDGPU::getArchNameAMDGCN(GPUKind AK) {
125  if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
126    return Entry->CanonicalName;
127  return "";
128}
129
130StringRef llvm::AMDGPU::getArchNameR600(GPUKind AK) {
131  if (const auto *Entry = getArchEntry(AK, R600GPUs))
132    return Entry->CanonicalName;
133  return "";
134}
135
136AMDGPU::GPUKind llvm::AMDGPU::parseArchAMDGCN(StringRef CPU) {
137  for (const auto &C : AMDGCNGPUs) {
138    if (CPU == C.Name)
139      return C.Kind;
140  }
141
142  return AMDGPU::GPUKind::GK_NONE;
143}
144
145AMDGPU::GPUKind llvm::AMDGPU::parseArchR600(StringRef CPU) {
146  for (const auto &C : R600GPUs) {
147    if (CPU == C.Name)
148      return C.Kind;
149  }
150
151  return AMDGPU::GPUKind::GK_NONE;
152}
153
154unsigned AMDGPU::getArchAttrAMDGCN(GPUKind AK) {
155  if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
156    return Entry->Features;
157  return FEATURE_NONE;
158}
159
160unsigned AMDGPU::getArchAttrR600(GPUKind AK) {
161  if (const auto *Entry = getArchEntry(AK, R600GPUs))
162    return Entry->Features;
163  return FEATURE_NONE;
164}
165
166void AMDGPU::fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values) {
167  // XXX: Should this only report unique canonical names?
168  for (const auto &C : AMDGCNGPUs)
169    Values.push_back(C.Name);
170}
171
172void AMDGPU::fillValidArchListR600(SmallVectorImpl<StringRef> &Values) {
173  for (const auto &C : R600GPUs)
174    Values.push_back(C.Name);
175}
176
177AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
178  AMDGPU::GPUKind AK = parseArchAMDGCN(GPU);
179  if (AK == AMDGPU::GPUKind::GK_NONE) {
180    if (GPU == "generic-hsa")
181      return {7, 0, 0};
182    if (GPU == "generic")
183      return {6, 0, 0};
184    return {0, 0, 0};
185  }
186
187  switch (AK) {
188  case GK_GFX600:  return {6, 0, 0};
189  case GK_GFX601:  return {6, 0, 1};
190  case GK_GFX700:  return {7, 0, 0};
191  case GK_GFX701:  return {7, 0, 1};
192  case GK_GFX702:  return {7, 0, 2};
193  case GK_GFX703:  return {7, 0, 3};
194  case GK_GFX704:  return {7, 0, 4};
195  case GK_GFX801:  return {8, 0, 1};
196  case GK_GFX802:  return {8, 0, 2};
197  case GK_GFX803:  return {8, 0, 3};
198  case GK_GFX810:  return {8, 1, 0};
199  case GK_GFX900:  return {9, 0, 0};
200  case GK_GFX902:  return {9, 0, 2};
201  case GK_GFX904:  return {9, 0, 4};
202  case GK_GFX906:  return {9, 0, 6};
203  case GK_GFX908:  return {9, 0, 8};
204  case GK_GFX909:  return {9, 0, 9};
205  case GK_GFX1010: return {10, 1, 0};
206  case GK_GFX1011: return {10, 1, 1};
207  case GK_GFX1012: return {10, 1, 2};
208  case GK_GFX1030: return {10, 3, 0};
209  default:         return {0, 0, 0};
210  }
211}
212
213namespace llvm {
214namespace RISCV {
215
216struct CPUInfo {
217  StringLiteral Name;
218  CPUKind Kind;
219  unsigned Features;
220  StringLiteral DefaultMarch;
221  bool is64Bit() const { return (Features & FK_64BIT); }
222};
223
224constexpr CPUInfo RISCVCPUInfo[] = {
225#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)                              \
226  {NAME, CK_##ENUM, FEATURES, DEFAULT_MARCH},
227#include "llvm/Support/RISCVTargetParser.def"
228};
229
230bool checkCPUKind(CPUKind Kind, bool IsRV64) {
231  if (Kind == CK_INVALID)
232    return false;
233  return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
234}
235
236CPUKind parseCPUKind(StringRef CPU) {
237  return llvm::StringSwitch<CPUKind>(CPU)
238#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
239#include "llvm/Support/RISCVTargetParser.def"
240      .Default(CK_INVALID);
241}
242
243StringRef getMArchFromMcpu(StringRef CPU) {
244  CPUKind Kind = parseCPUKind(CPU);
245  return RISCVCPUInfo[static_cast<unsigned>(Kind)].DefaultMarch;
246}
247
248void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
249  for (const auto &C : RISCVCPUInfo) {
250    if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
251      Values.emplace_back(C.Name);
252  }
253}
254
255// Get all features except standard extension feature
256bool getCPUFeaturesExceptStdExt(CPUKind Kind,
257                                std::vector<StringRef> &Features) {
258  unsigned CPUFeatures = RISCVCPUInfo[static_cast<unsigned>(Kind)].Features;
259
260  if (CPUFeatures == FK_INVALID)
261    return false;
262
263  if (CPUFeatures & FK_64BIT)
264    Features.push_back("+64bit");
265  else
266    Features.push_back("-64bit");
267
268  return true;
269}
270
271} // namespace RISCV
272} // namespace llvm
273