1//===-- floatundidf.c - Implement __floatundidf ---------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements __floatundidf for the compiler_rt library.
10//
11//===----------------------------------------------------------------------===//
12
13// Returns: convert a to a double, rounding toward even.
14
15// Assumption: double is a IEEE 64 bit floating point type
16//             du_int is a 64 bit integral type
17
18// seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm
19// mmmm
20
21#include "int_lib.h"
22
23#ifndef __SOFT_FP__
24// Support for systems that have hardware floating-point; we'll set the inexact
25// flag as a side-effect of this computation.
26
27COMPILER_RT_ABI double __floatundidf(du_int a) {
28  static const double twop52 = 4503599627370496.0;           // 0x1.0p52
29  static const double twop84 = 19342813113834066795298816.0; // 0x1.0p84
30  static const double twop84_plus_twop52 =
31      19342813118337666422669312.0; // 0x1.00000001p84
32
33  union {
34    uint64_t x;
35    double d;
36  } high = {.d = twop84};
37  union {
38    uint64_t x;
39    double d;
40  } low = {.d = twop52};
41
42  high.x |= a >> 32;
43  low.x |= a & UINT64_C(0x00000000ffffffff);
44
45  const double result = (high.d - twop84_plus_twop52) + low.d;
46  return result;
47}
48
49#else
50// Support for systems that don't have hardware floating-point; there are no
51// flags to set, and we don't want to code-gen to an unknown soft-float
52// implementation.
53
54COMPILER_RT_ABI double __floatundidf(du_int a) {
55  if (a == 0)
56    return 0.0;
57  const unsigned N = sizeof(du_int) * CHAR_BIT;
58  int sd = N - __builtin_clzll(a); // number of significant digits
59  int e = sd - 1;                  // exponent
60  if (sd > DBL_MANT_DIG) {
61    //  start:  0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx
62    //  finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR
63    //                                                12345678901234567890123456
64    //  1 = msb 1 bit
65    //  P = bit DBL_MANT_DIG-1 bits to the right of 1
66    //  Q = bit DBL_MANT_DIG bits to the right of 1
67    //  R = "or" of all bits to the right of Q
68    switch (sd) {
69    case DBL_MANT_DIG + 1:
70      a <<= 1;
71      break;
72    case DBL_MANT_DIG + 2:
73      break;
74    default:
75      a = (a >> (sd - (DBL_MANT_DIG + 2))) |
76          ((a & ((du_int)(-1) >> ((N + DBL_MANT_DIG + 2) - sd))) != 0);
77    };
78    // finish:
79    a |= (a & 4) != 0; // Or P into R
80    ++a;               // round - this step may add a significant bit
81    a >>= 2;           // dump Q and R
82    // a is now rounded to DBL_MANT_DIG or DBL_MANT_DIG+1 bits
83    if (a & ((du_int)1 << DBL_MANT_DIG)) {
84      a >>= 1;
85      ++e;
86    }
87    // a is now rounded to DBL_MANT_DIG bits
88  } else {
89    a <<= (DBL_MANT_DIG - sd);
90    // a is now rounded to DBL_MANT_DIG bits
91  }
92  double_bits fb;
93  fb.u.s.high = ((su_int)(e + 1023) << 20) |      // exponent
94                ((su_int)(a >> 32) & 0x000FFFFF); // mantissa-high
95  fb.u.s.low = (su_int)a;                         // mantissa-low
96  return fb.f;
97}
98#endif
99
100#if defined(__ARM_EABI__)
101#if defined(COMPILER_RT_ARMHF_TARGET)
102AEABI_RTABI double __aeabi_ul2d(du_int a) { return __floatundidf(a); }
103#else
104COMPILER_RT_ALIAS(__floatundidf, __aeabi_ul2d)
105#endif
106#endif
107