1//===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
10#define LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
11
12#include "clang/AST/CharUnits.h"
13#include "clang/AST/DeclCXX.h"
14#include "clang/Basic/LLVM.h"
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/IR/DerivedTypes.h"
17
18namespace llvm {
19  class StructType;
20}
21
22namespace clang {
23namespace CodeGen {
24
25/// Structure with information about how a bitfield should be accessed.
26///
27/// Often we layout a sequence of bitfields as a contiguous sequence of bits.
28/// When the AST record layout does this, we represent it in the LLVM IR's type
29/// as either a sequence of i8 members or a byte array to reserve the number of
30/// bytes touched without forcing any particular alignment beyond the basic
31/// character alignment.
32///
33/// Then accessing a particular bitfield involves converting this byte array
34/// into a single integer of that size (i24 or i40 -- may not be power-of-two
35/// size), loading it, and shifting and masking to extract the particular
36/// subsequence of bits which make up that particular bitfield. This structure
37/// encodes the information used to construct the extraction code sequences.
38/// The CGRecordLayout also has a field index which encodes which byte-sequence
39/// this bitfield falls within. Let's assume the following C struct:
40///
41///   struct S {
42///     char a, b, c;
43///     unsigned bits : 3;
44///     unsigned more_bits : 4;
45///     unsigned still_more_bits : 7;
46///   };
47///
48/// This will end up as the following LLVM type. The first array is the
49/// bitfield, and the second is the padding out to a 4-byte alignmnet.
50///
51///   %t = type { i8, i8, i8, i8, i8, [3 x i8] }
52///
53/// When generating code to access more_bits, we'll generate something
54/// essentially like this:
55///
56///   define i32 @foo(%t* %base) {
57///     %0 = gep %t* %base, i32 0, i32 3
58///     %2 = load i8* %1
59///     %3 = lshr i8 %2, 3
60///     %4 = and i8 %3, 15
61///     %5 = zext i8 %4 to i32
62///     ret i32 %i
63///   }
64///
65struct CGBitFieldInfo {
66  /// The offset within a contiguous run of bitfields that are represented as
67  /// a single "field" within the LLVM struct type. This offset is in bits.
68  unsigned Offset : 16;
69
70  /// The total size of the bit-field, in bits.
71  unsigned Size : 15;
72
73  /// Whether the bit-field is signed.
74  unsigned IsSigned : 1;
75
76  /// The storage size in bits which should be used when accessing this
77  /// bitfield.
78  unsigned StorageSize;
79
80  /// The offset of the bitfield storage from the start of the struct.
81  CharUnits StorageOffset;
82
83  CGBitFieldInfo()
84      : Offset(), Size(), IsSigned(), StorageSize(), StorageOffset() {}
85
86  CGBitFieldInfo(unsigned Offset, unsigned Size, bool IsSigned,
87                 unsigned StorageSize, CharUnits StorageOffset)
88      : Offset(Offset), Size(Size), IsSigned(IsSigned),
89        StorageSize(StorageSize), StorageOffset(StorageOffset) {}
90
91  void print(raw_ostream &OS) const;
92  void dump() const;
93
94  /// Given a bit-field decl, build an appropriate helper object for
95  /// accessing that field (which is expected to have the given offset and
96  /// size).
97  static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types,
98                                 const FieldDecl *FD,
99                                 uint64_t Offset, uint64_t Size,
100                                 uint64_t StorageSize,
101                                 CharUnits StorageOffset);
102};
103
104/// CGRecordLayout - This class handles struct and union layout info while
105/// lowering AST types to LLVM types.
106///
107/// These layout objects are only created on demand as IR generation requires.
108class CGRecordLayout {
109  friend class CodeGenTypes;
110
111  CGRecordLayout(const CGRecordLayout &) = delete;
112  void operator=(const CGRecordLayout &) = delete;
113
114private:
115  /// The LLVM type corresponding to this record layout; used when
116  /// laying it out as a complete object.
117  llvm::StructType *CompleteObjectType;
118
119  /// The LLVM type for the non-virtual part of this record layout;
120  /// used when laying it out as a base subobject.
121  llvm::StructType *BaseSubobjectType;
122
123  /// Map from (non-bit-field) struct field to the corresponding llvm struct
124  /// type field no. This info is populated by record builder.
125  llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
126
127  /// Map from (bit-field) struct field to the corresponding llvm struct type
128  /// field no. This info is populated by record builder.
129  llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
130
131  // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
132  // map for both virtual and non-virtual bases.
133  llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
134
135  /// Map from virtual bases to their field index in the complete object.
136  llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
137
138  /// False if any direct or indirect subobject of this class, when
139  /// considered as a complete object, requires a non-zero bitpattern
140  /// when zero-initialized.
141  bool IsZeroInitializable : 1;
142
143  /// False if any direct or indirect subobject of this class, when
144  /// considered as a base subobject, requires a non-zero bitpattern
145  /// when zero-initialized.
146  bool IsZeroInitializableAsBase : 1;
147
148public:
149  CGRecordLayout(llvm::StructType *CompleteObjectType,
150                 llvm::StructType *BaseSubobjectType,
151                 bool IsZeroInitializable,
152                 bool IsZeroInitializableAsBase)
153    : CompleteObjectType(CompleteObjectType),
154      BaseSubobjectType(BaseSubobjectType),
155      IsZeroInitializable(IsZeroInitializable),
156      IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
157
158  /// Return the "complete object" LLVM type associated with
159  /// this record.
160  llvm::StructType *getLLVMType() const {
161    return CompleteObjectType;
162  }
163
164  /// Return the "base subobject" LLVM type associated with
165  /// this record.
166  llvm::StructType *getBaseSubobjectLLVMType() const {
167    return BaseSubobjectType;
168  }
169
170  /// Check whether this struct can be C++ zero-initialized
171  /// with a zeroinitializer.
172  bool isZeroInitializable() const {
173    return IsZeroInitializable;
174  }
175
176  /// Check whether this struct can be C++ zero-initialized
177  /// with a zeroinitializer when considered as a base subobject.
178  bool isZeroInitializableAsBase() const {
179    return IsZeroInitializableAsBase;
180  }
181
182  /// Return llvm::StructType element number that corresponds to the
183  /// field FD.
184  unsigned getLLVMFieldNo(const FieldDecl *FD) const {
185    FD = FD->getCanonicalDecl();
186    assert(FieldInfo.count(FD) && "Invalid field for record!");
187    return FieldInfo.lookup(FD);
188  }
189
190  unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
191    assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
192    return NonVirtualBases.lookup(RD);
193  }
194
195  /// Return the LLVM field index corresponding to the given
196  /// virtual base.  Only valid when operating on the complete object.
197  unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
198    assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
199    return CompleteObjectVirtualBases.lookup(base);
200  }
201
202  /// Return the BitFieldInfo that corresponds to the field FD.
203  const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
204    FD = FD->getCanonicalDecl();
205    assert(FD->isBitField() && "Invalid call for non-bit-field decl!");
206    llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
207      it = BitFields.find(FD);
208    assert(it != BitFields.end() && "Unable to find bitfield info");
209    return it->second;
210  }
211
212  void print(raw_ostream &OS) const;
213  void dump() const;
214};
215
216}  // end namespace CodeGen
217}  // end namespace clang
218
219#endif
220