1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD$"); 33 34#include <sys/param.h> 35#include <sys/types.h> 36#include <sys/sysctl.h> 37#include <sys/errno.h> 38#include <sys/mman.h> 39#include <sys/cpuset.h> 40 41#include <stdio.h> 42#include <stdlib.h> 43#include <stdbool.h> 44#include <string.h> 45#include <unistd.h> 46#include <libgen.h> 47#include <libutil.h> 48#include <fcntl.h> 49#include <getopt.h> 50#include <time.h> 51#include <assert.h> 52#include <libutil.h> 53 54#include <machine/cpufunc.h> 55#include <machine/specialreg.h> 56#include <machine/vmm.h> 57#include <machine/vmm_dev.h> 58#include <vmmapi.h> 59 60#include "amd/vmcb.h" 61#include "intel/vmcs.h" 62 63#define MB (1UL << 20) 64#define GB (1UL << 30) 65 66#define REQ_ARG required_argument 67#define NO_ARG no_argument 68#define OPT_ARG optional_argument 69 70static const char *progname; 71 72static void 73usage(bool cpu_intel) 74{ 75 76 (void)fprintf(stderr, 77 "Usage: %s --vm=<vmname>\n" 78 " [--cpu=<vcpu_number>]\n" 79 " [--create]\n" 80 " [--destroy]\n" 81 " [--get-all]\n" 82 " [--get-stats]\n" 83 " [--set-desc-ds]\n" 84 " [--get-desc-ds]\n" 85 " [--set-desc-es]\n" 86 " [--get-desc-es]\n" 87 " [--set-desc-gs]\n" 88 " [--get-desc-gs]\n" 89 " [--set-desc-fs]\n" 90 " [--get-desc-fs]\n" 91 " [--set-desc-cs]\n" 92 " [--get-desc-cs]\n" 93 " [--set-desc-ss]\n" 94 " [--get-desc-ss]\n" 95 " [--set-desc-tr]\n" 96 " [--get-desc-tr]\n" 97 " [--set-desc-ldtr]\n" 98 " [--get-desc-ldtr]\n" 99 " [--set-desc-gdtr]\n" 100 " [--get-desc-gdtr]\n" 101 " [--set-desc-idtr]\n" 102 " [--get-desc-idtr]\n" 103 " [--run]\n" 104 " [--capname=<capname>]\n" 105 " [--getcap]\n" 106 " [--setcap=<0|1>]\n" 107 " [--desc-base=<BASE>]\n" 108 " [--desc-limit=<LIMIT>]\n" 109 " [--desc-access=<ACCESS>]\n" 110 " [--set-cr0=<CR0>]\n" 111 " [--get-cr0]\n" 112 " [--set-cr2=<CR2>]\n" 113 " [--get-cr2]\n" 114 " [--set-cr3=<CR3>]\n" 115 " [--get-cr3]\n" 116 " [--set-cr4=<CR4>]\n" 117 " [--get-cr4]\n" 118 " [--set-dr0=<DR0>]\n" 119 " [--get-dr0]\n" 120 " [--set-dr1=<DR1>]\n" 121 " [--get-dr1]\n" 122 " [--set-dr2=<DR2>]\n" 123 " [--get-dr2]\n" 124 " [--set-dr3=<DR3>]\n" 125 " [--get-dr3]\n" 126 " [--set-dr6=<DR6>]\n" 127 " [--get-dr6]\n" 128 " [--set-dr7=<DR7>]\n" 129 " [--get-dr7]\n" 130 " [--set-rsp=<RSP>]\n" 131 " [--get-rsp]\n" 132 " [--set-rip=<RIP>]\n" 133 " [--get-rip]\n" 134 " [--get-rax]\n" 135 " [--set-rax=<RAX>]\n" 136 " [--get-rbx]\n" 137 " [--get-rcx]\n" 138 " [--get-rdx]\n" 139 " [--get-rsi]\n" 140 " [--get-rdi]\n" 141 " [--get-rbp]\n" 142 " [--get-r8]\n" 143 " [--get-r9]\n" 144 " [--get-r10]\n" 145 " [--get-r11]\n" 146 " [--get-r12]\n" 147 " [--get-r13]\n" 148 " [--get-r14]\n" 149 " [--get-r15]\n" 150 " [--set-rflags=<RFLAGS>]\n" 151 " [--get-rflags]\n" 152 " [--set-cs]\n" 153 " [--get-cs]\n" 154 " [--set-ds]\n" 155 " [--get-ds]\n" 156 " [--set-es]\n" 157 " [--get-es]\n" 158 " [--set-fs]\n" 159 " [--get-fs]\n" 160 " [--set-gs]\n" 161 " [--get-gs]\n" 162 " [--set-ss]\n" 163 " [--get-ss]\n" 164 " [--get-tr]\n" 165 " [--get-ldtr]\n" 166 " [--set-x2apic-state=<state>]\n" 167 " [--get-x2apic-state]\n" 168 " [--unassign-pptdev=<bus/slot/func>]\n" 169 " [--set-mem=<memory in units of MB>]\n" 170 " [--get-lowmem]\n" 171 " [--get-highmem]\n" 172 " [--get-gpa-pmap]\n" 173 " [--assert-lapic-lvt=<pin>]\n" 174 " [--inject-nmi]\n" 175 " [--force-reset]\n" 176 " [--force-poweroff]\n" 177 " [--get-rtc-time]\n" 178 " [--set-rtc-time=<secs>]\n" 179 " [--get-rtc-nvram]\n" 180 " [--set-rtc-nvram=<val>]\n" 181 " [--rtc-nvram-offset=<offset>]\n" 182 " [--get-active-cpus]\n" 183 " [--get-suspended-cpus]\n" 184 " [--get-intinfo]\n" 185 " [--get-eptp]\n" 186 " [--set-exception-bitmap]\n" 187 " [--get-exception-bitmap]\n" 188 " [--get-tsc-offset]\n" 189 " [--get-guest-pat]\n" 190 " [--get-io-bitmap-address]\n" 191 " [--get-msr-bitmap]\n" 192 " [--get-msr-bitmap-address]\n" 193 " [--get-guest-sysenter]\n" 194 " [--get-exit-reason]\n" 195 " [--get-cpu-topology]\n", 196 progname); 197 198 if (cpu_intel) { 199 (void)fprintf(stderr, 200 " [--get-vmcs-pinbased-ctls]\n" 201 " [--get-vmcs-procbased-ctls]\n" 202 " [--get-vmcs-procbased-ctls2]\n" 203 " [--get-vmcs-entry-interruption-info]\n" 204 " [--set-vmcs-entry-interruption-info=<info>]\n" 205 " [--get-vmcs-guest-physical-address\n" 206 " [--get-vmcs-guest-linear-address\n" 207 " [--get-vmcs-host-pat]\n" 208 " [--get-vmcs-host-cr0]\n" 209 " [--get-vmcs-host-cr3]\n" 210 " [--get-vmcs-host-cr4]\n" 211 " [--get-vmcs-host-rip]\n" 212 " [--get-vmcs-host-rsp]\n" 213 " [--get-vmcs-cr0-mask]\n" 214 " [--get-vmcs-cr0-shadow]\n" 215 " [--get-vmcs-cr4-mask]\n" 216 " [--get-vmcs-cr4-shadow]\n" 217 " [--get-vmcs-cr3-targets]\n" 218 " [--get-vmcs-apic-access-address]\n" 219 " [--get-vmcs-virtual-apic-address]\n" 220 " [--get-vmcs-tpr-threshold]\n" 221 " [--get-vmcs-vpid]\n" 222 " [--get-vmcs-instruction-error]\n" 223 " [--get-vmcs-exit-ctls]\n" 224 " [--get-vmcs-entry-ctls]\n" 225 " [--get-vmcs-link]\n" 226 " [--get-vmcs-exit-qualification]\n" 227 " [--get-vmcs-exit-interruption-info]\n" 228 " [--get-vmcs-exit-interruption-error]\n" 229 " [--get-vmcs-interruptibility]\n" 230 ); 231 } else { 232 (void)fprintf(stderr, 233 " [--get-vmcb-intercepts]\n" 234 " [--get-vmcb-asid]\n" 235 " [--get-vmcb-exit-details]\n" 236 " [--get-vmcb-tlb-ctrl]\n" 237 " [--get-vmcb-virq]\n" 238 " [--get-avic-apic-bar]\n" 239 " [--get-avic-backing-page]\n" 240 " [--get-avic-table]\n" 241 ); 242 } 243 exit(1); 244} 245 246static int get_rtc_time, set_rtc_time; 247static int get_rtc_nvram, set_rtc_nvram; 248static int rtc_nvram_offset; 249static uint8_t rtc_nvram_value; 250static time_t rtc_secs; 251 252static int get_stats, getcap, setcap, capval, get_gpa_pmap; 253static int inject_nmi, assert_lapic_lvt; 254static int force_reset, force_poweroff; 255static const char *capname; 256static int create, destroy, get_memmap, get_memseg; 257static int get_intinfo; 258static int get_active_cpus, get_suspended_cpus; 259static uint64_t memsize; 260static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3; 261static int set_cr4, get_cr4; 262static int set_efer, get_efer; 263static int set_dr0, get_dr0; 264static int set_dr1, get_dr1; 265static int set_dr2, get_dr2; 266static int set_dr3, get_dr3; 267static int set_dr6, get_dr6; 268static int set_dr7, get_dr7; 269static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags; 270static int set_rax, get_rax; 271static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp; 272static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15; 273static int set_desc_ds, get_desc_ds; 274static int set_desc_es, get_desc_es; 275static int set_desc_fs, get_desc_fs; 276static int set_desc_gs, get_desc_gs; 277static int set_desc_cs, get_desc_cs; 278static int set_desc_ss, get_desc_ss; 279static int set_desc_gdtr, get_desc_gdtr; 280static int set_desc_idtr, get_desc_idtr; 281static int set_desc_tr, get_desc_tr; 282static int set_desc_ldtr, get_desc_ldtr; 283static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr; 284static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr; 285static int set_x2apic_state, get_x2apic_state; 286enum x2apic_state x2apic_state; 287static int unassign_pptdev, bus, slot, func; 288static int run; 289static int get_cpu_topology; 290 291/* 292 * VMCB specific. 293 */ 294static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl; 295static int get_vmcb_virq, get_avic_table; 296 297/* 298 * VMCS-specific fields 299 */ 300static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2; 301static int get_eptp, get_io_bitmap, get_tsc_offset; 302static int get_vmcs_entry_interruption_info; 303static int get_vmcs_interruptibility; 304uint32_t vmcs_entry_interruption_info; 305static int get_vmcs_gpa, get_vmcs_gla; 306static int get_exception_bitmap; 307static int get_cr0_mask, get_cr0_shadow; 308static int get_cr4_mask, get_cr4_shadow; 309static int get_cr3_targets; 310static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold; 311static int get_msr_bitmap, get_msr_bitmap_address; 312static int get_vpid_asid; 313static int get_inst_err, get_exit_ctls, get_entry_ctls; 314static int get_host_cr0, get_host_cr3, get_host_cr4; 315static int get_host_rip, get_host_rsp; 316static int get_guest_pat, get_host_pat; 317static int get_guest_sysenter, get_vmcs_link; 318static int get_exit_reason, get_vmcs_exit_qualification; 319static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; 320static int get_vmcs_exit_inst_length; 321 322static uint64_t desc_base; 323static uint32_t desc_limit, desc_access; 324 325static int get_all; 326 327static void 328dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu) 329{ 330 printf("vm exit[%d]\n", vcpu); 331 printf("\trip\t\t0x%016lx\n", vmexit->rip); 332 printf("\tinst_length\t%d\n", vmexit->inst_length); 333 switch (vmexit->exitcode) { 334 case VM_EXITCODE_INOUT: 335 printf("\treason\t\tINOUT\n"); 336 printf("\tdirection\t%s\n", vmexit->u.inout.in ? "IN" : "OUT"); 337 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes); 338 printf("\tflags\t\t%s%s\n", 339 vmexit->u.inout.string ? "STRING " : "", 340 vmexit->u.inout.rep ? "REP " : ""); 341 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port); 342 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax); 343 break; 344 case VM_EXITCODE_VMX: 345 printf("\treason\t\tVMX\n"); 346 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status); 347 printf("\texit_reason\t0x%08x (%u)\n", 348 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason); 349 printf("\tqualification\t0x%016lx\n", 350 vmexit->u.vmx.exit_qualification); 351 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type); 352 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error); 353 break; 354 case VM_EXITCODE_SVM: 355 printf("\treason\t\tSVM\n"); 356 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode); 357 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1); 358 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2); 359 break; 360 default: 361 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode); 362 break; 363 } 364} 365 366/* AMD 6th generation and Intel compatible MSRs */ 367#define MSR_AMD6TH_START 0xC0000000 368#define MSR_AMD6TH_END 0xC0001FFF 369/* AMD 7th and 8th generation compatible MSRs */ 370#define MSR_AMD7TH_START 0xC0010000 371#define MSR_AMD7TH_END 0xC0011FFF 372 373static const char * 374msr_name(uint32_t msr) 375{ 376 static char buf[32]; 377 378 switch(msr) { 379 case MSR_TSC: 380 return ("MSR_TSC"); 381 case MSR_EFER: 382 return ("MSR_EFER"); 383 case MSR_STAR: 384 return ("MSR_STAR"); 385 case MSR_LSTAR: 386 return ("MSR_LSTAR"); 387 case MSR_CSTAR: 388 return ("MSR_CSTAR"); 389 case MSR_SF_MASK: 390 return ("MSR_SF_MASK"); 391 case MSR_FSBASE: 392 return ("MSR_FSBASE"); 393 case MSR_GSBASE: 394 return ("MSR_GSBASE"); 395 case MSR_KGSBASE: 396 return ("MSR_KGSBASE"); 397 case MSR_SYSENTER_CS_MSR: 398 return ("MSR_SYSENTER_CS_MSR"); 399 case MSR_SYSENTER_ESP_MSR: 400 return ("MSR_SYSENTER_ESP_MSR"); 401 case MSR_SYSENTER_EIP_MSR: 402 return ("MSR_SYSENTER_EIP_MSR"); 403 case MSR_PAT: 404 return ("MSR_PAT"); 405 } 406 snprintf(buf, sizeof(buf), "MSR %#08x", msr); 407 408 return (buf); 409} 410 411static inline void 412print_msr_pm(uint64_t msr, int vcpu, int readable, int writeable) 413{ 414 415 if (readable || writeable) { 416 printf("%-20s[%d]\t\t%c%c\n", msr_name(msr), vcpu, 417 readable ? 'R' : '-', writeable ? 'W' : '-'); 418 } 419} 420 421/* 422 * Reference APM vol2, section 15.11 MSR Intercepts. 423 */ 424static void 425dump_amd_msr_pm(const char *bitmap, int vcpu) 426{ 427 int byte, bit, readable, writeable; 428 uint32_t msr; 429 430 for (msr = 0; msr < 0x2000; msr++) { 431 byte = msr / 4; 432 bit = (msr % 4) * 2; 433 434 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 435 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 436 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 437 print_msr_pm(msr, vcpu, readable, writeable); 438 439 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 440 byte += 2048; 441 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 442 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 443 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 444 writeable); 445 446 /* MSR 0xC0010000 to 0xC0011FF is only for AMD */ 447 byte += 4096; 448 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 449 writeable = (bitmap[byte] & (2 << bit)) ? 0 : 1; 450 print_msr_pm(msr + MSR_AMD7TH_START, vcpu, readable, 451 writeable); 452 } 453} 454 455/* 456 * Reference Intel SDM Vol3 Section 24.6.9 MSR-Bitmap Address 457 */ 458static void 459dump_intel_msr_pm(const char *bitmap, int vcpu) 460{ 461 int byte, bit, readable, writeable; 462 uint32_t msr; 463 464 for (msr = 0; msr < 0x2000; msr++) { 465 byte = msr / 8; 466 bit = msr & 0x7; 467 468 /* Look at MSRs in the range 0x00000000 to 0x00001FFF */ 469 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 470 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 471 print_msr_pm(msr, vcpu, readable, writeable); 472 473 /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ 474 byte += 1024; 475 readable = (bitmap[byte] & (1 << bit)) ? 0 : 1; 476 writeable = (bitmap[2048 + byte] & (1 << bit)) ? 0 : 1; 477 print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable, 478 writeable); 479 } 480} 481 482static int 483dump_msr_bitmap(int vcpu, uint64_t addr, bool cpu_intel) 484{ 485 int error, fd, map_size; 486 const char *bitmap; 487 488 error = -1; 489 bitmap = MAP_FAILED; 490 491 fd = open("/dev/mem", O_RDONLY, 0); 492 if (fd < 0) { 493 perror("Couldn't open /dev/mem"); 494 goto done; 495 } 496 497 if (cpu_intel) 498 map_size = PAGE_SIZE; 499 else 500 map_size = 2 * PAGE_SIZE; 501 502 bitmap = mmap(NULL, map_size, PROT_READ, MAP_SHARED, fd, addr); 503 if (bitmap == MAP_FAILED) { 504 perror("mmap failed"); 505 goto done; 506 } 507 508 if (cpu_intel) 509 dump_intel_msr_pm(bitmap, vcpu); 510 else 511 dump_amd_msr_pm(bitmap, vcpu); 512 513 error = 0; 514done: 515 if (bitmap != MAP_FAILED) 516 munmap((void *)bitmap, map_size); 517 if (fd >= 0) 518 close(fd); 519 520 return (error); 521} 522 523static int 524vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val) 525{ 526 527 return (vm_get_register(ctx, vcpu, VMCS_IDENT(field), ret_val)); 528} 529 530static int 531vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 532 uint64_t *ret_val) 533{ 534 535 return (vm_get_register(ctx, vcpu, VMCB_ACCESS(off, bytes), ret_val)); 536} 537 538enum { 539 VMNAME = 1000, /* avoid collision with return values from getopt */ 540 VCPU, 541 SET_MEM, 542 SET_EFER, 543 SET_CR0, 544 SET_CR2, 545 SET_CR3, 546 SET_CR4, 547 SET_DR0, 548 SET_DR1, 549 SET_DR2, 550 SET_DR3, 551 SET_DR6, 552 SET_DR7, 553 SET_RSP, 554 SET_RIP, 555 SET_RAX, 556 SET_RFLAGS, 557 DESC_BASE, 558 DESC_LIMIT, 559 DESC_ACCESS, 560 SET_CS, 561 SET_DS, 562 SET_ES, 563 SET_FS, 564 SET_GS, 565 SET_SS, 566 SET_TR, 567 SET_LDTR, 568 SET_X2APIC_STATE, 569 SET_CAP, 570 CAPNAME, 571 UNASSIGN_PPTDEV, 572 GET_GPA_PMAP, 573 ASSERT_LAPIC_LVT, 574 SET_RTC_TIME, 575 SET_RTC_NVRAM, 576 RTC_NVRAM_OFFSET, 577}; 578 579static void 580print_cpus(const char *banner, const cpuset_t *cpus) 581{ 582 int i, first; 583 584 first = 1; 585 printf("%s:\t", banner); 586 if (!CPU_EMPTY(cpus)) { 587 for (i = 0; i < CPU_SETSIZE; i++) { 588 if (CPU_ISSET(i, cpus)) { 589 printf("%s%d", first ? " " : ", ", i); 590 first = 0; 591 } 592 } 593 } else 594 printf(" (none)"); 595 printf("\n"); 596} 597 598static void 599print_intinfo(const char *banner, uint64_t info) 600{ 601 int type; 602 603 printf("%s:\t", banner); 604 if (info & VM_INTINFO_VALID) { 605 type = info & VM_INTINFO_TYPE; 606 switch (type) { 607 case VM_INTINFO_HWINTR: 608 printf("extint"); 609 break; 610 case VM_INTINFO_NMI: 611 printf("nmi"); 612 break; 613 case VM_INTINFO_SWINTR: 614 printf("swint"); 615 break; 616 default: 617 printf("exception"); 618 break; 619 } 620 printf(" vector %d", (int)VM_INTINFO_VECTOR(info)); 621 if (info & VM_INTINFO_DEL_ERRCODE) 622 printf(" errcode %#x", (u_int)(info >> 32)); 623 } else { 624 printf("n/a"); 625 } 626 printf("\n"); 627} 628 629static bool 630cpu_vendor_intel(void) 631{ 632 u_int regs[4]; 633 char cpu_vendor[13]; 634 635 do_cpuid(0, regs); 636 ((u_int *)&cpu_vendor)[0] = regs[1]; 637 ((u_int *)&cpu_vendor)[1] = regs[3]; 638 ((u_int *)&cpu_vendor)[2] = regs[2]; 639 cpu_vendor[12] = '\0'; 640 641 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { 642 return (false); 643 } else if (strcmp(cpu_vendor, "HygonGenuine") == 0) { 644 return (false); 645 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { 646 return (true); 647 } else { 648 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor); 649 exit(1); 650 } 651} 652 653static int 654get_all_registers(struct vmctx *ctx, int vcpu) 655{ 656 uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 657 uint64_t rsp, rip, rflags, efer; 658 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp; 659 uint64_t r8, r9, r10, r11, r12, r13, r14, r15; 660 int error = 0; 661 662 if (!error && (get_efer || get_all)) { 663 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer); 664 if (error == 0) 665 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer); 666 } 667 668 if (!error && (get_cr0 || get_all)) { 669 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0); 670 if (error == 0) 671 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 672 } 673 674 if (!error && (get_cr2 || get_all)) { 675 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR2, &cr2); 676 if (error == 0) 677 printf("cr2[%d]\t\t0x%016lx\n", vcpu, cr2); 678 } 679 680 if (!error && (get_cr3 || get_all)) { 681 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3); 682 if (error == 0) 683 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 684 } 685 686 if (!error && (get_cr4 || get_all)) { 687 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4); 688 if (error == 0) 689 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 690 } 691 692 if (!error && (get_dr0 || get_all)) { 693 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0); 694 if (error == 0) 695 printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0); 696 } 697 698 if (!error && (get_dr1 || get_all)) { 699 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1); 700 if (error == 0) 701 printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1); 702 } 703 704 if (!error && (get_dr2 || get_all)) { 705 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2); 706 if (error == 0) 707 printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2); 708 } 709 710 if (!error && (get_dr3 || get_all)) { 711 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3); 712 if (error == 0) 713 printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3); 714 } 715 716 if (!error && (get_dr6 || get_all)) { 717 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6); 718 if (error == 0) 719 printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6); 720 } 721 722 if (!error && (get_dr7 || get_all)) { 723 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7); 724 if (error == 0) 725 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7); 726 } 727 728 if (!error && (get_rsp || get_all)) { 729 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp); 730 if (error == 0) 731 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 732 } 733 734 if (!error && (get_rip || get_all)) { 735 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip); 736 if (error == 0) 737 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip); 738 } 739 740 if (!error && (get_rax || get_all)) { 741 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax); 742 if (error == 0) 743 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax); 744 } 745 746 if (!error && (get_rbx || get_all)) { 747 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx); 748 if (error == 0) 749 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx); 750 } 751 752 if (!error && (get_rcx || get_all)) { 753 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx); 754 if (error == 0) 755 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx); 756 } 757 758 if (!error && (get_rdx || get_all)) { 759 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx); 760 if (error == 0) 761 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx); 762 } 763 764 if (!error && (get_rsi || get_all)) { 765 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi); 766 if (error == 0) 767 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi); 768 } 769 770 if (!error && (get_rdi || get_all)) { 771 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi); 772 if (error == 0) 773 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi); 774 } 775 776 if (!error && (get_rbp || get_all)) { 777 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp); 778 if (error == 0) 779 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp); 780 } 781 782 if (!error && (get_r8 || get_all)) { 783 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8); 784 if (error == 0) 785 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8); 786 } 787 788 if (!error && (get_r9 || get_all)) { 789 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9); 790 if (error == 0) 791 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9); 792 } 793 794 if (!error && (get_r10 || get_all)) { 795 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10); 796 if (error == 0) 797 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10); 798 } 799 800 if (!error && (get_r11 || get_all)) { 801 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11); 802 if (error == 0) 803 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11); 804 } 805 806 if (!error && (get_r12 || get_all)) { 807 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12); 808 if (error == 0) 809 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12); 810 } 811 812 if (!error && (get_r13 || get_all)) { 813 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13); 814 if (error == 0) 815 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13); 816 } 817 818 if (!error && (get_r14 || get_all)) { 819 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14); 820 if (error == 0) 821 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14); 822 } 823 824 if (!error && (get_r15 || get_all)) { 825 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15); 826 if (error == 0) 827 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15); 828 } 829 830 if (!error && (get_rflags || get_all)) { 831 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 832 &rflags); 833 if (error == 0) 834 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags); 835 } 836 837 return (error); 838} 839 840static int 841get_all_segments(struct vmctx *ctx, int vcpu) 842{ 843 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 844 int error = 0; 845 846 if (!error && (get_desc_ds || get_all)) { 847 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS, 848 &desc_base, &desc_limit, &desc_access); 849 if (error == 0) { 850 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 851 vcpu, desc_base, desc_limit, desc_access); 852 } 853 } 854 855 if (!error && (get_desc_es || get_all)) { 856 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES, 857 &desc_base, &desc_limit, &desc_access); 858 if (error == 0) { 859 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 860 vcpu, desc_base, desc_limit, desc_access); 861 } 862 } 863 864 if (!error && (get_desc_fs || get_all)) { 865 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS, 866 &desc_base, &desc_limit, &desc_access); 867 if (error == 0) { 868 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 869 vcpu, desc_base, desc_limit, desc_access); 870 } 871 } 872 873 if (!error && (get_desc_gs || get_all)) { 874 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS, 875 &desc_base, &desc_limit, &desc_access); 876 if (error == 0) { 877 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 878 vcpu, desc_base, desc_limit, desc_access); 879 } 880 } 881 882 if (!error && (get_desc_ss || get_all)) { 883 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, 884 &desc_base, &desc_limit, &desc_access); 885 if (error == 0) { 886 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 887 vcpu, desc_base, desc_limit, desc_access); 888 } 889 } 890 891 if (!error && (get_desc_cs || get_all)) { 892 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS, 893 &desc_base, &desc_limit, &desc_access); 894 if (error == 0) { 895 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 896 vcpu, desc_base, desc_limit, desc_access); 897 } 898 } 899 900 if (!error && (get_desc_tr || get_all)) { 901 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, 902 &desc_base, &desc_limit, &desc_access); 903 if (error == 0) { 904 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 905 vcpu, desc_base, desc_limit, desc_access); 906 } 907 } 908 909 if (!error && (get_desc_ldtr || get_all)) { 910 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 911 &desc_base, &desc_limit, &desc_access); 912 if (error == 0) { 913 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 914 vcpu, desc_base, desc_limit, desc_access); 915 } 916 } 917 918 if (!error && (get_desc_gdtr || get_all)) { 919 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 920 &desc_base, &desc_limit, &desc_access); 921 if (error == 0) { 922 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n", 923 vcpu, desc_base, desc_limit); 924 } 925 } 926 927 if (!error && (get_desc_idtr || get_all)) { 928 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 929 &desc_base, &desc_limit, &desc_access); 930 if (error == 0) { 931 printf("idtr[%d]\t\t0x%016lx/0x%08x\n", 932 vcpu, desc_base, desc_limit); 933 } 934 } 935 936 if (!error && (get_cs || get_all)) { 937 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs); 938 if (error == 0) 939 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs); 940 } 941 942 if (!error && (get_ds || get_all)) { 943 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds); 944 if (error == 0) 945 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds); 946 } 947 948 if (!error && (get_es || get_all)) { 949 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es); 950 if (error == 0) 951 printf("es[%d]\t\t0x%04lx\n", vcpu, es); 952 } 953 954 if (!error && (get_fs || get_all)) { 955 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs); 956 if (error == 0) 957 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs); 958 } 959 960 if (!error && (get_gs || get_all)) { 961 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs); 962 if (error == 0) 963 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs); 964 } 965 966 if (!error && (get_ss || get_all)) { 967 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss); 968 if (error == 0) 969 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss); 970 } 971 972 if (!error && (get_tr || get_all)) { 973 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr); 974 if (error == 0) 975 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr); 976 } 977 978 if (!error && (get_ldtr || get_all)) { 979 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr); 980 if (error == 0) 981 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr); 982 } 983 984 return (error); 985} 986 987static int 988get_misc_vmcs(struct vmctx *ctx, int vcpu) 989{ 990 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64; 991 int error = 0; 992 993 if (!error && (get_cr0_mask || get_all)) { 994 uint64_t cr0mask; 995 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask); 996 if (error == 0) 997 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask); 998 } 999 1000 if (!error && (get_cr0_shadow || get_all)) { 1001 uint64_t cr0shadow; 1002 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW, 1003 &cr0shadow); 1004 if (error == 0) 1005 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow); 1006 } 1007 1008 if (!error && (get_cr4_mask || get_all)) { 1009 uint64_t cr4mask; 1010 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask); 1011 if (error == 0) 1012 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask); 1013 } 1014 1015 if (!error && (get_cr4_shadow || get_all)) { 1016 uint64_t cr4shadow; 1017 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW, 1018 &cr4shadow); 1019 if (error == 0) 1020 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow); 1021 } 1022 1023 if (!error && (get_cr3_targets || get_all)) { 1024 uint64_t target_count, target_addr; 1025 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT, 1026 &target_count); 1027 if (error == 0) { 1028 printf("cr3_target_count[%d]\t0x%016lx\n", 1029 vcpu, target_count); 1030 } 1031 1032 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0, 1033 &target_addr); 1034 if (error == 0) { 1035 printf("cr3_target0[%d]\t\t0x%016lx\n", 1036 vcpu, target_addr); 1037 } 1038 1039 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1, 1040 &target_addr); 1041 if (error == 0) { 1042 printf("cr3_target1[%d]\t\t0x%016lx\n", 1043 vcpu, target_addr); 1044 } 1045 1046 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2, 1047 &target_addr); 1048 if (error == 0) { 1049 printf("cr3_target2[%d]\t\t0x%016lx\n", 1050 vcpu, target_addr); 1051 } 1052 1053 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3, 1054 &target_addr); 1055 if (error == 0) { 1056 printf("cr3_target3[%d]\t\t0x%016lx\n", 1057 vcpu, target_addr); 1058 } 1059 } 1060 1061 if (!error && (get_pinbased_ctls || get_all)) { 1062 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl); 1063 if (error == 0) 1064 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1065 } 1066 1067 if (!error && (get_procbased_ctls || get_all)) { 1068 error = vm_get_vmcs_field(ctx, vcpu, 1069 VMCS_PRI_PROC_BASED_CTLS, &ctl); 1070 if (error == 0) 1071 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 1072 } 1073 1074 if (!error && (get_procbased_ctls2 || get_all)) { 1075 error = vm_get_vmcs_field(ctx, vcpu, 1076 VMCS_SEC_PROC_BASED_CTLS, &ctl); 1077 if (error == 0) 1078 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl); 1079 } 1080 1081 if (!error && (get_vmcs_gla || get_all)) { 1082 error = vm_get_vmcs_field(ctx, vcpu, 1083 VMCS_GUEST_LINEAR_ADDRESS, &u64); 1084 if (error == 0) 1085 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64); 1086 } 1087 1088 if (!error && (get_vmcs_gpa || get_all)) { 1089 error = vm_get_vmcs_field(ctx, vcpu, 1090 VMCS_GUEST_PHYSICAL_ADDRESS, &u64); 1091 if (error == 0) 1092 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64); 1093 } 1094 1095 if (!error && (get_vmcs_entry_interruption_info || 1096 get_all)) { 1097 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64); 1098 if (error == 0) { 1099 printf("entry_interruption_info[%d]\t0x%016lx\n", 1100 vcpu, u64); 1101 } 1102 } 1103 1104 if (!error && (get_tpr_threshold || get_all)) { 1105 uint64_t threshold; 1106 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD, 1107 &threshold); 1108 if (error == 0) 1109 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold); 1110 } 1111 1112 if (!error && (get_inst_err || get_all)) { 1113 uint64_t insterr; 1114 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR, 1115 &insterr); 1116 if (error == 0) { 1117 printf("instruction_error[%d]\t0x%016lx\n", 1118 vcpu, insterr); 1119 } 1120 } 1121 1122 if (!error && (get_exit_ctls || get_all)) { 1123 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl); 1124 if (error == 0) 1125 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1126 } 1127 1128 if (!error && (get_entry_ctls || get_all)) { 1129 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl); 1130 if (error == 0) 1131 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1132 } 1133 1134 if (!error && (get_host_pat || get_all)) { 1135 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat); 1136 if (error == 0) 1137 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat); 1138 } 1139 1140 if (!error && (get_host_cr0 || get_all)) { 1141 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0); 1142 if (error == 0) 1143 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 1144 } 1145 1146 if (!error && (get_host_cr3 || get_all)) { 1147 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3); 1148 if (error == 0) 1149 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 1150 } 1151 1152 if (!error && (get_host_cr4 || get_all)) { 1153 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4); 1154 if (error == 0) 1155 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 1156 } 1157 1158 if (!error && (get_host_rip || get_all)) { 1159 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip); 1160 if (error == 0) 1161 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip); 1162 } 1163 1164 if (!error && (get_host_rsp || get_all)) { 1165 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp); 1166 if (error == 0) 1167 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 1168 } 1169 1170 if (!error && (get_vmcs_link || get_all)) { 1171 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr); 1172 if (error == 0) 1173 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr); 1174 } 1175 1176 if (!error && (get_vmcs_exit_interruption_info || get_all)) { 1177 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64); 1178 if (error == 0) { 1179 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n", 1180 vcpu, u64); 1181 } 1182 } 1183 1184 if (!error && (get_vmcs_exit_interruption_error || get_all)) { 1185 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE, 1186 &u64); 1187 if (error == 0) { 1188 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n", 1189 vcpu, u64); 1190 } 1191 } 1192 1193 if (!error && (get_vmcs_interruptibility || get_all)) { 1194 error = vm_get_vmcs_field(ctx, vcpu, 1195 VMCS_GUEST_INTERRUPTIBILITY, &u64); 1196 if (error == 0) { 1197 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n", 1198 vcpu, u64); 1199 } 1200 } 1201 1202 if (!error && (get_vmcs_exit_inst_length || get_all)) { 1203 error = vm_get_vmcs_field(ctx, vcpu, 1204 VMCS_EXIT_INSTRUCTION_LENGTH, &u64); 1205 if (error == 0) 1206 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, 1207 (uint32_t)u64); 1208 } 1209 1210 if (!error && (get_vmcs_exit_qualification || get_all)) { 1211 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, 1212 &u64); 1213 if (error == 0) 1214 printf("vmcs_exit_qualification[%d]\t0x%016lx\n", 1215 vcpu, u64); 1216 } 1217 1218 return (error); 1219} 1220 1221static int 1222get_misc_vmcb(struct vmctx *ctx, int vcpu) 1223{ 1224 uint64_t ctl, addr; 1225 int error = 0; 1226 1227 if (!error && (get_vmcb_intercept || get_all)) { 1228 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4, 1229 &ctl); 1230 if (error == 0) 1231 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1232 1233 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4, 1234 &ctl); 1235 if (error == 0) 1236 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1237 1238 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4, 1239 &ctl); 1240 if (error == 0) 1241 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1242 1243 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT, 1244 4, &ctl); 1245 if (error == 0) 1246 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1247 1248 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT, 1249 4, &ctl); 1250 if (error == 0) 1251 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1252 } 1253 1254 if (!error && (get_vmcb_tlb_ctrl || get_all)) { 1255 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL, 1256 4, &ctl); 1257 if (error == 0) 1258 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl); 1259 } 1260 1261 if (!error && (get_vmcb_exit_details || get_all)) { 1262 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1, 1263 8, &ctl); 1264 if (error == 0) 1265 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl); 1266 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2, 1267 8, &ctl); 1268 if (error == 0) 1269 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl); 1270 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO, 1271 8, &ctl); 1272 if (error == 0) 1273 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl); 1274 } 1275 1276 if (!error && (get_vmcb_virq || get_all)) { 1277 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ, 1278 8, &ctl); 1279 if (error == 0) 1280 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl); 1281 } 1282 1283 if (!error && (get_apic_access_addr || get_all)) { 1284 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8, 1285 &addr); 1286 if (error == 0) 1287 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr); 1288 } 1289 1290 if (!error && (get_virtual_apic_addr || get_all)) { 1291 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8, 1292 &addr); 1293 if (error == 0) 1294 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr); 1295 } 1296 1297 if (!error && (get_avic_table || get_all)) { 1298 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8, 1299 &addr); 1300 if (error == 0) 1301 printf("AVIC logical table[%d]\t0x%016lx\n", 1302 vcpu, addr); 1303 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8, 1304 &addr); 1305 if (error == 0) 1306 printf("AVIC physical table[%d]\t0x%016lx\n", 1307 vcpu, addr); 1308 } 1309 1310 return (error); 1311} 1312 1313static struct option * 1314setup_options(bool cpu_intel) 1315{ 1316 const struct option common_opts[] = { 1317 { "vm", REQ_ARG, 0, VMNAME }, 1318 { "cpu", REQ_ARG, 0, VCPU }, 1319 { "set-mem", REQ_ARG, 0, SET_MEM }, 1320 { "set-efer", REQ_ARG, 0, SET_EFER }, 1321 { "set-cr0", REQ_ARG, 0, SET_CR0 }, 1322 { "set-cr2", REQ_ARG, 0, SET_CR2 }, 1323 { "set-cr3", REQ_ARG, 0, SET_CR3 }, 1324 { "set-cr4", REQ_ARG, 0, SET_CR4 }, 1325 { "set-dr0", REQ_ARG, 0, SET_DR0 }, 1326 { "set-dr1", REQ_ARG, 0, SET_DR1 }, 1327 { "set-dr2", REQ_ARG, 0, SET_DR2 }, 1328 { "set-dr3", REQ_ARG, 0, SET_DR3 }, 1329 { "set-dr6", REQ_ARG, 0, SET_DR6 }, 1330 { "set-dr7", REQ_ARG, 0, SET_DR7 }, 1331 { "set-rsp", REQ_ARG, 0, SET_RSP }, 1332 { "set-rip", REQ_ARG, 0, SET_RIP }, 1333 { "set-rax", REQ_ARG, 0, SET_RAX }, 1334 { "set-rflags", REQ_ARG, 0, SET_RFLAGS }, 1335 { "desc-base", REQ_ARG, 0, DESC_BASE }, 1336 { "desc-limit", REQ_ARG, 0, DESC_LIMIT }, 1337 { "desc-access",REQ_ARG, 0, DESC_ACCESS }, 1338 { "set-cs", REQ_ARG, 0, SET_CS }, 1339 { "set-ds", REQ_ARG, 0, SET_DS }, 1340 { "set-es", REQ_ARG, 0, SET_ES }, 1341 { "set-fs", REQ_ARG, 0, SET_FS }, 1342 { "set-gs", REQ_ARG, 0, SET_GS }, 1343 { "set-ss", REQ_ARG, 0, SET_SS }, 1344 { "set-tr", REQ_ARG, 0, SET_TR }, 1345 { "set-ldtr", REQ_ARG, 0, SET_LDTR }, 1346 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE }, 1347 { "capname", REQ_ARG, 0, CAPNAME }, 1348 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV }, 1349 { "setcap", REQ_ARG, 0, SET_CAP }, 1350 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP }, 1351 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT }, 1352 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 }, 1353 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME }, 1354 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET }, 1355 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 }, 1356 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM }, 1357 { "getcap", NO_ARG, &getcap, 1 }, 1358 { "get-stats", NO_ARG, &get_stats, 1 }, 1359 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 }, 1360 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 }, 1361 { "get-desc-es",NO_ARG, &get_desc_es, 1 }, 1362 { "set-desc-es",NO_ARG, &set_desc_es, 1 }, 1363 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 }, 1364 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 }, 1365 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 }, 1366 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 }, 1367 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 }, 1368 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 }, 1369 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 }, 1370 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 }, 1371 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 }, 1372 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 }, 1373 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 }, 1374 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 }, 1375 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 }, 1376 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 }, 1377 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 }, 1378 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 }, 1379 { "get-memmap", NO_ARG, &get_memmap, 1 }, 1380 { "get-memseg", NO_ARG, &get_memseg, 1 }, 1381 { "get-efer", NO_ARG, &get_efer, 1 }, 1382 { "get-cr0", NO_ARG, &get_cr0, 1 }, 1383 { "get-cr2", NO_ARG, &get_cr2, 1 }, 1384 { "get-cr3", NO_ARG, &get_cr3, 1 }, 1385 { "get-cr4", NO_ARG, &get_cr4, 1 }, 1386 { "get-dr0", NO_ARG, &get_dr0, 1 }, 1387 { "get-dr1", NO_ARG, &get_dr1, 1 }, 1388 { "get-dr2", NO_ARG, &get_dr2, 1 }, 1389 { "get-dr3", NO_ARG, &get_dr3, 1 }, 1390 { "get-dr6", NO_ARG, &get_dr6, 1 }, 1391 { "get-dr7", NO_ARG, &get_dr7, 1 }, 1392 { "get-rsp", NO_ARG, &get_rsp, 1 }, 1393 { "get-rip", NO_ARG, &get_rip, 1 }, 1394 { "get-rax", NO_ARG, &get_rax, 1 }, 1395 { "get-rbx", NO_ARG, &get_rbx, 1 }, 1396 { "get-rcx", NO_ARG, &get_rcx, 1 }, 1397 { "get-rdx", NO_ARG, &get_rdx, 1 }, 1398 { "get-rsi", NO_ARG, &get_rsi, 1 }, 1399 { "get-rdi", NO_ARG, &get_rdi, 1 }, 1400 { "get-rbp", NO_ARG, &get_rbp, 1 }, 1401 { "get-r8", NO_ARG, &get_r8, 1 }, 1402 { "get-r9", NO_ARG, &get_r9, 1 }, 1403 { "get-r10", NO_ARG, &get_r10, 1 }, 1404 { "get-r11", NO_ARG, &get_r11, 1 }, 1405 { "get-r12", NO_ARG, &get_r12, 1 }, 1406 { "get-r13", NO_ARG, &get_r13, 1 }, 1407 { "get-r14", NO_ARG, &get_r14, 1 }, 1408 { "get-r15", NO_ARG, &get_r15, 1 }, 1409 { "get-rflags", NO_ARG, &get_rflags, 1 }, 1410 { "get-cs", NO_ARG, &get_cs, 1 }, 1411 { "get-ds", NO_ARG, &get_ds, 1 }, 1412 { "get-es", NO_ARG, &get_es, 1 }, 1413 { "get-fs", NO_ARG, &get_fs, 1 }, 1414 { "get-gs", NO_ARG, &get_gs, 1 }, 1415 { "get-ss", NO_ARG, &get_ss, 1 }, 1416 { "get-tr", NO_ARG, &get_tr, 1 }, 1417 { "get-ldtr", NO_ARG, &get_ldtr, 1 }, 1418 { "get-eptp", NO_ARG, &get_eptp, 1 }, 1419 { "get-exception-bitmap", 1420 NO_ARG, &get_exception_bitmap, 1 }, 1421 { "get-io-bitmap-address", 1422 NO_ARG, &get_io_bitmap, 1 }, 1423 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 }, 1424 { "get-msr-bitmap", 1425 NO_ARG, &get_msr_bitmap, 1 }, 1426 { "get-msr-bitmap-address", 1427 NO_ARG, &get_msr_bitmap_address, 1 }, 1428 { "get-guest-pat", NO_ARG, &get_guest_pat, 1 }, 1429 { "get-guest-sysenter", 1430 NO_ARG, &get_guest_sysenter, 1 }, 1431 { "get-exit-reason", 1432 NO_ARG, &get_exit_reason, 1 }, 1433 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 }, 1434 { "get-all", NO_ARG, &get_all, 1 }, 1435 { "run", NO_ARG, &run, 1 }, 1436 { "create", NO_ARG, &create, 1 }, 1437 { "destroy", NO_ARG, &destroy, 1 }, 1438 { "inject-nmi", NO_ARG, &inject_nmi, 1 }, 1439 { "force-reset", NO_ARG, &force_reset, 1 }, 1440 { "force-poweroff", NO_ARG, &force_poweroff, 1 }, 1441 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 }, 1442 { "get-suspended-cpus", NO_ARG, &get_suspended_cpus, 1 }, 1443 { "get-intinfo", NO_ARG, &get_intinfo, 1 }, 1444 { "get-cpu-topology", NO_ARG, &get_cpu_topology, 1 }, 1445 }; 1446 1447 const struct option intel_opts[] = { 1448 { "get-vmcs-pinbased-ctls", 1449 NO_ARG, &get_pinbased_ctls, 1 }, 1450 { "get-vmcs-procbased-ctls", 1451 NO_ARG, &get_procbased_ctls, 1 }, 1452 { "get-vmcs-procbased-ctls2", 1453 NO_ARG, &get_procbased_ctls2, 1 }, 1454 { "get-vmcs-guest-linear-address", 1455 NO_ARG, &get_vmcs_gla, 1 }, 1456 { "get-vmcs-guest-physical-address", 1457 NO_ARG, &get_vmcs_gpa, 1 }, 1458 { "get-vmcs-entry-interruption-info", 1459 NO_ARG, &get_vmcs_entry_interruption_info, 1}, 1460 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 }, 1461 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 }, 1462 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 }, 1463 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 }, 1464 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 }, 1465 { "get-vmcs-tpr-threshold", 1466 NO_ARG, &get_tpr_threshold, 1 }, 1467 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 }, 1468 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 }, 1469 { "get-vmcs-entry-ctls", 1470 NO_ARG, &get_entry_ctls, 1 }, 1471 { "get-vmcs-instruction-error", 1472 NO_ARG, &get_inst_err, 1 }, 1473 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 }, 1474 { "get-vmcs-host-cr0", 1475 NO_ARG, &get_host_cr0, 1 }, 1476 { "get-vmcs-exit-qualification", 1477 NO_ARG, &get_vmcs_exit_qualification, 1 }, 1478 { "get-vmcs-exit-inst-length", 1479 NO_ARG, &get_vmcs_exit_inst_length, 1 }, 1480 { "get-vmcs-interruptibility", 1481 NO_ARG, &get_vmcs_interruptibility, 1 }, 1482 { "get-vmcs-exit-interruption-error", 1483 NO_ARG, &get_vmcs_exit_interruption_error, 1 }, 1484 { "get-vmcs-exit-interruption-info", 1485 NO_ARG, &get_vmcs_exit_interruption_info, 1 }, 1486 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 }, 1487 { "get-vmcs-host-cr3", 1488 NO_ARG, &get_host_cr3, 1 }, 1489 { "get-vmcs-host-cr4", 1490 NO_ARG, &get_host_cr4, 1 }, 1491 { "get-vmcs-host-rip", 1492 NO_ARG, &get_host_rip, 1 }, 1493 { "get-vmcs-host-rsp", 1494 NO_ARG, &get_host_rsp, 1 }, 1495 { "get-apic-access-address", 1496 NO_ARG, &get_apic_access_addr, 1}, 1497 { "get-virtual-apic-address", 1498 NO_ARG, &get_virtual_apic_addr, 1} 1499 }; 1500 1501 const struct option amd_opts[] = { 1502 { "get-vmcb-intercepts", 1503 NO_ARG, &get_vmcb_intercept, 1 }, 1504 { "get-vmcb-asid", 1505 NO_ARG, &get_vpid_asid, 1 }, 1506 { "get-vmcb-exit-details", 1507 NO_ARG, &get_vmcb_exit_details, 1 }, 1508 { "get-vmcb-tlb-ctrl", 1509 NO_ARG, &get_vmcb_tlb_ctrl, 1 }, 1510 { "get-vmcb-virq", 1511 NO_ARG, &get_vmcb_virq, 1 }, 1512 { "get-avic-apic-bar", 1513 NO_ARG, &get_apic_access_addr, 1 }, 1514 { "get-avic-backing-page", 1515 NO_ARG, &get_virtual_apic_addr, 1 }, 1516 { "get-avic-table", 1517 NO_ARG, &get_avic_table, 1 } 1518 }; 1519 1520 const struct option null_opt = { 1521 NULL, 0, NULL, 0 1522 }; 1523 1524 struct option *all_opts; 1525 char *cp; 1526 int optlen; 1527 1528 optlen = sizeof(common_opts); 1529 1530 if (cpu_intel) 1531 optlen += sizeof(intel_opts); 1532 else 1533 optlen += sizeof(amd_opts); 1534 1535 optlen += sizeof(null_opt); 1536 1537 all_opts = malloc(optlen); 1538 1539 cp = (char *)all_opts; 1540 memcpy(cp, common_opts, sizeof(common_opts)); 1541 cp += sizeof(common_opts); 1542 1543 if (cpu_intel) { 1544 memcpy(cp, intel_opts, sizeof(intel_opts)); 1545 cp += sizeof(intel_opts); 1546 } else { 1547 memcpy(cp, amd_opts, sizeof(amd_opts)); 1548 cp += sizeof(amd_opts); 1549 } 1550 1551 memcpy(cp, &null_opt, sizeof(null_opt)); 1552 cp += sizeof(null_opt); 1553 1554 return (all_opts); 1555} 1556 1557static const char * 1558wday_str(int idx) 1559{ 1560 static const char *weekdays[] = { 1561 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" 1562 }; 1563 1564 if (idx >= 0 && idx < 7) 1565 return (weekdays[idx]); 1566 else 1567 return ("UNK"); 1568} 1569 1570static const char * 1571mon_str(int idx) 1572{ 1573 static const char *months[] = { 1574 "Jan", "Feb", "Mar", "Apr", "May", "Jun", 1575 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" 1576 }; 1577 1578 if (idx >= 0 && idx < 12) 1579 return (months[idx]); 1580 else 1581 return ("UNK"); 1582} 1583 1584static int 1585show_memmap(struct vmctx *ctx) 1586{ 1587 char name[SPECNAMELEN + 1], numbuf[8]; 1588 vm_ooffset_t segoff; 1589 vm_paddr_t gpa; 1590 size_t maplen, seglen; 1591 int error, flags, prot, segid, delim; 1592 1593 printf("Address Length Segment Offset "); 1594 printf("Prot Flags\n"); 1595 1596 gpa = 0; 1597 while (1) { 1598 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen, 1599 &prot, &flags); 1600 if (error) 1601 return (errno == ENOENT ? 0 : error); 1602 1603 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1604 if (error) 1605 return (error); 1606 1607 printf("%-12lX", gpa); 1608 humanize_number(numbuf, sizeof(numbuf), maplen, "B", 1609 HN_AUTOSCALE, HN_NOSPACE); 1610 printf("%-12s", numbuf); 1611 1612 printf("%-12s", name[0] ? name : "sysmem"); 1613 printf("%-12lX", segoff); 1614 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-', 1615 prot & PROT_WRITE ? 'W' : '-', 1616 prot & PROT_EXEC ? 'X' : '-'); 1617 1618 delim = '\0'; 1619 if (flags & VM_MEMMAP_F_WIRED) { 1620 printf("%cwired", delim); 1621 delim = '/'; 1622 } 1623 if (flags & VM_MEMMAP_F_IOMMU) { 1624 printf("%ciommu", delim); 1625 delim = '/'; 1626 } 1627 printf("\n"); 1628 1629 gpa += maplen; 1630 } 1631} 1632 1633static int 1634show_memseg(struct vmctx *ctx) 1635{ 1636 char name[SPECNAMELEN + 1], numbuf[8]; 1637 size_t seglen; 1638 int error, segid; 1639 1640 printf("ID Length Name\n"); 1641 1642 segid = 0; 1643 while (1) { 1644 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1645 if (error) 1646 return (errno == EINVAL ? 0 : error); 1647 1648 if (seglen) { 1649 printf("%-4d", segid); 1650 humanize_number(numbuf, sizeof(numbuf), seglen, "B", 1651 HN_AUTOSCALE, HN_NOSPACE); 1652 printf("%-12s", numbuf); 1653 printf("%s", name[0] ? name : "sysmem"); 1654 printf("\n"); 1655 } 1656 segid++; 1657 } 1658} 1659 1660int 1661main(int argc, char *argv[]) 1662{ 1663 char *vmname; 1664 int error, ch, vcpu, ptenum; 1665 vm_paddr_t gpa_pmap; 1666 struct vm_exit vmexit; 1667 uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 1668 uint64_t rsp, rip, rflags, efer, pat; 1669 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2]; 1670 struct vmctx *ctx; 1671 cpuset_t cpus; 1672 bool cpu_intel; 1673 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 1674 struct tm tm; 1675 struct option *opts; 1676 1677 cpu_intel = cpu_vendor_intel(); 1678 opts = setup_options(cpu_intel); 1679 1680 vcpu = 0; 1681 vmname = NULL; 1682 assert_lapic_lvt = -1; 1683 progname = basename(argv[0]); 1684 1685 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) { 1686 switch (ch) { 1687 case 0: 1688 break; 1689 case VMNAME: 1690 vmname = optarg; 1691 break; 1692 case VCPU: 1693 vcpu = atoi(optarg); 1694 break; 1695 case SET_MEM: 1696 memsize = atoi(optarg) * MB; 1697 memsize = roundup(memsize, 2 * MB); 1698 break; 1699 case SET_EFER: 1700 efer = strtoul(optarg, NULL, 0); 1701 set_efer = 1; 1702 break; 1703 case SET_CR0: 1704 cr0 = strtoul(optarg, NULL, 0); 1705 set_cr0 = 1; 1706 break; 1707 case SET_CR2: 1708 cr2 = strtoul(optarg, NULL, 0); 1709 set_cr2 = 1; 1710 break; 1711 case SET_CR3: 1712 cr3 = strtoul(optarg, NULL, 0); 1713 set_cr3 = 1; 1714 break; 1715 case SET_CR4: 1716 cr4 = strtoul(optarg, NULL, 0); 1717 set_cr4 = 1; 1718 break; 1719 case SET_DR0: 1720 dr0 = strtoul(optarg, NULL, 0); 1721 set_dr0 = 1; 1722 break; 1723 case SET_DR1: 1724 dr1 = strtoul(optarg, NULL, 0); 1725 set_dr1 = 1; 1726 break; 1727 case SET_DR2: 1728 dr2 = strtoul(optarg, NULL, 0); 1729 set_dr2 = 1; 1730 break; 1731 case SET_DR3: 1732 dr3 = strtoul(optarg, NULL, 0); 1733 set_dr3 = 1; 1734 break; 1735 case SET_DR6: 1736 dr6 = strtoul(optarg, NULL, 0); 1737 set_dr6 = 1; 1738 break; 1739 case SET_DR7: 1740 dr7 = strtoul(optarg, NULL, 0); 1741 set_dr7 = 1; 1742 break; 1743 case SET_RSP: 1744 rsp = strtoul(optarg, NULL, 0); 1745 set_rsp = 1; 1746 break; 1747 case SET_RIP: 1748 rip = strtoul(optarg, NULL, 0); 1749 set_rip = 1; 1750 break; 1751 case SET_RAX: 1752 rax = strtoul(optarg, NULL, 0); 1753 set_rax = 1; 1754 break; 1755 case SET_RFLAGS: 1756 rflags = strtoul(optarg, NULL, 0); 1757 set_rflags = 1; 1758 break; 1759 case DESC_BASE: 1760 desc_base = strtoul(optarg, NULL, 0); 1761 break; 1762 case DESC_LIMIT: 1763 desc_limit = strtoul(optarg, NULL, 0); 1764 break; 1765 case DESC_ACCESS: 1766 desc_access = strtoul(optarg, NULL, 0); 1767 break; 1768 case SET_CS: 1769 cs = strtoul(optarg, NULL, 0); 1770 set_cs = 1; 1771 break; 1772 case SET_DS: 1773 ds = strtoul(optarg, NULL, 0); 1774 set_ds = 1; 1775 break; 1776 case SET_ES: 1777 es = strtoul(optarg, NULL, 0); 1778 set_es = 1; 1779 break; 1780 case SET_FS: 1781 fs = strtoul(optarg, NULL, 0); 1782 set_fs = 1; 1783 break; 1784 case SET_GS: 1785 gs = strtoul(optarg, NULL, 0); 1786 set_gs = 1; 1787 break; 1788 case SET_SS: 1789 ss = strtoul(optarg, NULL, 0); 1790 set_ss = 1; 1791 break; 1792 case SET_TR: 1793 tr = strtoul(optarg, NULL, 0); 1794 set_tr = 1; 1795 break; 1796 case SET_LDTR: 1797 ldtr = strtoul(optarg, NULL, 0); 1798 set_ldtr = 1; 1799 break; 1800 case SET_X2APIC_STATE: 1801 x2apic_state = strtol(optarg, NULL, 0); 1802 set_x2apic_state = 1; 1803 break; 1804 case SET_CAP: 1805 capval = strtoul(optarg, NULL, 0); 1806 setcap = 1; 1807 break; 1808 case SET_RTC_TIME: 1809 rtc_secs = strtoul(optarg, NULL, 0); 1810 set_rtc_time = 1; 1811 break; 1812 case SET_RTC_NVRAM: 1813 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0); 1814 set_rtc_nvram = 1; 1815 break; 1816 case RTC_NVRAM_OFFSET: 1817 rtc_nvram_offset = strtoul(optarg, NULL, 0); 1818 break; 1819 case GET_GPA_PMAP: 1820 gpa_pmap = strtoul(optarg, NULL, 0); 1821 get_gpa_pmap = 1; 1822 break; 1823 case CAPNAME: 1824 capname = optarg; 1825 break; 1826 case UNASSIGN_PPTDEV: 1827 unassign_pptdev = 1; 1828 if (sscanf(optarg, "%d/%d/%d", &bus, &slot, &func) != 3) 1829 usage(cpu_intel); 1830 break; 1831 case ASSERT_LAPIC_LVT: 1832 assert_lapic_lvt = atoi(optarg); 1833 break; 1834 default: 1835 usage(cpu_intel); 1836 } 1837 } 1838 argc -= optind; 1839 argv += optind; 1840 1841 if (vmname == NULL) 1842 usage(cpu_intel); 1843 1844 error = 0; 1845 1846 if (!error && create) 1847 error = vm_create(vmname); 1848 1849 if (!error) { 1850 ctx = vm_open(vmname); 1851 if (ctx == NULL) { 1852 printf("VM:%s is not created.\n", vmname); 1853 exit (1); 1854 } 1855 } 1856 1857 if (!error && memsize) 1858 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL); 1859 1860 if (!error && set_efer) 1861 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer); 1862 1863 if (!error && set_cr0) 1864 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0); 1865 1866 if (!error && set_cr2) 1867 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR2, cr2); 1868 1869 if (!error && set_cr3) 1870 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3); 1871 1872 if (!error && set_cr4) 1873 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4); 1874 1875 if (!error && set_dr0) 1876 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0); 1877 1878 if (!error && set_dr1) 1879 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1); 1880 1881 if (!error && set_dr2) 1882 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2); 1883 1884 if (!error && set_dr3) 1885 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3); 1886 1887 if (!error && set_dr6) 1888 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6); 1889 1890 if (!error && set_dr7) 1891 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7); 1892 1893 if (!error && set_rsp) 1894 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp); 1895 1896 if (!error && set_rip) 1897 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip); 1898 1899 if (!error && set_rax) 1900 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax); 1901 1902 if (!error && set_rflags) { 1903 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 1904 rflags); 1905 } 1906 1907 if (!error && set_desc_ds) { 1908 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS, 1909 desc_base, desc_limit, desc_access); 1910 } 1911 1912 if (!error && set_desc_es) { 1913 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES, 1914 desc_base, desc_limit, desc_access); 1915 } 1916 1917 if (!error && set_desc_ss) { 1918 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS, 1919 desc_base, desc_limit, desc_access); 1920 } 1921 1922 if (!error && set_desc_cs) { 1923 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS, 1924 desc_base, desc_limit, desc_access); 1925 } 1926 1927 if (!error && set_desc_fs) { 1928 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS, 1929 desc_base, desc_limit, desc_access); 1930 } 1931 1932 if (!error && set_desc_gs) { 1933 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS, 1934 desc_base, desc_limit, desc_access); 1935 } 1936 1937 if (!error && set_desc_tr) { 1938 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR, 1939 desc_base, desc_limit, desc_access); 1940 } 1941 1942 if (!error && set_desc_ldtr) { 1943 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 1944 desc_base, desc_limit, desc_access); 1945 } 1946 1947 if (!error && set_desc_gdtr) { 1948 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 1949 desc_base, desc_limit, 0); 1950 } 1951 1952 if (!error && set_desc_idtr) { 1953 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 1954 desc_base, desc_limit, 0); 1955 } 1956 1957 if (!error && set_cs) 1958 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs); 1959 1960 if (!error && set_ds) 1961 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds); 1962 1963 if (!error && set_es) 1964 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es); 1965 1966 if (!error && set_fs) 1967 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs); 1968 1969 if (!error && set_gs) 1970 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs); 1971 1972 if (!error && set_ss) 1973 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss); 1974 1975 if (!error && set_tr) 1976 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr); 1977 1978 if (!error && set_ldtr) 1979 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr); 1980 1981 if (!error && set_x2apic_state) 1982 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state); 1983 1984 if (!error && unassign_pptdev) 1985 error = vm_unassign_pptdev(ctx, bus, slot, func); 1986 1987 if (!error && inject_nmi) { 1988 error = vm_inject_nmi(ctx, vcpu); 1989 } 1990 1991 if (!error && assert_lapic_lvt != -1) { 1992 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt); 1993 } 1994 1995 if (!error && (get_memseg || get_all)) 1996 error = show_memseg(ctx); 1997 1998 if (!error && (get_memmap || get_all)) 1999 error = show_memmap(ctx); 2000 2001 if (!error) 2002 error = get_all_registers(ctx, vcpu); 2003 2004 if (!error) 2005 error = get_all_segments(ctx, vcpu); 2006 2007 if (!error) { 2008 if (cpu_intel) 2009 error = get_misc_vmcs(ctx, vcpu); 2010 else 2011 error = get_misc_vmcb(ctx, vcpu); 2012 } 2013 2014 if (!error && (get_x2apic_state || get_all)) { 2015 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state); 2016 if (error == 0) 2017 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state); 2018 } 2019 2020 if (!error && (get_eptp || get_all)) { 2021 if (cpu_intel) 2022 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp); 2023 else 2024 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE, 2025 8, &eptp); 2026 if (error == 0) 2027 printf("%s[%d]\t\t0x%016lx\n", 2028 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp); 2029 } 2030 2031 if (!error && (get_exception_bitmap || get_all)) { 2032 if(cpu_intel) 2033 error = vm_get_vmcs_field(ctx, vcpu, 2034 VMCS_EXCEPTION_BITMAP, &bm); 2035 else 2036 error = vm_get_vmcb_field(ctx, vcpu, 2037 VMCB_OFF_EXC_INTERCEPT, 2038 4, &bm); 2039 if (error == 0) 2040 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm); 2041 } 2042 2043 if (!error && (get_io_bitmap || get_all)) { 2044 if (cpu_intel) { 2045 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A, 2046 &bm); 2047 if (error == 0) 2048 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm); 2049 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B, 2050 &bm); 2051 if (error == 0) 2052 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm); 2053 } else { 2054 error = vm_get_vmcb_field(ctx, vcpu, 2055 VMCB_OFF_IO_PERM, 8, &bm); 2056 if (error == 0) 2057 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm); 2058 } 2059 } 2060 2061 if (!error && (get_tsc_offset || get_all)) { 2062 uint64_t tscoff; 2063 if (cpu_intel) 2064 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET, 2065 &tscoff); 2066 else 2067 error = vm_get_vmcb_field(ctx, vcpu, 2068 VMCB_OFF_TSC_OFFSET, 2069 8, &tscoff); 2070 if (error == 0) 2071 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff); 2072 } 2073 2074 if (!error && (get_msr_bitmap_address || get_all)) { 2075 if (cpu_intel) 2076 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP, 2077 &addr); 2078 else 2079 error = vm_get_vmcb_field(ctx, vcpu, 2080 VMCB_OFF_MSR_PERM, 8, &addr); 2081 if (error == 0) 2082 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr); 2083 } 2084 2085 if (!error && (get_msr_bitmap || get_all)) { 2086 if (cpu_intel) { 2087 error = vm_get_vmcs_field(ctx, vcpu, 2088 VMCS_MSR_BITMAP, &addr); 2089 } else { 2090 error = vm_get_vmcb_field(ctx, vcpu, 2091 VMCB_OFF_MSR_PERM, 8, 2092 &addr); 2093 } 2094 2095 if (error == 0) 2096 error = dump_msr_bitmap(vcpu, addr, cpu_intel); 2097 } 2098 2099 if (!error && (get_vpid_asid || get_all)) { 2100 uint64_t vpid; 2101 if (cpu_intel) 2102 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid); 2103 else 2104 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID, 2105 4, &vpid); 2106 if (error == 0) 2107 printf("%s[%d]\t\t0x%04lx\n", 2108 cpu_intel ? "vpid" : "asid", vcpu, vpid); 2109 } 2110 2111 if (!error && (get_guest_pat || get_all)) { 2112 if (cpu_intel) 2113 error = vm_get_vmcs_field(ctx, vcpu, 2114 VMCS_GUEST_IA32_PAT, &pat); 2115 else 2116 error = vm_get_vmcb_field(ctx, vcpu, 2117 VMCB_OFF_GUEST_PAT, 8, &pat); 2118 if (error == 0) 2119 printf("guest_pat[%d]\t\t0x%016lx\n", vcpu, pat); 2120 } 2121 2122 if (!error && (get_guest_sysenter || get_all)) { 2123 if (cpu_intel) 2124 error = vm_get_vmcs_field(ctx, vcpu, 2125 VMCS_GUEST_IA32_SYSENTER_CS, 2126 &cs); 2127 else 2128 error = vm_get_vmcb_field(ctx, vcpu, 2129 VMCB_OFF_SYSENTER_CS, 8, 2130 &cs); 2131 2132 if (error == 0) 2133 printf("guest_sysenter_cs[%d]\t%#lx\n", vcpu, cs); 2134 if (cpu_intel) 2135 error = vm_get_vmcs_field(ctx, vcpu, 2136 VMCS_GUEST_IA32_SYSENTER_ESP, 2137 &rsp); 2138 else 2139 error = vm_get_vmcb_field(ctx, vcpu, 2140 VMCB_OFF_SYSENTER_ESP, 8, 2141 &rsp); 2142 2143 if (error == 0) 2144 printf("guest_sysenter_sp[%d]\t%#lx\n", vcpu, rsp); 2145 if (cpu_intel) 2146 error = vm_get_vmcs_field(ctx, vcpu, 2147 VMCS_GUEST_IA32_SYSENTER_EIP, 2148 &rip); 2149 else 2150 error = vm_get_vmcb_field(ctx, vcpu, 2151 VMCB_OFF_SYSENTER_EIP, 8, 2152 &rip); 2153 if (error == 0) 2154 printf("guest_sysenter_ip[%d]\t%#lx\n", vcpu, rip); 2155 } 2156 2157 if (!error && (get_exit_reason || get_all)) { 2158 if (cpu_intel) 2159 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON, 2160 &u64); 2161 else 2162 error = vm_get_vmcb_field(ctx, vcpu, 2163 VMCB_OFF_EXIT_REASON, 8, 2164 &u64); 2165 if (error == 0) 2166 printf("exit_reason[%d]\t%#lx\n", vcpu, u64); 2167 } 2168 2169 if (!error && setcap) { 2170 int captype; 2171 captype = vm_capability_name2type(capname); 2172 error = vm_set_capability(ctx, vcpu, captype, capval); 2173 if (error != 0 && errno == ENOENT) 2174 printf("Capability \"%s\" is not available\n", capname); 2175 } 2176 2177 if (!error && get_gpa_pmap) { 2178 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum); 2179 if (error == 0) { 2180 printf("gpa %#lx:", gpa_pmap); 2181 pte = &pteval[0]; 2182 while (ptenum-- > 0) 2183 printf(" %#lx", *pte++); 2184 printf("\n"); 2185 } 2186 } 2187 2188 if (!error && set_rtc_nvram) 2189 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value); 2190 2191 if (!error && (get_rtc_nvram || get_all)) { 2192 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value); 2193 if (error == 0) { 2194 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset, 2195 rtc_nvram_value); 2196 } 2197 } 2198 2199 if (!error && set_rtc_time) 2200 error = vm_rtc_settime(ctx, rtc_secs); 2201 2202 if (!error && (get_rtc_time || get_all)) { 2203 error = vm_rtc_gettime(ctx, &rtc_secs); 2204 if (error == 0) { 2205 gmtime_r(&rtc_secs, &tm); 2206 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n", 2207 rtc_secs, wday_str(tm.tm_wday), mon_str(tm.tm_mon), 2208 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, 2209 1900 + tm.tm_year); 2210 } 2211 } 2212 2213 if (!error && (getcap || get_all)) { 2214 int captype, val, getcaptype; 2215 2216 if (getcap && capname) 2217 getcaptype = vm_capability_name2type(capname); 2218 else 2219 getcaptype = -1; 2220 2221 for (captype = 0; captype < VM_CAP_MAX; captype++) { 2222 if (getcaptype >= 0 && captype != getcaptype) 2223 continue; 2224 error = vm_get_capability(ctx, vcpu, captype, &val); 2225 if (error == 0) { 2226 printf("Capability \"%s\" is %s on vcpu %d\n", 2227 vm_capability_type2name(captype), 2228 val ? "set" : "not set", vcpu); 2229 } else if (errno == ENOENT) { 2230 error = 0; 2231 printf("Capability \"%s\" is not available\n", 2232 vm_capability_type2name(captype)); 2233 } else { 2234 break; 2235 } 2236 } 2237 } 2238 2239 if (!error && (get_active_cpus || get_all)) { 2240 error = vm_active_cpus(ctx, &cpus); 2241 if (!error) 2242 print_cpus("active cpus", &cpus); 2243 } 2244 2245 if (!error && (get_suspended_cpus || get_all)) { 2246 error = vm_suspended_cpus(ctx, &cpus); 2247 if (!error) 2248 print_cpus("suspended cpus", &cpus); 2249 } 2250 2251 if (!error && (get_intinfo || get_all)) { 2252 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]); 2253 if (!error) { 2254 print_intinfo("pending", info[0]); 2255 print_intinfo("current", info[1]); 2256 } 2257 } 2258 2259 if (!error && (get_stats || get_all)) { 2260 int i, num_stats; 2261 uint64_t *stats; 2262 struct timeval tv; 2263 const char *desc; 2264 2265 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats); 2266 if (stats != NULL) { 2267 printf("vcpu%d stats:\n", vcpu); 2268 for (i = 0; i < num_stats; i++) { 2269 desc = vm_get_stat_desc(ctx, i); 2270 printf("%-40s\t%ld\n", desc, stats[i]); 2271 } 2272 } 2273 } 2274 2275 if (!error && (get_cpu_topology || get_all)) { 2276 uint16_t sockets, cores, threads, maxcpus; 2277 2278 vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus); 2279 printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, " 2280 "maxcpus=%hu\n", sockets, cores, threads, maxcpus); 2281 } 2282 2283 if (!error && run) { 2284 error = vm_run(ctx, vcpu, &vmexit); 2285 if (error == 0) 2286 dump_vm_run_exitcode(&vmexit, vcpu); 2287 else 2288 printf("vm_run error %d\n", error); 2289 } 2290 2291 if (!error && force_reset) 2292 error = vm_suspend(ctx, VM_SUSPEND_RESET); 2293 2294 if (!error && force_poweroff) 2295 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF); 2296 2297 if (error) 2298 printf("errno = %d\n", errno); 2299 2300 if (!error && destroy) 2301 vm_destroy(ctx); 2302 2303 free (opts); 2304 exit(error); 2305} 2306