1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1989, 1990 William F. Jolitz 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 36 * $FreeBSD$ 37 */ 38 39#ifndef _X86_SEGMENTS_H_ 40#define _X86_SEGMENTS_H_ 41 42/* 43 * X86 Segmentation Data Structures and definitions 44 */ 45 46/* 47 * Selectors 48 */ 49#define SEL_RPL_MASK 3 /* requester priv level */ 50#define ISPL(s) ((s)&3) /* priority level of a selector */ 51#define SEL_KPL 0 /* kernel priority level */ 52#define SEL_UPL 3 /* user priority level */ 53#define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */ 54#define SEL_LDT 4 /* local descriptor table */ 55#define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */ 56#define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */ 57#define GSEL(s,r) (((s)<<3) | r) /* a global selector */ 58 59/* 60 * User segment descriptors (%cs, %ds etc for i386 apps. 64 bit wide) 61 * For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl, 62 * sd_p, sd_l and sd_def32 which must be zero). %ds only has sd_p. 63 */ 64struct segment_descriptor { 65 unsigned sd_lolimit:16; /* segment extent (lsb) */ 66 unsigned sd_lobase:24; /* segment base address (lsb) */ 67 unsigned sd_type:5; /* segment type */ 68 unsigned sd_dpl:2; /* segment descriptor priority level */ 69 unsigned sd_p:1; /* segment descriptor present */ 70 unsigned sd_hilimit:4; /* segment extent (msb) */ 71 unsigned sd_xx:2; /* unused */ 72 unsigned sd_def32:1; /* default 32 vs 16 bit size */ 73 unsigned sd_gran:1; /* limit granularity (byte/page units)*/ 74 unsigned sd_hibase:8; /* segment base address (msb) */ 75} __packed; 76 77struct user_segment_descriptor { 78 unsigned sd_lolimit:16; /* segment extent (lsb) */ 79 unsigned sd_lobase:24; /* segment base address (lsb) */ 80 unsigned sd_type:5; /* segment type */ 81 unsigned sd_dpl:2; /* segment descriptor priority level */ 82 unsigned sd_p:1; /* segment descriptor present */ 83 unsigned sd_hilimit:4; /* segment extent (msb) */ 84 unsigned sd_xx:1; /* unused */ 85 unsigned sd_long:1; /* long mode (cs only) */ 86 unsigned sd_def32:1; /* default 32 vs 16 bit size */ 87 unsigned sd_gran:1; /* limit granularity (byte/page units)*/ 88 unsigned sd_hibase:8; /* segment base address (msb) */ 89} __packed; 90 91#define USD_GETBASE(sd) (((sd)->sd_lobase) | (sd)->sd_hibase << 24) 92#define USD_SETBASE(sd, b) (sd)->sd_lobase = (b); \ 93 (sd)->sd_hibase = ((b) >> 24); 94#define USD_GETLIMIT(sd) (((sd)->sd_lolimit) | (sd)->sd_hilimit << 16) 95#define USD_SETLIMIT(sd, l) (sd)->sd_lolimit = (l); \ 96 (sd)->sd_hilimit = ((l) >> 16); 97 98#ifdef __i386__ 99/* 100 * Gate descriptors (e.g. indirect descriptors) 101 */ 102struct gate_descriptor { 103 unsigned gd_looffset:16; /* gate offset (lsb) */ 104 unsigned gd_selector:16; /* gate segment selector */ 105 unsigned gd_stkcpy:5; /* number of stack wds to cpy */ 106 unsigned gd_xx:3; /* unused */ 107 unsigned gd_type:5; /* segment type */ 108 unsigned gd_dpl:2; /* segment descriptor priority level */ 109 unsigned gd_p:1; /* segment descriptor present */ 110 unsigned gd_hioffset:16; /* gate offset (msb) */ 111} __packed; 112 113/* 114 * Generic descriptor 115 */ 116union descriptor { 117 struct segment_descriptor sd; 118 struct gate_descriptor gd; 119}; 120#else 121/* 122 * Gate descriptors (e.g. indirect descriptors, trap, interrupt etc. 128 bit) 123 * Only interrupt and trap gates have gd_ist. 124 */ 125struct gate_descriptor { 126 uint64_t gd_looffset:16; /* gate offset (lsb) */ 127 uint64_t gd_selector:16; /* gate segment selector */ 128 uint64_t gd_ist:3; /* IST table index */ 129 uint64_t gd_xx:5; /* unused */ 130 uint64_t gd_type:5; /* segment type */ 131 uint64_t gd_dpl:2; /* segment descriptor priority level */ 132 uint64_t gd_p:1; /* segment descriptor present */ 133 uint64_t gd_hioffset:48; /* gate offset (msb) */ 134 uint64_t sd_xx1:32; 135} __packed; 136 137/* 138 * Generic descriptor 139 */ 140union descriptor { 141 struct user_segment_descriptor sd; 142 struct gate_descriptor gd; 143}; 144#endif 145 146 /* system segments and gate types */ 147#define SDT_SYSNULL 0 /* system null */ 148#define SDT_SYS286TSS 1 /* system 286 TSS available */ 149#define SDT_SYSLDT 2 /* system local descriptor table */ 150#define SDT_SYS286BSY 3 /* system 286 TSS busy */ 151#define SDT_SYS286CGT 4 /* system 286 call gate */ 152#define SDT_SYSTASKGT 5 /* system task gate */ 153#define SDT_SYS286IGT 6 /* system 286 interrupt gate */ 154#define SDT_SYS286TGT 7 /* system 286 trap gate */ 155#define SDT_SYSNULL2 8 /* system null again */ 156#define SDT_SYS386TSS 9 /* system 386 TSS available */ 157#define SDT_SYSTSS 9 /* system available 64 bit TSS */ 158#define SDT_SYSNULL3 10 /* system null again */ 159#define SDT_SYS386BSY 11 /* system 386 TSS busy */ 160#define SDT_SYSBSY 11 /* system busy 64 bit TSS */ 161#define SDT_SYS386CGT 12 /* system 386 call gate */ 162#define SDT_SYSCGT 12 /* system 64 bit call gate */ 163#define SDT_SYSNULL4 13 /* system null again */ 164#define SDT_SYS386IGT 14 /* system 386 interrupt gate */ 165#define SDT_SYSIGT 14 /* system 64 bit interrupt gate */ 166#define SDT_SYS386TGT 15 /* system 386 trap gate */ 167#define SDT_SYSTGT 15 /* system 64 bit trap gate */ 168 169 /* memory segment types */ 170#define SDT_MEMRO 16 /* memory read only */ 171#define SDT_MEMROA 17 /* memory read only accessed */ 172#define SDT_MEMRW 18 /* memory read write */ 173#define SDT_MEMRWA 19 /* memory read write accessed */ 174#define SDT_MEMROD 20 /* memory read only expand dwn limit */ 175#define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */ 176#define SDT_MEMRWD 22 /* memory read write expand dwn limit */ 177#define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed*/ 178#define SDT_MEME 24 /* memory execute only */ 179#define SDT_MEMEA 25 /* memory execute only accessed */ 180#define SDT_MEMER 26 /* memory execute read */ 181#define SDT_MEMERA 27 /* memory execute read accessed */ 182#define SDT_MEMEC 28 /* memory execute only conforming */ 183#define SDT_MEMEAC 29 /* memory execute only accessed conforming */ 184#define SDT_MEMERC 30 /* memory execute read conforming */ 185#define SDT_MEMERAC 31 /* memory execute read accessed conforming */ 186 187/* 188 * Size of IDT table 189 */ 190#define NIDT 256 /* 32 reserved, 0x80 syscall, most are h/w */ 191#define NRSVIDT 32 /* reserved entries for cpu exceptions */ 192 193/* 194 * Entries in the Interrupt Descriptor Table (IDT) 195 */ 196#define IDT_DE 0 /* #DE: Divide Error */ 197#define IDT_DB 1 /* #DB: Debug */ 198#define IDT_NMI 2 /* Nonmaskable External Interrupt */ 199#define IDT_BP 3 /* #BP: Breakpoint */ 200#define IDT_OF 4 /* #OF: Overflow */ 201#define IDT_BR 5 /* #BR: Bound Range Exceeded */ 202#define IDT_UD 6 /* #UD: Undefined/Invalid Opcode */ 203#define IDT_NM 7 /* #NM: No Math Coprocessor */ 204#define IDT_DF 8 /* #DF: Double Fault */ 205#define IDT_FPUGP 9 /* Coprocessor Segment Overrun */ 206#define IDT_TS 10 /* #TS: Invalid TSS */ 207#define IDT_NP 11 /* #NP: Segment Not Present */ 208#define IDT_SS 12 /* #SS: Stack Segment Fault */ 209#define IDT_GP 13 /* #GP: General Protection Fault */ 210#define IDT_PF 14 /* #PF: Page Fault */ 211#define IDT_MF 16 /* #MF: FPU Floating-Point Error */ 212#define IDT_AC 17 /* #AC: Alignment Check */ 213#define IDT_MC 18 /* #MC: Machine Check */ 214#define IDT_XF 19 /* #XF: SIMD Floating-Point Exception */ 215#define IDT_IO_INTS NRSVIDT /* Base of IDT entries for I/O interrupts. */ 216#define IDT_SYSCALL 0x80 /* System Call Interrupt Vector */ 217#define IDT_DTRACE_RET 0x92 /* DTrace pid provider Interrupt Vector */ 218#define IDT_EVTCHN 0x93 /* Xen HVM Event Channel Interrupt Vector */ 219 220#if defined(__i386__) 221/* 222 * Entries in the Global Descriptor Table (GDT) 223 * Note that each 4 entries share a single 32 byte L1 cache line. 224 * Some of the fast syscall instructions require a specific order here. 225 */ 226#define GNULL_SEL 0 /* Null Descriptor */ 227#define GPRIV_SEL 1 /* SMP Per-Processor Private Data */ 228#define GUFS_SEL 2 /* User %fs Descriptor (order critical: 1) */ 229#define GUGS_SEL 3 /* User %gs Descriptor (order critical: 2) */ 230#define GCODE_SEL 4 /* Kernel Code Descriptor (order critical: 1) */ 231#define GDATA_SEL 5 /* Kernel Data Descriptor (order critical: 2) */ 232#define GUCODE_SEL 6 /* User Code Descriptor (order critical: 3) */ 233#define GUDATA_SEL 7 /* User Data Descriptor (order critical: 4) */ 234#define GBIOSLOWMEM_SEL 8 /* BIOS low memory access (must be entry 8) */ 235#define GPROC0_SEL 9 /* Task state process slot zero and up */ 236#define GLDT_SEL 10 /* Default User LDT */ 237#define GUSERLDT_SEL 11 /* User LDT */ 238#define GPANIC_SEL 12 /* Task state to consider panic from */ 239#define GBIOSCODE32_SEL 13 /* BIOS interface (32bit Code) */ 240#define GBIOSCODE16_SEL 14 /* BIOS interface (16bit Code) */ 241#define GBIOSDATA_SEL 15 /* BIOS interface (Data) */ 242#define GBIOSUTIL_SEL 16 /* BIOS interface (Utility) */ 243#define GBIOSARGS_SEL 17 /* BIOS interface (Arguments) */ 244#define GNDIS_SEL 18 /* For the NDIS layer */ 245#define NGDT 19 246 247/* 248 * Entries in the Local Descriptor Table (LDT) 249 */ 250#define LSYS5CALLS_SEL 0 /* forced by intel BCS */ 251#define LSYS5SIGR_SEL 1 252#define LUCODE_SEL 3 253#define LUDATA_SEL 5 254#define NLDT (LUDATA_SEL + 1) 255 256#else /* !__i386__ */ 257/* 258 * Entries in the Global Descriptor Table (GDT) 259 */ 260#define GNULL_SEL 0 /* Null Descriptor */ 261#define GNULL2_SEL 1 /* Null Descriptor */ 262#define GUFS32_SEL 2 /* User 32 bit %fs Descriptor */ 263#define GUGS32_SEL 3 /* User 32 bit %gs Descriptor */ 264#define GCODE_SEL 4 /* Kernel Code Descriptor */ 265#define GDATA_SEL 5 /* Kernel Data Descriptor */ 266#define GUCODE32_SEL 6 /* User 32 bit code Descriptor */ 267#define GUDATA_SEL 7 /* User 32/64 bit Data Descriptor */ 268#define GUCODE_SEL 8 /* User 64 bit Code Descriptor */ 269#define GPROC0_SEL 9 /* TSS for entering kernel etc */ 270/* slot 10 is second half of GPROC0_SEL */ 271#define GUSERLDT_SEL 11 /* LDT */ 272/* slot 12 is second half of GUSERLDT_SEL */ 273#define NGDT 13 274#endif /* __i386__ */ 275 276#endif /* !_X86_SEGMENTS_H_ */ 277