1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2001 Jake Burkholder.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31#ifndef	_MACHINE_INTR_MACHDEP_H_
32#define	_MACHINE_INTR_MACHDEP_H_
33
34#define	IRSR_BUSY	(1 << 5)
35
36#define	PIL_MAX		(1 << 4)
37#define	IV_MAX		(1 << 11)
38
39#define	IR_FREE		(PIL_MAX * 2)
40
41#define	IH_SHIFT	PTR_SHIFT
42#define	IQE_SHIFT	5
43#define	IV_SHIFT	6
44
45#define	PIL_LOW		1	/* stray interrupts */
46#define	PIL_PREEMPT	2	/* preempt idle thread CPU IPI */
47#define	PIL_ITHREAD	3	/* interrupts that use ithreads */
48#define	PIL_RENDEZVOUS	4	/* SMP rendezvous IPI */
49#define	PIL_AST		5	/* asynchronous trap IPI */
50#define	PIL_HARDCLOCK	6	/* hardclock broadcast */
51#define	PIL_FILTER	11	/* filter interrupts */
52#define	PIL_BRIDGE	12	/* bridge interrupts */
53#define	PIL_STOP	13	/* stop CPU IPI */
54#define	PIL_TICK	14	/* tick interrupts */
55
56#ifndef LOCORE
57
58#define	INTR_BRIDGE	INTR_MD1
59
60struct trapframe;
61
62typedef	void ih_func_t(struct trapframe *);
63typedef	void iv_func_t(void *);
64
65struct intr_request {
66	struct	intr_request *ir_next;
67	iv_func_t *ir_func;
68	void	*ir_arg;
69	u_int	ir_vec;
70	u_int	ir_pri;
71};
72
73struct intr_controller {
74	void	(*ic_enable)(void *);
75	void	(*ic_disable)(void *);
76	void	(*ic_assign)(void *);
77	void	(*ic_clear)(void *);
78};
79
80struct intr_vector {
81	iv_func_t *iv_func;
82	void	*iv_arg;
83	const struct	intr_controller *iv_ic;
84	void	*iv_icarg;
85	struct	intr_event *iv_event;
86	u_int	iv_pri;
87	u_int	iv_vec;
88	u_int	iv_mid;
89	u_int	iv_refcnt;
90	u_int	iv_pad[2];
91};
92
93extern ih_func_t *intr_handlers[];
94extern struct intr_vector intr_vectors[];
95
96#ifdef SMP
97void	intr_add_cpu(u_int cpu);
98#endif
99int	intr_bind(int vec, u_char cpu);
100int	intr_describe(int vec, void *ih, const char *descr);
101void	intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
102	    void *iva);
103void	intr_init1(void);
104void	intr_init2(void);
105int	intr_controller_register(int vec, const struct intr_controller *ic,
106	    void *icarg);
107int	inthand_add(const char *name, int vec, int (*filt)(void *),
108	    void (*handler)(void *), void *arg, int flags, void **cookiep);
109int	inthand_remove(int vec, void *cookie);
110
111ih_func_t intr_fast;
112
113#endif /* !LOCORE */
114
115#endif /* !_MACHINE_INTR_MACHDEP_H_ */
116