1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * This header provides constants for DRA pinctrl bindings. 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6 * Author: Rajendra Nayak <rnayak@ti.com> 7 */ 8 9#ifndef _DT_BINDINGS_PINCTRL_DRA_H 10#define _DT_BINDINGS_PINCTRL_DRA_H 11 12/* DRA7 mux mode options for each pin. See TRM for options */ 13#define MUX_MODE0 0x0 14#define MUX_MODE1 0x1 15#define MUX_MODE2 0x2 16#define MUX_MODE3 0x3 17#define MUX_MODE4 0x4 18#define MUX_MODE5 0x5 19#define MUX_MODE6 0x6 20#define MUX_MODE7 0x7 21#define MUX_MODE8 0x8 22#define MUX_MODE9 0x9 23#define MUX_MODE10 0xa 24#define MUX_MODE11 0xb 25#define MUX_MODE12 0xc 26#define MUX_MODE13 0xd 27#define MUX_MODE14 0xe 28#define MUX_MODE15 0xf 29 30/* Certain pins need virtual mode, but note: they may glitch */ 31#define MUX_VIRTUAL_MODE0 (MODE_SELECT | (0x0 << 4)) 32#define MUX_VIRTUAL_MODE1 (MODE_SELECT | (0x1 << 4)) 33#define MUX_VIRTUAL_MODE2 (MODE_SELECT | (0x2 << 4)) 34#define MUX_VIRTUAL_MODE3 (MODE_SELECT | (0x3 << 4)) 35#define MUX_VIRTUAL_MODE4 (MODE_SELECT | (0x4 << 4)) 36#define MUX_VIRTUAL_MODE5 (MODE_SELECT | (0x5 << 4)) 37#define MUX_VIRTUAL_MODE6 (MODE_SELECT | (0x6 << 4)) 38#define MUX_VIRTUAL_MODE7 (MODE_SELECT | (0x7 << 4)) 39#define MUX_VIRTUAL_MODE8 (MODE_SELECT | (0x8 << 4)) 40#define MUX_VIRTUAL_MODE9 (MODE_SELECT | (0x9 << 4)) 41#define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4)) 42#define MUX_VIRTUAL_MODE11 (MODE_SELECT | (0xb << 4)) 43#define MUX_VIRTUAL_MODE12 (MODE_SELECT | (0xc << 4)) 44#define MUX_VIRTUAL_MODE13 (MODE_SELECT | (0xd << 4)) 45#define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4)) 46#define MUX_VIRTUAL_MODE15 (MODE_SELECT | (0xf << 4)) 47 48#define MODE_SELECT (1 << 8) 49 50#define PULL_ENA (0 << 16) 51#define PULL_DIS (1 << 16) 52#define PULL_UP (1 << 17) 53#define INPUT_EN (1 << 18) 54#define SLEWCONTROL (1 << 19) 55#define WAKEUP_EN (1 << 24) 56#define WAKEUP_EVENT (1 << 25) 57 58/* Active pin states */ 59#define PIN_OUTPUT (0 | PULL_DIS) 60#define PIN_OUTPUT_PULLUP (PULL_UP) 61#define PIN_OUTPUT_PULLDOWN (0) 62#define PIN_INPUT (INPUT_EN | PULL_DIS) 63#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) 64#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 65#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 66 67/* 68 * Macro to allow using the absolute physical address instead of the 69 * padconf registers instead of the offset from padconf base. 70 */ 71#define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val) 72 73/* DRA7 IODELAY configuration parameters */ 74#define A_DELAY_PS(val) ((val) & 0xffff) 75#define G_DELAY_PS(val) ((val) & 0xffff) 76#endif 77 78