1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifdef HAVE_KERNEL_OPTION_HEADERS
30#include "opt_snd.h"
31#endif
32
33#include <dev/sound/pcm/sound.h>
34#include <dev/sound/pcm/ac97.h>
35#include <dev/sound/pci/aureal.h>
36
37#include <dev/pci/pcireg.h>
38#include <dev/pci/pcivar.h>
39
40SND_DECLARE_FILE("$FreeBSD$");
41
42/* PCI IDs of supported chips */
43#define AU8820_PCI_ID 0x000112eb
44
45/* channel interface */
46static u_int32_t au_playfmt[] = {
47	SND_FORMAT(AFMT_U8, 1, 0),
48	SND_FORMAT(AFMT_U8, 2, 0),
49	SND_FORMAT(AFMT_S16_LE, 1, 0),
50	SND_FORMAT(AFMT_S16_LE, 2, 0),
51	0
52};
53static struct pcmchan_caps au_playcaps = {4000, 48000, au_playfmt, 0};
54
55static u_int32_t au_recfmt[] = {
56	SND_FORMAT(AFMT_U8, 1, 0),
57	SND_FORMAT(AFMT_U8, 2, 0),
58	SND_FORMAT(AFMT_S16_LE, 1, 0),
59	SND_FORMAT(AFMT_S16_LE, 2, 0),
60	0
61};
62static struct pcmchan_caps au_reccaps = {4000, 48000, au_recfmt, 0};
63
64/* -------------------------------------------------------------------- */
65
66struct au_info;
67
68struct au_chinfo {
69	struct au_info *parent;
70	struct pcm_channel *channel;
71	struct snd_dbuf *buffer;
72	int dir;
73};
74
75struct au_info {
76	int unit;
77
78	bus_space_tag_t st[3];
79	bus_space_handle_t sh[3];
80
81	bus_dma_tag_t	parent_dmat;
82	struct mtx *lock;
83
84	u_int32_t	x[32], y[128];
85	char		z[128];
86	u_int32_t	routes[4], interrupts;
87	struct au_chinfo pch;
88};
89
90static int      au_init(device_t dev, struct au_info *au);
91static void     au_intr(void *);
92
93/* -------------------------------------------------------------------- */
94
95static u_int32_t
96au_rd(struct au_info *au, int mapno, int regno, int size)
97{
98	switch(size) {
99	case 1:
100		return bus_space_read_1(au->st[mapno], au->sh[mapno], regno);
101	case 2:
102		return bus_space_read_2(au->st[mapno], au->sh[mapno], regno);
103	case 4:
104		return bus_space_read_4(au->st[mapno], au->sh[mapno], regno);
105	default:
106		return 0xffffffff;
107	}
108}
109
110static void
111au_wr(struct au_info *au, int mapno, int regno, u_int32_t data, int size)
112{
113	switch(size) {
114	case 1:
115		bus_space_write_1(au->st[mapno], au->sh[mapno], regno, data);
116		break;
117	case 2:
118		bus_space_write_2(au->st[mapno], au->sh[mapno], regno, data);
119		break;
120	case 4:
121		bus_space_write_4(au->st[mapno], au->sh[mapno], regno, data);
122		break;
123	}
124}
125
126/* -------------------------------------------------------------------- */
127
128static int
129au_rdcd(kobj_t obj, void *arg, int regno)
130{
131	struct au_info *au = (struct au_info *)arg;
132	int i=0, j=0;
133
134	regno<<=16;
135	au_wr(au, 0, AU_REG_CODECIO, regno, 4);
136	while (j<50) {
137		i=au_rd(au, 0, AU_REG_CODECIO, 4);
138		if ((i & 0x00ff0000) == (regno | 0x00800000)) break;
139		DELAY(j * 200 + 2000);
140		j++;
141	}
142	if (j==50) printf("pcm%d: codec timeout reading register %x (%x)\n",
143		au->unit, (regno & AU_CDC_REGMASK)>>16, i);
144	return i & AU_CDC_DATAMASK;
145}
146
147static int
148au_wrcd(kobj_t obj, void *arg, int regno, u_int32_t data)
149{
150	struct au_info *au = (struct au_info *)arg;
151	int i, j, tries;
152	i=j=tries=0;
153	do {
154		while (j<50 && (i & AU_CDC_WROK) == 0) {
155			i=au_rd(au, 0, AU_REG_CODECST, 4);
156			DELAY(2000);
157			j++;
158		}
159		if (j==50) printf("codec timeout during write of register %x, data %x\n",
160				  regno, data);
161		au_wr(au, 0, AU_REG_CODECIO, (regno<<16) | AU_CDC_REGSET | data, 4);
162/*		DELAY(20000);
163		i=au_rdcd(au, regno);
164*/		tries++;
165	} while (0); /* (i != data && tries < 3); */
166	/*
167	if (tries == 3) printf("giving up writing 0x%4x to codec reg %2x\n", data, regno);
168	*/
169
170	return 0;
171}
172
173static kobj_method_t au_ac97_methods[] = {
174    	KOBJMETHOD(ac97_read,		au_rdcd),
175    	KOBJMETHOD(ac97_write,		au_wrcd),
176	KOBJMETHOD_END
177};
178AC97_DECLARE(au_ac97);
179
180/* -------------------------------------------------------------------- */
181
182static void
183au_setbit(u_int32_t *p, char bit, u_int32_t value)
184{
185	p += bit >> 5;
186	bit &= 0x1f;
187	*p &= ~ (1 << bit);
188	*p |= (value << bit);
189}
190
191static void
192au_addroute(struct au_info *au, int a, int b, int route)
193{
194	int j = 0x1099c+(a<<2);
195	if (au->x[a] != a+0x67) j = AU_REG_RTBASE+(au->x[a]<<2);
196
197	au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xffffffff, 4);
198 	au_wr(au, 0, j, route | (b<<7), 4);
199	au->y[route]=au->x[a];
200	au->x[a]=route;
201	au->z[route]=a & 0x000000ff;
202	au_setbit(au->routes, route, 1);
203}
204
205static void
206au_delroute(struct au_info *au, int route)
207{
208	int i;
209	int j=au->z[route];
210
211	au_setbit(au->routes, route, 0);
212	au->z[route]=0x1f;
213	i=au_rd(au, 0, AU_REG_RTBASE+(route<<2), 4);
214	au_wr(au, 0, AU_REG_RTBASE+(au->y[route]<<2), i, 4);
215	au->y[i & 0x7f]=au->y[route];
216	au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xfffffffe, 4);
217	if (au->x[j] == route) au->x[j]=au->y[route];
218	au->y[route]=0x7f;
219}
220
221static void
222au_encodec(struct au_info *au, char channel)
223{
224	au_wr(au, 0, AU_REG_CODECEN,
225	      au_rd(au, 0, AU_REG_CODECEN, 4) | (1 << (channel + 8)), 4);
226}
227
228static void
229au_clrfifo(struct au_info *au, u_int32_t c)
230{
231	u_int32_t i;
232
233	for (i=0; i<32; i++) au_wr(au, 0, AU_REG_FIFOBASE+(c<<7)+(i<<2), 0, 4);
234}
235
236static void
237au_setadb(struct au_info *au, u_int32_t c, u_int32_t enable)
238{
239	int x;
240
241	x = au_rd(au, 0, AU_REG_ADB, 4);
242	x &= ~(1 << c);
243	x |= (enable << c);
244	au_wr(au, 0, AU_REG_ADB, x, 4);
245}
246
247static void
248au_prepareoutput(struct au_chinfo *ch, u_int32_t format)
249{
250	struct au_info *au = ch->parent;
251	int i, stereo = (AFMT_CHANNEL(format) > 1)? 1 : 0;
252	u_int32_t baseaddr = sndbuf_getbufaddr(ch->buffer);
253
254	au_wr(au, 0, 0x1061c, 0, 4);
255	au_wr(au, 0, 0x10620, 0, 4);
256	au_wr(au, 0, 0x10624, 0, 4);
257	switch(AFMT_ENCODING(format)) {
258		case 1:
259			i=0xb000;
260			break;
261		case 2:
262			i=0xf000;
263			break;
264 		case 8:
265			i=0x7000;
266			break;
267		case 16:
268			i=0x23000;
269			break;
270		default:
271			i=0x3000;
272	}
273	au_wr(au, 0, 0x10200, baseaddr, 4);
274	au_wr(au, 0, 0x10204, baseaddr+0x1000, 4);
275	au_wr(au, 0, 0x10208, baseaddr+0x2000, 4);
276	au_wr(au, 0, 0x1020c, baseaddr+0x3000, 4);
277
278	au_wr(au, 0, 0x10400, 0xdeffffff, 4);
279	au_wr(au, 0, 0x10404, 0xfcffffff, 4);
280
281	au_wr(au, 0, 0x10580, i, 4);
282
283	au_wr(au, 0, 0x10210, baseaddr, 4);
284	au_wr(au, 0, 0x10214, baseaddr+0x1000, 4);
285	au_wr(au, 0, 0x10218, baseaddr+0x2000, 4);
286	au_wr(au, 0, 0x1021c, baseaddr+0x3000, 4);
287
288	au_wr(au, 0, 0x10408, 0x00fff000 | 0x56000000 | 0x00000fff, 4);
289	au_wr(au, 0, 0x1040c, 0x00fff000 | 0x74000000 | 0x00000fff, 4);
290
291	au_wr(au, 0, 0x10584, i, 4);
292
293	au_wr(au, 0, 0x0f800, stereo? 0x00030032 : 0x00030030, 4);
294	au_wr(au, 0, 0x0f804, stereo? 0x00030032 : 0x00030030, 4);
295
296	au_addroute(au, 0x11, 0, 0x58);
297	au_addroute(au, 0x11, stereo? 0 : 1, 0x59);
298}
299
300/* -------------------------------------------------------------------- */
301/* channel interface */
302static void *
303auchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
304{
305	struct au_info *au = devinfo;
306	struct au_chinfo *ch = (dir == PCMDIR_PLAY)? &au->pch : NULL;
307
308	ch->parent = au;
309	ch->channel = c;
310	ch->buffer = b;
311	ch->dir = dir;
312	if (sndbuf_alloc(ch->buffer, au->parent_dmat, 0, AU_BUFFSIZE) != 0)
313		return NULL;
314	return ch;
315}
316
317static int
318auchan_setformat(kobj_t obj, void *data, u_int32_t format)
319{
320	struct au_chinfo *ch = data;
321
322	if (ch->dir == PCMDIR_PLAY) au_prepareoutput(ch, format);
323	return 0;
324}
325
326static int
327auchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
328{
329	struct au_chinfo *ch = data;
330	if (ch->dir == PCMDIR_PLAY) {
331	} else {
332	}
333	return speed;
334}
335
336static int
337auchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
338{
339	return blocksize;
340}
341
342static int
343auchan_trigger(kobj_t obj, void *data, int go)
344{
345	struct au_chinfo *ch = data;
346	struct au_info *au = ch->parent;
347
348	if (!PCMTRIG_COMMON(go))
349		return 0;
350
351	if (ch->dir == PCMDIR_PLAY) {
352		au_setadb(au, 0x11, (go)? 1 : 0);
353		if (go != PCMTRIG_START) {
354			au_wr(au, 0, 0xf800, 0, 4);
355			au_wr(au, 0, 0xf804, 0, 4);
356			au_delroute(au, 0x58);
357			au_delroute(au, 0x59);
358		}
359	} else {
360	}
361	return 0;
362}
363
364static int
365auchan_getptr(kobj_t obj, void *data)
366{
367	struct au_chinfo *ch = data;
368	struct au_info *au = ch->parent;
369	if (ch->dir == PCMDIR_PLAY) {
370		return au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1);
371	} else {
372		return 0;
373	}
374}
375
376static struct pcmchan_caps *
377auchan_getcaps(kobj_t obj, void *data)
378{
379	struct au_chinfo *ch = data;
380	return (ch->dir == PCMDIR_PLAY)? &au_playcaps : &au_reccaps;
381}
382
383static kobj_method_t auchan_methods[] = {
384    	KOBJMETHOD(channel_init,		auchan_init),
385    	KOBJMETHOD(channel_setformat,		auchan_setformat),
386    	KOBJMETHOD(channel_setspeed,		auchan_setspeed),
387    	KOBJMETHOD(channel_setblocksize,	auchan_setblocksize),
388    	KOBJMETHOD(channel_trigger,		auchan_trigger),
389    	KOBJMETHOD(channel_getptr,		auchan_getptr),
390    	KOBJMETHOD(channel_getcaps,		auchan_getcaps),
391	KOBJMETHOD_END
392};
393CHANNEL_DECLARE(auchan);
394
395/* -------------------------------------------------------------------- */
396/* The interrupt handler */
397static void
398au_intr (void *p)
399{
400	struct au_info *au = p;
401	u_int32_t	intsrc, i;
402
403	au->interrupts++;
404	intsrc=au_rd(au, 0, AU_REG_IRQSRC, 4);
405	printf("pcm%d: interrupt with src %x\n", au->unit, intsrc);
406	if (intsrc & AU_IRQ_FATAL) printf("pcm%d: fatal error irq\n", au->unit);
407	if (intsrc & AU_IRQ_PARITY) printf("pcm%d: parity error irq\n", au->unit);
408	if (intsrc & AU_IRQ_UNKNOWN) {
409		(void)au_rd(au, 0, AU_REG_UNK1, 4);
410		au_wr(au, 0, AU_REG_UNK1, 0, 4);
411		au_wr(au, 0, AU_REG_UNK1, 0x10000, 4);
412	}
413	if (intsrc & AU_IRQ_PCMOUT) {
414	       	i=au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1);
415	       	chn_intr(au->pch.channel);
416		(void)au_rd(au, 0, AU_REG_UNK3, 4);
417		(void)au_rd(au, 0, AU_REG_UNK4, 4);
418		(void)au_rd(au, 0, AU_REG_UNK5, 4);
419	}
420/* don't support midi
421	if (intsrc & AU_IRQ_MIDI) {
422		i=au_rd(au, 0, 0x11004, 4);
423		j=10;
424		while (i & 0xff) {
425			if (j-- <= 0) break;
426			i=au_rd(au, 0, 0x11000, 4);
427			if ((au->midi_stat & 1) && (au->midi_out))
428				au->midi_out(au->midi_devno, i);
429			i=au_rd(au, 0, 0x11004);
430		}
431	}
432*/
433	au_wr(au, 0, AU_REG_IRQSRC, intsrc & 0x7ff, 4);
434	au_rd(au, 0, AU_REG_IRQSRC, 4);
435}
436
437
438/* -------------------------------------------------------------------- */
439
440/* Probe and attach the card */
441
442static int
443au_init(device_t dev, struct au_info *au)
444{
445	u_int32_t	i, j;
446
447	au_wr(au, 0, AU_REG_IRQGLOB, 0xffffffff, 4);
448	DELAY(100000);
449
450	/* init codec */
451	/* cold reset */
452	for (i=0; i<32; i++) {
453		au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4);
454		DELAY(10000);
455	}
456	if (1) {
457		au_wr(au, 0, AU_REG_CODECST, 0x8068, 4);
458		DELAY(10000);
459		au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4);
460		DELAY(10000);
461	} else {
462		au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4);
463 		DELAY(100000);
464		au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4);
465		DELAY(100000);
466		au_wr(au, 0, AU_REG_CODECST, 0x80e8, 4);
467		DELAY(100000);
468		au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4);
469		DELAY(100000);
470		au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4);
471		DELAY(100000);
472		au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4);
473		DELAY(100000);
474	}
475
476	/* init */
477	for (i=0; i<32; i++) {
478		au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4);
479		DELAY(10000);
480	}
481	au_wr(au, 0, AU_REG_CODECST, 0xe8, 4);
482	DELAY(10000);
483	au_wr(au, 0, AU_REG_CODECEN, 0, 4);
484
485	/* setup codec */
486	i=j=0;
487	while (j<100 && (i & AU_CDC_READY)==0) {
488		i=au_rd(au, 0, AU_REG_CODECST, 4);
489		DELAY(1000);
490		j++;
491	}
492	if (j==100) device_printf(dev, "codec not ready, status 0x%x\n", i);
493
494   	/* init adb */
495	/*au->x5c=0;*/
496	for (i=0; i<32;  i++) au->x[i]=i+0x67;
497	for (i=0; i<128; i++) au->y[i]=0x7f;
498	for (i=0; i<128; i++) au->z[i]=0x1f;
499	au_wr(au, 0, AU_REG_ADB, 0, 4);
500	for (i=0; i<124; i++) au_wr(au, 0, AU_REG_RTBASE+(i<<2), 0xffffffff, 4);
501
502	/* test */
503	i=au_rd(au, 0, 0x107c0, 4);
504 	if (i!=0xdeadbeef) device_printf(dev, "dma check failed: 0x%x\n", i);
505
506	/* install mixer */
507	au_wr(au, 0, AU_REG_IRQGLOB,
508	      au_rd(au, 0, AU_REG_IRQGLOB, 4) | AU_IRQ_ENABLE, 4);
509	/* braindead but it's what the oss/linux driver does
510	 * for (i=0; i<0x80000000; i++) au_wr(au, 0, i<<2, 0, 4);
511	 */
512	au->routes[0]=au->routes[1]=au->routes[2]=au->routes[3]=0;
513	/*au->x1e4=0;*/
514
515	/* attach channel */
516	au_addroute(au, 0x11, 0x48, 0x02);
517	au_addroute(au, 0x11, 0x49, 0x03);
518	au_encodec(au, 0);
519	au_encodec(au, 1);
520
521	for (i=0; i<48; i++) au_wr(au, 0, 0xf800+(i<<2), 0x20, 4);
522	for (i=2; i<6; i++) au_wr(au, 0, 0xf800+(i<<2), 0, 4);
523	au_wr(au, 0, 0xf8c0, 0x0843, 4);
524	for (i=0; i<4; i++) au_clrfifo(au, i);
525
526	return (0);
527}
528
529static int
530au_testirq(struct au_info *au)
531{
532	au_wr(au, 0, AU_REG_UNK1, 0x80001000, 4);
533	au_wr(au, 0, AU_REG_IRQEN, 0x00001030, 4);
534	au_wr(au, 0, AU_REG_IRQSRC, 0x000007ff, 4);
535	DELAY(1000000);
536	if (au->interrupts==0) printf("pcm%d: irq test failed\n", au->unit);
537	/* this apparently generates an irq */
538	return 0;
539}
540
541static int
542au_pci_probe(device_t dev)
543{
544	if (pci_get_devid(dev) == AU8820_PCI_ID) {
545		device_set_desc(dev, "Aureal Vortex 8820");
546		return BUS_PROBE_DEFAULT;
547	}
548
549	return ENXIO;
550}
551
552static int
553au_pci_attach(device_t dev)
554{
555	struct au_info *au;
556	int		type[10];
557	int		regid[10];
558	struct resource *reg[10];
559	int		i, j, mapped = 0;
560	int		irqid;
561	struct resource *irq;
562	void		*ih;
563	struct ac97_info *codec;
564	char 		status[SND_STATUSLEN];
565
566	au = malloc(sizeof(*au), M_DEVBUF, M_WAITOK | M_ZERO);
567	au->unit = device_get_unit(dev);
568
569	pci_enable_busmaster(dev);
570
571	irq = NULL;
572	ih = NULL;
573	j=0;
574	/* XXX dfr: is this strictly necessary? */
575	for (i=0; i<PCI_MAXMAPS_0; i++) {
576#if 0
577		/* Slapped wrist: config_id and map are private structures */
578		if (bootverbose) {
579			printf("pcm%d: map %d - allocating ", unit, i+1);
580			printf("0x%x bytes of ", 1<<config_id->map[i].ln2size);
581			printf("%s space ", (config_id->map[i].type & PCI_MAPPORT)?
582					    "io" : "memory");
583			printf("at 0x%x...", config_id->map[i].base);
584		}
585#endif
586		regid[j] = PCIR_BAR(i);
587		type[j] = SYS_RES_MEMORY;
588		reg[j] = bus_alloc_resource_any(dev, type[j], &regid[j],
589						RF_ACTIVE);
590		if (!reg[j]) {
591			type[j] = SYS_RES_IOPORT;
592			reg[j] = bus_alloc_resource_any(dev, type[j],
593							&regid[j], RF_ACTIVE);
594		}
595		if (reg[j]) {
596			au->st[i] = rman_get_bustag(reg[j]);
597			au->sh[i] = rman_get_bushandle(reg[j]);
598			mapped++;
599		}
600#if 0
601		if (bootverbose) printf("%s\n", mapped? "ok" : "failed");
602#endif
603		if (mapped) j++;
604		if (j == 10) {
605			/* XXX */
606			device_printf(dev, "too many resources");
607			goto bad;
608		}
609	}
610
611#if 0
612	if (j < config_id->nummaps) {
613		printf("pcm%d: unable to map a required resource\n", unit);
614		free(au, M_DEVBUF);
615		return;
616	}
617#endif
618
619	au_wr(au, 0, AU_REG_IRQEN, 0, 4);
620
621	irqid = 0;
622	irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &irqid,
623				     RF_ACTIVE | RF_SHAREABLE);
624	if (!irq || snd_setup_intr(dev, irq, 0, au_intr, au, &ih)) {
625		device_printf(dev, "unable to map interrupt\n");
626		goto bad;
627	}
628
629	if (au_testirq(au)) device_printf(dev, "irq test failed\n");
630
631	if (au_init(dev, au) == -1) {
632		device_printf(dev, "unable to initialize the card\n");
633		goto bad;
634	}
635
636	codec = AC97_CREATE(dev, au, au_ac97);
637	if (codec == NULL) goto bad;
638	if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
639
640	if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
641		/*boundary*/0,
642		/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
643		/*highaddr*/BUS_SPACE_MAXADDR,
644		/*filter*/NULL, /*filterarg*/NULL,
645		/*maxsize*/AU_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
646		/*flags*/0, /*lockfunc*/busdma_lock_mutex,
647		/*lockarg*/&Giant, &au->parent_dmat) != 0) {
648		device_printf(dev, "unable to create dma tag\n");
649		goto bad;
650	}
651
652	snprintf(status, SND_STATUSLEN, "at %s 0x%jx irq %jd %s",
653		 (type[0] == SYS_RES_IOPORT)? "io" : "memory",
654		 rman_get_start(reg[0]), rman_get_start(irq),PCM_KLDSTRING(snd_aureal));
655
656	if (pcm_register(dev, au, 1, 1)) goto bad;
657	/* pcm_addchan(dev, PCMDIR_REC, &au_chantemplate, au); */
658	pcm_addchan(dev, PCMDIR_PLAY, &auchan_class, au);
659	pcm_setstatus(dev, status);
660
661	return 0;
662
663 bad:
664	if (au) free(au, M_DEVBUF);
665	for (i = 0; i < j; i++)
666		bus_release_resource(dev, type[i], regid[i], reg[i]);
667	if (ih) bus_teardown_intr(dev, irq, ih);
668	if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq);
669	return ENXIO;
670}
671
672static device_method_t au_methods[] = {
673	/* Device interface */
674	DEVMETHOD(device_probe,		au_pci_probe),
675	DEVMETHOD(device_attach,	au_pci_attach),
676
677	{ 0, 0 }
678};
679
680static driver_t au_driver = {
681	"pcm",
682	au_methods,
683	PCM_SOFTC_SIZE,
684};
685
686DRIVER_MODULE(snd_aureal, pci, au_driver, pcm_devclass, 0, 0);
687MODULE_DEPEND(snd_aureal, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
688MODULE_VERSION(snd_aureal, 1);
689