1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was developed in part by Philip Paeps under contract for 8 * Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * The views and conclusions contained in the software and documentation are 32 * those of the authors and should not be interpreted as representing official 33 * policies, either expressed or implied, of the FreeBSD Project. 34 * 35 * $FreeBSD$ 36 */ 37 38#ifndef _SFXGE_H 39#define _SFXGE_H 40 41#include <sys/param.h> 42#include <sys/kernel.h> 43#include <sys/socket.h> 44#include <sys/sysctl.h> 45#include <sys/sx.h> 46#include <vm/uma.h> 47 48#include <net/ethernet.h> 49#include <net/if.h> 50#include <net/if_var.h> 51#include <net/if_media.h> 52#include <net/if_types.h> 53 54#include "sfxge_ioc.h" 55 56/* 57 * Debugging 58 */ 59#if 0 60#define DBGPRINT(dev, fmt, args...) \ 61 device_printf(dev, "%s: " fmt "\n", __func__, ## args) 62#else 63#define DBGPRINT(dev, fmt, args...) 64#endif 65 66/* 67 * Backward-compatibility 68 */ 69#ifndef CACHE_LINE_SIZE 70/* This should be right on most machines the driver will be used on, and 71 * we needn't care too much about wasting a few KB per interface. 72 */ 73#define CACHE_LINE_SIZE 128 74#endif 75 76#ifndef IFCAP_LINKSTATE 77#define IFCAP_LINKSTATE 0 78#endif 79 80#ifndef IFCAP_VLAN_HWTSO 81#define IFCAP_VLAN_HWTSO 0 82#endif 83 84#ifndef IFM_10G_T 85#define IFM_10G_T IFM_UNKNOWN 86#endif 87 88#ifndef IFM_10G_KX4 89#define IFM_10G_KX4 IFM_10G_CX4 90#endif 91 92#ifndef IFM_40G_CR4 93#define IFM_40G_CR4 IFM_UNKNOWN 94#endif 95 96#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ 97 __FreeBSD_version >= 900003 98#define SFXGE_HAVE_DESCRIBE_INTR 99#endif 100 101#ifdef IFM_ETH_RXPAUSE 102#define SFXGE_HAVE_PAUSE_MEDIAOPTS 103#endif 104 105#ifndef CTLTYPE_U64 106#define CTLTYPE_U64 CTLTYPE_QUAD 107#endif 108 109#include "sfxge_rx.h" 110#include "sfxge_tx.h" 111 112#define ROUNDUP_POW_OF_TWO(_n) (1ULL << flsl((_n) - 1)) 113 114#define SFXGE_IP_ALIGN 2 115 116#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ 117 118 119#define SFXGE_MAGIC_RESERVED 0x8000 120 121#define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 6 122#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ 123 ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) 124 125enum sfxge_sw_ev { 126 SFXGE_SW_EV_RX_QFLUSH_DONE = 1, 127 SFXGE_SW_EV_RX_QFLUSH_FAILED, 128 SFXGE_SW_EV_RX_QREFILL, 129 SFXGE_SW_EV_TX_QFLUSH_DONE, 130}; 131 132#define SFXGE_SW_EV_MAGIC(_sw_ev) \ 133 (SFXGE_MAGIC_RESERVED | ((_sw_ev) << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 134 135static inline uint16_t 136sfxge_sw_ev_mk_magic(enum sfxge_sw_ev sw_ev, unsigned int label) 137{ 138 KASSERT((label & SFXGE_MAGIC_DMAQ_LABEL_MASK) == label, 139 ("(label & SFXGE_MAGIC_DMAQ_LABEL_MASK) != label")); 140 return SFXGE_SW_EV_MAGIC(sw_ev) | label; 141} 142 143static inline uint16_t 144sfxge_sw_ev_rxq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_rxq *rxq) 145{ 146 return sfxge_sw_ev_mk_magic(sw_ev, 0); 147} 148 149static inline uint16_t 150sfxge_sw_ev_txq_magic(enum sfxge_sw_ev sw_ev, struct sfxge_txq *txq) 151{ 152 return sfxge_sw_ev_mk_magic(sw_ev, txq->type); 153} 154 155enum sfxge_evq_state { 156 SFXGE_EVQ_UNINITIALIZED = 0, 157 SFXGE_EVQ_INITIALIZED, 158 SFXGE_EVQ_STARTING, 159 SFXGE_EVQ_STARTED 160}; 161 162#define SFXGE_EV_BATCH 16384 163 164#define SFXGE_STATS_UPDATE_PERIOD_MS 1000 165 166struct sfxge_evq { 167 /* Structure members below are sorted by usage order */ 168 struct sfxge_softc *sc; 169 struct mtx lock; 170 unsigned int index; 171 enum sfxge_evq_state init_state; 172 efsys_mem_t mem; 173 efx_evq_t *common; 174 unsigned int read_ptr; 175 boolean_t exception; 176 unsigned int rx_done; 177 unsigned int tx_done; 178 179 /* Linked list of TX queues with completions to process */ 180 struct sfxge_txq *txq; 181 struct sfxge_txq **txqs; 182 183 /* Structure members not used on event processing path */ 184 unsigned int buf_base_id; 185 unsigned int entries; 186 char lock_name[SFXGE_LOCK_NAME_MAX]; 187#if EFSYS_OPT_QSTATS 188 clock_t stats_update_time; 189 uint64_t stats[EV_NQSTATS]; 190#endif 191} __aligned(CACHE_LINE_SIZE); 192 193#define SFXGE_NDESCS 1024 194#define SFXGE_MODERATION 30 195 196enum sfxge_intr_state { 197 SFXGE_INTR_UNINITIALIZED = 0, 198 SFXGE_INTR_INITIALIZED, 199 SFXGE_INTR_TESTING, 200 SFXGE_INTR_STARTED 201}; 202 203struct sfxge_intr_hdl { 204 int eih_rid; 205 void *eih_tag; 206 struct resource *eih_res; 207}; 208 209struct sfxge_intr { 210 enum sfxge_intr_state state; 211 struct resource *msix_res; 212 struct sfxge_intr_hdl *table; 213 int n_alloc; 214 int type; 215 efsys_mem_t status; 216 uint32_t zero_count; 217}; 218 219enum sfxge_mcdi_state { 220 SFXGE_MCDI_UNINITIALIZED = 0, 221 SFXGE_MCDI_INITIALIZED, 222 SFXGE_MCDI_BUSY, 223 SFXGE_MCDI_COMPLETED 224}; 225 226struct sfxge_mcdi { 227 struct mtx lock; 228 efsys_mem_t mem; 229 enum sfxge_mcdi_state state; 230 efx_mcdi_transport_t transport; 231 232 /* Only used in debugging output */ 233 char lock_name[SFXGE_LOCK_NAME_MAX]; 234}; 235 236struct sfxge_hw_stats { 237 clock_t update_time; 238 efsys_mem_t dma_buf; 239 void *decode_buf; 240}; 241 242enum sfxge_port_state { 243 SFXGE_PORT_UNINITIALIZED = 0, 244 SFXGE_PORT_INITIALIZED, 245 SFXGE_PORT_STARTED 246}; 247 248struct sfxge_port { 249 struct sfxge_softc *sc; 250 struct mtx lock; 251 enum sfxge_port_state init_state; 252#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 253 unsigned int wanted_fc; 254#endif 255 struct sfxge_hw_stats phy_stats; 256 struct sfxge_hw_stats mac_stats; 257 uint16_t stats_update_period_ms; 258 efx_link_mode_t link_mode; 259 uint8_t mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX * 260 EFX_MAC_ADDR_LEN]; 261 unsigned int mcast_count; 262 263 /* Only used in debugging output */ 264 char lock_name[SFXGE_LOCK_NAME_MAX]; 265}; 266 267enum sfxge_softc_state { 268 SFXGE_UNINITIALIZED = 0, 269 SFXGE_INITIALIZED, 270 SFXGE_REGISTERED, 271 SFXGE_STARTED 272}; 273 274struct sfxge_softc { 275 device_t dev; 276 struct sx softc_lock; 277 char softc_lock_name[SFXGE_LOCK_NAME_MAX]; 278 enum sfxge_softc_state init_state; 279 struct ifnet *ifnet; 280 unsigned int if_flags; 281 struct sysctl_oid *stats_node; 282#if EFSYS_OPT_QSTATS 283 struct sysctl_oid *evqs_stats_node; 284#endif 285 struct sysctl_oid *txqs_node; 286 287 struct task task_reset; 288 289 efx_family_t family; 290 caddr_t vpd_data; 291 size_t vpd_size; 292 efx_nic_t *enp; 293 efsys_lock_t enp_lock; 294 295 boolean_t txq_dynamic_cksum_toggle_supported; 296 297 unsigned int rxq_entries; 298 unsigned int txq_entries; 299 300 bus_dma_tag_t parent_dma_tag; 301 efsys_bar_t bar; 302 303 struct sfxge_intr intr; 304 struct sfxge_mcdi mcdi; 305 struct sfxge_port port; 306 uint32_t buffer_table_next; 307 308 struct sfxge_evq *evq[SFXGE_RX_SCALE_MAX]; 309 unsigned int ev_moderation; 310#if EFSYS_OPT_QSTATS 311 clock_t ev_stats_update_time; 312 uint64_t ev_stats[EV_NQSTATS]; 313#endif 314 315 unsigned int max_rss_channels; 316 struct sfxge_rxq *rxq[SFXGE_RX_SCALE_MAX]; 317 unsigned int rx_indir_table[EFX_RSS_TBL_SIZE]; 318 319 struct sfxge_txq *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX]; 320 321 struct ifmedia media; 322 323 size_t rx_prefix_size; 324 size_t rx_buffer_size; 325 size_t rx_buffer_align; 326 int rx_cluster_size; 327 328 unsigned int evq_max; 329 unsigned int evq_count; 330 unsigned int rxq_count; 331 unsigned int txq_count; 332 333 unsigned int tso_fw_assisted; 334#define SFXGE_FATSOV1 (1 << 0) 335#define SFXGE_FATSOV2 (1 << 1) 336 337#if EFSYS_OPT_MCDI_LOGGING 338 int mcdi_logging; 339#endif 340}; 341 342#define SFXGE_LINK_UP(sc) \ 343 ((sc)->port.link_mode != EFX_LINK_DOWN && \ 344 (sc)->port.link_mode != EFX_LINK_UNKNOWN) 345#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) 346 347#define SFXGE_PARAM(_name) "hw.sfxge." #_name 348 349SYSCTL_DECL(_hw_sfxge); 350 351/* 352 * From sfxge.c. 353 */ 354extern void sfxge_schedule_reset(struct sfxge_softc *sc); 355extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, 356 uint32_t *idp); 357 358/* 359 * From sfxge_dma.c. 360 */ 361extern int sfxge_dma_init(struct sfxge_softc *sc); 362extern void sfxge_dma_fini(struct sfxge_softc *sc); 363extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len, 364 efsys_mem_t *esmp); 365extern void sfxge_dma_free(efsys_mem_t *esmp); 366extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, 367 struct mbuf **mp, 368 bus_dma_segment_t *segs, 369 int *nsegs, int maxsegs); 370 371/* 372 * From sfxge_ev.c. 373 */ 374extern int sfxge_ev_init(struct sfxge_softc *sc); 375extern void sfxge_ev_fini(struct sfxge_softc *sc); 376extern int sfxge_ev_start(struct sfxge_softc *sc); 377extern void sfxge_ev_stop(struct sfxge_softc *sc); 378extern int sfxge_ev_qpoll(struct sfxge_evq *evq); 379 380/* 381 * From sfxge_intr.c. 382 */ 383extern int sfxge_intr_init(struct sfxge_softc *sc); 384extern void sfxge_intr_fini(struct sfxge_softc *sc); 385extern int sfxge_intr_start(struct sfxge_softc *sc); 386extern void sfxge_intr_stop(struct sfxge_softc *sc); 387 388/* 389 * From sfxge_mcdi.c. 390 */ 391extern int sfxge_mcdi_init(struct sfxge_softc *sc); 392extern void sfxge_mcdi_fini(struct sfxge_softc *sc); 393extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 394 395/* 396 * From sfxge_nvram.c. 397 */ 398extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 399 400/* 401 * From sfxge_port.c. 402 */ 403extern int sfxge_port_init(struct sfxge_softc *sc); 404extern void sfxge_port_fini(struct sfxge_softc *sc); 405extern int sfxge_port_start(struct sfxge_softc *sc); 406extern void sfxge_port_stop(struct sfxge_softc *sc); 407extern void sfxge_mac_link_update(struct sfxge_softc *sc, 408 efx_link_mode_t mode); 409extern int sfxge_mac_filter_set(struct sfxge_softc *sc); 410extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); 411extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c); 412 413#define SFXGE_MAX_MTU (9 * 1024) 414 415#define SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname) \ 416 do { \ 417 struct sfxge_softc *__sc = (_sc); \ 418 \ 419 snprintf((__sc)->softc_lock_name, \ 420 sizeof((__sc)->softc_lock_name), \ 421 "%s:softc", (_ifname)); \ 422 sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name); \ 423 } while (B_FALSE) 424#define SFXGE_ADAPTER_LOCK_DESTROY(_sc) \ 425 sx_destroy(&(_sc)->softc_lock) 426#define SFXGE_ADAPTER_LOCK(_sc) \ 427 sx_xlock(&(_sc)->softc_lock) 428#define SFXGE_ADAPTER_UNLOCK(_sc) \ 429 sx_xunlock(&(_sc)->softc_lock) 430#define SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc) \ 431 sx_assert(&(_sc)->softc_lock, LA_XLOCKED) 432 433#define SFXGE_PORT_LOCK_INIT(_port, _ifname) \ 434 do { \ 435 struct sfxge_port *__port = (_port); \ 436 \ 437 snprintf((__port)->lock_name, \ 438 sizeof((__port)->lock_name), \ 439 "%s:port", (_ifname)); \ 440 mtx_init(&(__port)->lock, (__port)->lock_name, \ 441 NULL, MTX_DEF); \ 442 } while (B_FALSE) 443#define SFXGE_PORT_LOCK_DESTROY(_port) \ 444 mtx_destroy(&(_port)->lock) 445#define SFXGE_PORT_LOCK(_port) \ 446 mtx_lock(&(_port)->lock) 447#define SFXGE_PORT_UNLOCK(_port) \ 448 mtx_unlock(&(_port)->lock) 449#define SFXGE_PORT_LOCK_ASSERT_OWNED(_port) \ 450 mtx_assert(&(_port)->lock, MA_OWNED) 451 452#define SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname) \ 453 do { \ 454 struct sfxge_mcdi *__mcdi = (_mcdi); \ 455 \ 456 snprintf((__mcdi)->lock_name, \ 457 sizeof((__mcdi)->lock_name), \ 458 "%s:mcdi", (_ifname)); \ 459 mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name, \ 460 NULL, MTX_DEF); \ 461 } while (B_FALSE) 462#define SFXGE_MCDI_LOCK_DESTROY(_mcdi) \ 463 mtx_destroy(&(_mcdi)->lock) 464#define SFXGE_MCDI_LOCK(_mcdi) \ 465 mtx_lock(&(_mcdi)->lock) 466#define SFXGE_MCDI_UNLOCK(_mcdi) \ 467 mtx_unlock(&(_mcdi)->lock) 468#define SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi) \ 469 mtx_assert(&(_mcdi)->lock, MA_OWNED) 470 471#define SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index) \ 472 do { \ 473 struct sfxge_evq *__evq = (_evq); \ 474 \ 475 snprintf((__evq)->lock_name, \ 476 sizeof((__evq)->lock_name), \ 477 "%s:evq%u", (_ifname), (_evq_index)); \ 478 mtx_init(&(__evq)->lock, (__evq)->lock_name, \ 479 NULL, MTX_DEF); \ 480 } while (B_FALSE) 481#define SFXGE_EVQ_LOCK_DESTROY(_evq) \ 482 mtx_destroy(&(_evq)->lock) 483#define SFXGE_EVQ_LOCK(_evq) \ 484 mtx_lock(&(_evq)->lock) 485#define SFXGE_EVQ_UNLOCK(_evq) \ 486 mtx_unlock(&(_evq)->lock) 487#define SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq) \ 488 mtx_assert(&(_evq)->lock, MA_OWNED) 489 490#endif /* _SFXGE_H */ 491