1/* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30#ifndef __BCM_OSAL_ECORE_PACKAGE 31#define __BCM_OSAL_ECORE_PACKAGE 32 33#include "qlnx_os.h" 34#include "ecore_status.h" 35#include <sys/bitstring.h> 36 37#include <linux/types.h> 38 39#if __FreeBSD_version >= 1200032 40#include <linux/bitmap.h> 41#else 42#if __FreeBSD_version >= 1100090 43#include <compat/linuxkpi/common/include/linux/bitops.h> 44#else 45#include <ofed/include/linux/bitops.h> 46#endif 47#endif 48 49#define OSAL_NUM_CPUS() mp_ncpus 50/* 51 * prototypes of freebsd specific functions required by ecore 52 */ 53extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id); 54extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg, 55 uint8_t *reg_value); 56extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg, 57 uint16_t *reg_value); 58extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg, 59 uint32_t *reg_value); 60extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg, 61 uint8_t reg_value); 62extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg, 63 uint16_t reg_value); 64extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg, 65 uint32_t reg_value); 66extern int qlnx_pci_find_capability(void *ecore_dev, int cap); 67extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap); 68 69extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr); 70extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value); 71extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value); 72 73extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr); 74extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 75extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value); 76 77extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 78extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value); 79 80extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys, 81 uint32_t size); 82extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr, 83 bus_addr_t phys, uint32_t size); 84 85extern void qlnx_link_update(void *p_hwfn); 86extern void qlnx_barrier(void *p_hwfn); 87 88extern void *qlnx_zalloc(uint32_t size); 89 90extern void qlnx_get_protocol_stats(void *cdev, int proto_type, 91 void *proto_stats); 92 93extern void qlnx_sp_isr(void *arg); 94 95 96extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req, 97 void *p_sw_info); 98extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id); 99extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params); 100extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params, 101 uint16_t *tlvs); 102extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id); 103extern void qlnx_vf_flr_update(void *p_hwfn); 104 105#define nothing do {} while(0) 106#ifdef ECORE_PACKAGE 107 108/* Memory Types */ 109#define u8 uint8_t 110#define u16 uint16_t 111#define u32 uint32_t 112#define u64 uint64_t 113#define s16 uint16_t 114#define s32 uint32_t 115 116#ifndef QLNX_RDMA 117 118static __inline unsigned long 119roundup_pow_of_two(unsigned long x) 120{ 121 return (1UL << flsl(x - 1)); 122} 123 124static __inline int 125is_power_of_2(unsigned long n) 126{ 127 return (n == roundup_pow_of_two(n)); 128} 129 130static __inline unsigned long 131rounddown_pow_of_two(unsigned long x) 132{ 133 return (1UL << (flsl(x) - 1)); 134} 135 136#define max_t(type, val1, val2) \ 137 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2)) 138#define min_t(type, val1, val2) \ 139 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2)) 140 141#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 142#define BUILD_BUG_ON(cond) nothing 143 144#endif /* #ifndef QLNX_RDMA */ 145 146#define OSAL_UNUSED 147 148#define OSAL_CPU_TO_BE64(val) htobe64(val) 149#define OSAL_BE64_TO_CPU(val) be64toh(val) 150 151#define OSAL_CPU_TO_BE32(val) htobe32(val) 152#define OSAL_BE32_TO_CPU(val) be32toh(val) 153 154#define OSAL_CPU_TO_LE32(val) htole32(val) 155#define OSAL_LE32_TO_CPU(val) le32toh(val) 156 157#define OSAL_CPU_TO_BE16(val) htobe16(val) 158#define OSAL_BE16_TO_CPU(val) be16toh(val) 159 160#define OSAL_CPU_TO_LE16(val) htole16(val) 161#define OSAL_LE16_TO_CPU(val) le16toh(val) 162 163static __inline uint32_t 164qlnx_get_cache_line_size(void) 165{ 166 return (CACHE_LINE_SIZE); 167} 168 169#define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size() 170 171#define OSAL_BE32 uint32_t 172#define dma_addr_t bus_addr_t 173#define osal_size_t size_t 174 175typedef struct mtx osal_spinlock_t; 176typedef struct mtx osal_mutex_t; 177 178typedef void * osal_dpc_t; 179 180typedef struct _osal_list_entry_t 181{ 182 struct _osal_list_entry_t *next, *prev; 183} osal_list_entry_t; 184 185typedef struct osal_list_t 186{ 187 osal_list_entry_t *head, *tail; 188 unsigned long cnt; 189} osal_list_t; 190 191/* OSAL functions */ 192 193#define OSAL_UDELAY(time) DELAY(time) 194#define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time) 195 196#define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size) 197#define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size) 198#define OSAL_VALLOC(dev, size) qlnx_zalloc(size) 199#define OSAL_VZALLOC(dev, size) qlnx_zalloc(size) 200 201#define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF) 202#define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF) 203 204#define OSAL_MEM_ZERO(mem, size) bzero(mem, size) 205 206#define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size) 207 208#define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \ 209 qlnx_dma_alloc_coherent(dev, phys, size) 210 211#define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \ 212 qlnx_dma_free_coherent(dev, virt, phys, size) 213#define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) 214 215#define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) 216#define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val) 217#define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value) 218#define DIRECT_REG_WR64(p_hwfn, addr, value) \ 219 qlnx_direct_reg_wr64(p_hwfn, addr, value) 220#define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value) 221#define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr) 222#define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr) 223#define DOORBELL(hwfn, addr, value) \ 224 qlnx_dbell_wr32(hwfn, addr, value) 225 226#define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex) 227#define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex) 228#define OSAL_SPIN_LOCK_INIT(lock) {\ 229 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \ 230 } 231 232#define OSAL_SPIN_UNLOCK(lock) {\ 233 mtx_unlock(lock); \ 234 } 235#define OSAL_SPIN_LOCK(lock) {\ 236 mtx_lock(lock); \ 237 } 238 239#define OSAL_MUTEX_ALLOC(p_hwfn, mutex) 240#define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex) 241#define OSAL_MUTEX_INIT(lock) {\ 242 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\ 243 } 244 245#define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock) 246#define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock) 247 248#define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT) 249#define OSAL_DPC_INIT(dpc, hwfn) nothing 250extern void qlnx_schedule_recovery(void *p_hwfn); 251#define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0) 252#define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing 253#define OSAL_DPC_SYNC(hwfn) nothing 254 255static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type) 256{ 257 return; 258} 259 260static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn) 261{ 262 return 1; 263} 264 265#define OSAL_LIST_INIT(list) \ 266 do { \ 267 (list)->head = NULL; \ 268 (list)->tail = NULL; \ 269 (list)->cnt = 0; \ 270 } while (0) 271 272#define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \ 273do { \ 274 (entry)->prev = (entry_prev); \ 275 (entry)->next = (entry_prev)->next; \ 276 (entry)->next->prev = (entry); \ 277 (entry_prev)->next = (entry); \ 278 (list)->cnt++; \ 279} while (0); 280 281#define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \ 282do { \ 283 ((new_list)->tail)->next = ((list)->head); \ 284 ((list)->head)->prev = ((new_list)->tail); \ 285 (list)->head = (new_list)->head; \ 286 (list)->cnt = (list)->cnt + (new_list)->cnt; \ 287 OSAL_LIST_INIT(new_list); \ 288} while (0); 289 290#define OSAL_LIST_PUSH_HEAD(entry, list) \ 291 do { \ 292 (entry)->prev = (osal_list_entry_t *)0; \ 293 (entry)->next = (list)->head; \ 294 if ((list)->tail == (osal_list_entry_t *)0) { \ 295 (list)->tail = (entry); \ 296 } else { \ 297 (list)->head->prev = (entry); \ 298 } \ 299 (list)->head = (entry); \ 300 (list)->cnt++; \ 301 } while (0) 302 303#define OSAL_LIST_PUSH_TAIL(entry, list) \ 304 do { \ 305 (entry)->next = (osal_list_entry_t *)0; \ 306 (entry)->prev = (list)->tail; \ 307 if ((list)->tail) { \ 308 (list)->tail->next = (entry); \ 309 } else { \ 310 (list)->head = (entry); \ 311 } \ 312 (list)->tail = (entry); \ 313 (list)->cnt++; \ 314 } while (0) 315 316#define OSAL_LIST_FIRST_ENTRY(list, type, field) \ 317 (type *)((list)->head) 318 319#define OSAL_LIST_REMOVE_ENTRY(entry, list) \ 320 do { \ 321 if ((list)->head == (entry)) { \ 322 if ((list)->head) { \ 323 (list)->head = (list)->head->next; \ 324 if ((list)->head) { \ 325 (list)->head->prev = (osal_list_entry_t *)0; \ 326 } else { \ 327 (list)->tail = (osal_list_entry_t *)0; \ 328 } \ 329 (list)->cnt--; \ 330 } \ 331 } else if ((list)->tail == (entry)) { \ 332 if ((list)->tail) { \ 333 (list)->tail = (list)->tail->prev; \ 334 if ((list)->tail) { \ 335 (list)->tail->next = (osal_list_entry_t *)0; \ 336 } else { \ 337 (list)->head = (osal_list_entry_t *)0; \ 338 } \ 339 (list)->cnt--; \ 340 } \ 341 } else { \ 342 (entry)->prev->next = (entry)->next; \ 343 (entry)->next->prev = (entry)->prev; \ 344 (list)->cnt--; \ 345 } \ 346 } while (0) 347 348 349#define OSAL_LIST_IS_EMPTY(list) \ 350 ((list)->cnt == 0) 351 352#define OSAL_LIST_NEXT(entry, field, type) \ 353 (type *)((&((entry)->field))->next) 354 355#define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \ 356 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \ 357 entry; \ 358 entry = OSAL_LIST_NEXT(entry, field, type)) 359 360#define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \ 361 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \ 362 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \ 363 entry != NULL; \ 364 entry = (type *)tmp_entry, \ 365 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL) 366 367 368#define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id) 369 370#define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \ 371 qlnx_pci_read_config_byte(dev, reg, value); 372#define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \ 373 qlnx_pci_read_config_word(dev, reg, value); 374#define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \ 375 qlnx_pci_read_config_dword(dev, reg, value); 376 377#define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \ 378 qlnx_pci_write_config_byte(dev, reg, value); 379#define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \ 380 qlnx_pci_write_config_word(dev, reg, value); 381#define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \ 382 qlnx_pci_write_config_dword(dev, reg, value); 383 384#define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap) 385#define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \ 386 qlnx_pci_find_ext_capability(dev, ext_cap) 387 388#define OSAL_MMIOWB(dev) qlnx_barrier(dev) 389#define OSAL_BARRIER(dev) qlnx_barrier(dev) 390 391#define OSAL_SMP_MB(dev) mb() 392#define OSAL_SMP_RMB(dev) rmb() 393#define OSAL_SMP_WMB(dev) wmb() 394#define OSAL_RMB(dev) rmb() 395#define OSAL_WMB(dev) wmb() 396#define OSAL_DMA_SYNC(dev, addr, length, is_post) 397 398#define OSAL_FIND_FIRST_BIT find_first_bit 399#define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit) 400#define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit) 401#define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit) 402#define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ 403 find_first_zero_bit(bitmap, length) 404 405#define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn) 406 407#define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 408#define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) 409 410#define OSAL_NUM_ACTIVE_CPU() mp_ncpus 411 412#ifndef DIV_ROUND_UP 413#define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what)) 414#endif 415 416#define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what)) 417 418#define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val)) 419 420static __inline uint32_t 421qlnx_log2(uint32_t x) 422{ 423 uint32_t log = 0; 424 425 while (x >>= 1) log++; 426 427 return (log); 428} 429 430#define OSAL_LOG2(val) qlnx_log2(val) 431#define OFFSETOF(str, field) offsetof(str, field) 432#define PRINT device_printf 433#define PRINT_ERR device_printf 434#define OSAL_ASSERT(is_assert) nothing 435#define OSAL_BEFORE_PF_START(cdev, my_id) {}; 436#define OSAL_AFTER_PF_STOP(cdev, my_id) {}; 437 438#define INLINE __inline 439#define OSAL_INLINE __inline 440#define OSAL_UNLIKELY 441#define OSAL_NULL NULL 442 443 444#define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2) 445#define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2) 446 447#define __iomem 448#define OSAL_IOMEM 449 450#define int_ptr_t void * 451#define osal_int_ptr_t void * 452#define OSAL_BUILD_BUG_ON(cond) nothing 453#define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 454#define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 455 456#define OSAL_PAGE_SIZE PAGE_SIZE 457 458#define OSAL_STRCPY(dst, src) strcpy(dst, src) 459#define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes) 460#define OSAL_STRLEN(src) strlen(src) 461#define OSAL_SPRINTF sprintf 462#define OSAL_SNPRINTF snprintf 463#define OSAL_MEMSET memset 464#define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 465#define osal_uintptr_t u64 466 467#define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) 468#define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \ 469 qlnx_get_protocol_stats(p_hwfn, type, stats); 470#define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);} 471#define OSAL_WARN(cond, fmt, args...) \ 472 if (cond) printf("%s: WARNING: " fmt, __func__, ## args); 473 474#define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits) 475#define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id) 476 477static inline int 478qlnx_test_and_change_bit(long bit, volatile unsigned long *var) 479{ 480 long val; 481 482 var += BIT_WORD(bit); 483 bit %= BITS_PER_LONG; 484 bit = (1UL << bit); 485 486 val = *var; 487 488#if __FreeBSD_version >= 1100000 489 if (val & bit) 490 return (test_and_clear_bit(bit, var)); 491 492 return (test_and_set_bit(bit, var)); 493#else 494 if (val & bit) 495 return (test_and_clear_bit(bit, (long *)var)); 496 497 return (test_and_set_bit(bit, (long *)var)); 498 499#endif 500} 501 502#if __FreeBSD_version < 1100000 503static inline unsigned 504bitmap_weight(unsigned long *bitmap, unsigned nbits) 505{ 506 unsigned bit; 507 unsigned retval = 0; 508 509 for_each_set_bit(bit, bitmap, nbits) 510 retval++; 511 return (retval); 512} 513 514#endif 515 516 517#define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit 518#define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit 519#define OSAL_MEMCMP memcmp 520#define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);} 521#define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);} 522 523static inline u32 524OSAL_CRC32(u32 crc, u8 *ptr, u32 length) 525{ 526 int i; 527 528 while (length--) { 529 crc ^= *ptr++; 530 for (i = 0; i < 8; i++) 531 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); 532 } 533 return crc; 534} 535 536static inline void 537OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial) 538{ 539 return; 540} 541 542static inline u8 543OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value) 544{ 545 return ECORE_NOTIMPL; 546} 547 548#define OSAL_HW_INFO_CHANGE(p_hwfn, offset) 549#define OSAL_MFW_TLV_REQ(p_hwfn) 550#define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len) 551#define OSAL_MFW_CMD_PREEMPT(p_hwfn) 552#define OSAL_TRANSCEIVER_UPDATE(p_hwfn) 553#define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0) 554 555#define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0) 556 557#define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \ 558 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info) 559 560#define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status) 561#define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \ 562 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id) 563 564#define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS 565#define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD 566#define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS 567#define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid) 568#define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS 569#define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \ 570 qlnx_iov_chk_ucast(p_hwfn, vfid, params); 571#define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id) 572#define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type) 573#define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \ 574 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs) 575#define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \ 576 qlnx_pf_vf_msg(p_hwfn, relative_vf_id) 577 578#define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn) 579#define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf) 580 581#endif /* #ifdef ECORE_PACKAGE */ 582 583#endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */ 584