1/*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD$"); 29 30/* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31 32/* TODO Move headers to mprvar */ 33#include <sys/types.h> 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/kernel.h> 37#include <sys/module.h> 38#include <sys/bus.h> 39#include <sys/conf.h> 40#include <sys/malloc.h> 41#include <sys/sysctl.h> 42#include <sys/uio.h> 43 44#include <machine/bus.h> 45#include <machine/resource.h> 46#include <sys/rman.h> 47 48#include <dev/pci/pcireg.h> 49#include <dev/pci/pcivar.h> 50#include <dev/pci/pci_private.h> 51 52#include <dev/mpr/mpi/mpi2_type.h> 53#include <dev/mpr/mpi/mpi2.h> 54#include <dev/mpr/mpi/mpi2_ioc.h> 55#include <dev/mpr/mpi/mpi2_cnfg.h> 56#include <dev/mpr/mpi/mpi2_tool.h> 57#include <dev/mpr/mpi/mpi2_pci.h> 58 59#include <sys/queue.h> 60#include <sys/kthread.h> 61#include <dev/mpr/mpr_ioctl.h> 62#include <dev/mpr/mprvar.h> 63 64static int mpr_pci_probe(device_t); 65static int mpr_pci_attach(device_t); 66static int mpr_pci_detach(device_t); 67static int mpr_pci_suspend(device_t); 68static int mpr_pci_resume(device_t); 69static void mpr_pci_free(struct mpr_softc *); 70static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 73 74static device_method_t mpr_methods[] = { 75 DEVMETHOD(device_probe, mpr_pci_probe), 76 DEVMETHOD(device_attach, mpr_pci_attach), 77 DEVMETHOD(device_detach, mpr_pci_detach), 78 DEVMETHOD(device_suspend, mpr_pci_suspend), 79 DEVMETHOD(device_resume, mpr_pci_resume), 80 DEVMETHOD(bus_print_child, bus_generic_print_child), 81 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 82 { 0, 0 } 83}; 84 85static driver_t mpr_pci_driver = { 86 "mpr", 87 mpr_methods, 88 sizeof(struct mpr_softc) 89}; 90 91 92struct mpr_ident { 93 uint16_t vendor; 94 uint16_t device; 95 uint16_t subvendor; 96 uint16_t subdevice; 97 u_int flags; 98 const char *desc; 99} mpr_identifiers[] = { 100 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 101 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 102 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 103 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 104 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 105 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 106 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 107 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 108 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 109 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 110 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 111 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 112 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 113 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 114 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 115 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 116 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 117 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 118 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 119 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 120 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 121 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 122 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 123 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 124 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 125 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 126 "Avago Technologies (LSI) SAS3408" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 128 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 129 "Avago Technologies (LSI) SAS3416" }, 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 131 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 132 "Avago Technologies (LSI) SAS3508" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 134 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 135 "Avago Technologies (LSI) SAS3508_1" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 137 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 138 "Avago Technologies (LSI) SAS3516" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 140 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 141 "Avago Technologies (LSI) SAS3516_1" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 143 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 144 "Avago Technologies (LSI) SAS3616" }, 145 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 146 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 147 "Avago Technologies (LSI) SAS3708" }, 148 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 149 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 150 "Avago Technologies (LSI) SAS3716" }, 151 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816, 152 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 153 "Broadcom Inc. (LSI) INVALID0 SAS3816" }, 154 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816, 155 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 156 "Broadcom Inc. (LSI) CFG SEC SAS3816" }, 157 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816, 158 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 159 "Broadcom Inc. (LSI) HARD SEC SAS3816" }, 160 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816, 161 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 162 "Broadcom Inc. (LSI) INVALID1 SAS3816" }, 163 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916, 164 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 165 "Broadcom Inc. (LSI) INVALID0 SAS3916" }, 166 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916, 167 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 168 "Broadcom Inc. (LSI) CFG SEC SAS3916" }, 169 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916, 170 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 171 "Broadcom Inc. (LSI) HARD SEC SAS3916" }, 172 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916, 173 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 174 "Broadcom Inc. (LSI) INVALID1 SAS3916" }, 175 { 0, 0, 0, 0, 0, NULL } 176}; 177 178 179static devclass_t mpr_devclass; 180DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 181MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci, 182 mpr, mpr_identifiers, nitems(mpr_identifiers) - 1); 183 184MODULE_DEPEND(mpr, cam, 1, 1, 1); 185 186static struct mpr_ident * 187mpr_find_ident(device_t dev) 188{ 189 struct mpr_ident *m; 190 191 for (m = mpr_identifiers; m->vendor != 0; m++) { 192 if (m->vendor != pci_get_vendor(dev)) 193 continue; 194 if (m->device != pci_get_device(dev)) 195 continue; 196 if ((m->subvendor != 0xffff) && 197 (m->subvendor != pci_get_subvendor(dev))) 198 continue; 199 if ((m->subdevice != 0xffff) && 200 (m->subdevice != pci_get_subdevice(dev))) 201 continue; 202 return (m); 203 } 204 205 return (NULL); 206} 207 208static int 209mpr_pci_probe(device_t dev) 210{ 211 struct mpr_ident *id; 212 213 if ((id = mpr_find_ident(dev)) != NULL) { 214 device_set_desc(dev, id->desc); 215 return (BUS_PROBE_DEFAULT); 216 } 217 return (ENXIO); 218} 219 220static int 221mpr_pci_attach(device_t dev) 222{ 223 struct mpr_softc *sc; 224 struct mpr_ident *m; 225 int error, i; 226 227 sc = device_get_softc(dev); 228 bzero(sc, sizeof(*sc)); 229 sc->mpr_dev = dev; 230 m = mpr_find_ident(dev); 231 sc->mpr_flags = m->flags; 232 233 switch (m->device) { 234 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816: 235 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816: 236 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916: 237 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916: 238 mpr_printf(sc, "HBA is in Non Secure mode\n"); 239 return (ENXIO); 240 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816: 241 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916: 242 mpr_printf(sc, "HBA is in Configurable Secure mode\n"); 243 break; 244 default: 245 break; 246 } 247 248 mpr_get_tunables(sc); 249 250 /* Twiddle basic PCI config bits for a sanity check */ 251 pci_enable_busmaster(dev); 252 253 for (i = 0; i < PCI_MAXMAPS_0; i++) { 254 sc->mpr_regs_rid = PCIR_BAR(i); 255 256 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 257 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 258 break; 259 } 260 261 if (sc->mpr_regs_resource == NULL) { 262 mpr_printf(sc, "Cannot allocate PCI registers\n"); 263 return (ENXIO); 264 } 265 266 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 267 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 268 269 /* Allocate the parent DMA tag */ 270 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 271 1, 0, /* algnmnt, boundary */ 272 BUS_SPACE_MAXADDR, /* lowaddr */ 273 BUS_SPACE_MAXADDR, /* highaddr */ 274 NULL, NULL, /* filter, filterarg */ 275 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 276 BUS_SPACE_UNRESTRICTED, /* nsegments */ 277 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 278 0, /* flags */ 279 NULL, NULL, /* lockfunc, lockarg */ 280 &sc->mpr_parent_dmat)) { 281 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 282 mpr_pci_free(sc); 283 return (ENOMEM); 284 } 285 286 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 287 ((error = mpr_attach(sc)) != 0)) 288 mpr_pci_free(sc); 289 290 return (error); 291} 292 293/* 294 * Allocate, but don't assign interrupts early. Doing it before requesting 295 * the IOCFacts message informs the firmware that we want to do MSI-X 296 * multiqueue. We might not use all of the available messages, but there's 297 * no reason to re-alloc if we don't. 298 */ 299int 300mpr_pci_alloc_interrupts(struct mpr_softc *sc) 301{ 302 device_t dev; 303 int error, msgs; 304 305 dev = sc->mpr_dev; 306 error = 0; 307 msgs = 0; 308 309 if (sc->disable_msix == 0) { 310 msgs = pci_msix_count(dev); 311 mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs); 312 msgs = min(msgs, sc->max_msix); 313 msgs = min(msgs, MPR_MSIX_MAX); 314 msgs = min(msgs, 1); /* XXX */ 315 if (msgs != 0) { 316 mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d " 317 "MSI-X messages\n", msgs); 318 error = mpr_alloc_msix(sc, msgs); 319 } 320 } 321 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 322 msgs = pci_msi_count(dev); 323 mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs); 324 msgs = min(msgs, MPR_MSI_MAX); 325 if (msgs != 0) { 326 mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d " 327 "MSI messages\n", MPR_MSI_MAX); 328 error = mpr_alloc_msi(sc, MPR_MSI_MAX); 329 } 330 } 331 if ((error != 0) || (msgs == 0)) { 332 /* 333 * If neither MSI or MSI-X are available, assume legacy INTx. 334 * This also implies that there will be only 1 queue. 335 */ 336 mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n"); 337 sc->mpr_flags |= MPR_FLAGS_INTX; 338 msgs = 1; 339 } else 340 sc->mpr_flags |= MPR_FLAGS_MSI; 341 342 sc->msi_msgs = msgs; 343 mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs); 344 345 return (error); 346} 347 348int 349mpr_pci_setup_interrupts(struct mpr_softc *sc) 350{ 351 device_t dev; 352 struct mpr_queue *q; 353 void *ihandler; 354 int i, error, rid, initial_rid; 355 356 dev = sc->mpr_dev; 357 error = ENXIO; 358 359 if (sc->mpr_flags & MPR_FLAGS_INTX) { 360 initial_rid = 0; 361 ihandler = mpr_intr; 362 } else if (sc->mpr_flags & MPR_FLAGS_MSI) { 363 initial_rid = 1; 364 ihandler = mpr_intr_msi; 365 } else { 366 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 367 "Unable to set up interrupts\n"); 368 return (EINVAL); 369 } 370 371 for (i = 0; i < sc->msi_msgs; i++) { 372 q = &sc->queues[i]; 373 rid = i + initial_rid; 374 q->irq_rid = rid; 375 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 376 &q->irq_rid, RF_ACTIVE); 377 if (q->irq == NULL) { 378 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 379 "Cannot allocate interrupt RID %d\n", rid); 380 sc->msi_msgs = i; 381 break; 382 } 383 error = bus_setup_intr(dev, q->irq, 384 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 385 sc, &q->intrhand); 386 if (error) { 387 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 388 "Cannot setup interrupt RID %d\n", rid); 389 sc->msi_msgs = i; 390 break; 391 } 392 } 393 394 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs); 395 return (error); 396} 397 398static int 399mpr_pci_detach(device_t dev) 400{ 401 struct mpr_softc *sc; 402 int error; 403 404 sc = device_get_softc(dev); 405 406 if ((error = mpr_free(sc)) != 0) 407 return (error); 408 409 mpr_pci_free(sc); 410 return (0); 411} 412 413void 414mpr_pci_free_interrupts(struct mpr_softc *sc) 415{ 416 struct mpr_queue *q; 417 int i; 418 419 if (sc->queues == NULL) 420 return; 421 422 for (i = 0; i < sc->msi_msgs; i++) { 423 q = &sc->queues[i]; 424 if (q->irq != NULL) { 425 bus_teardown_intr(sc->mpr_dev, q->irq, 426 q->intrhand); 427 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 428 q->irq_rid, q->irq); 429 } 430 } 431} 432 433static void 434mpr_pci_free(struct mpr_softc *sc) 435{ 436 437 if (sc->mpr_parent_dmat != NULL) { 438 bus_dma_tag_destroy(sc->mpr_parent_dmat); 439 } 440 441 mpr_pci_free_interrupts(sc); 442 443 if (sc->mpr_flags & MPR_FLAGS_MSI) 444 pci_release_msi(sc->mpr_dev); 445 446 if (sc->mpr_regs_resource != NULL) { 447 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 448 sc->mpr_regs_rid, sc->mpr_regs_resource); 449 } 450 451 return; 452} 453 454static int 455mpr_pci_suspend(device_t dev) 456{ 457 return (EINVAL); 458} 459 460static int 461mpr_pci_resume(device_t dev) 462{ 463 return (EINVAL); 464} 465 466static int 467mpr_alloc_msix(struct mpr_softc *sc, int msgs) 468{ 469 int error; 470 471 error = pci_alloc_msix(sc->mpr_dev, &msgs); 472 return (error); 473} 474 475static int 476mpr_alloc_msi(struct mpr_softc *sc, int msgs) 477{ 478 int error; 479 480 error = pci_alloc_msi(sc->mpr_dev, &msgs); 481 return (error); 482} 483 484int 485mpr_pci_restore(struct mpr_softc *sc) 486{ 487 struct pci_devinfo *dinfo; 488 489 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 490 491 dinfo = device_get_ivars(sc->mpr_dev); 492 if (dinfo == NULL) { 493 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 494 return (EINVAL); 495 } 496 497 pci_cfg_restore(sc->mpr_dev, dinfo); 498 return (0); 499} 500 501