1/*-
2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $FreeBSD$
33 */
34
35#include <linux/etherdevice.h>
36#include <dev/mlx5/driver.h>
37#include <dev/mlx5/mlx5_core/mlx5_core.h>
38#include <dev/mlx5/mlx5_lib/mlx5.h>
39
40void mlx5_init_reserved_gids(struct mlx5_core_dev *dev)
41{
42	unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
43
44	ida_init(&dev->roce.reserved_gids.ida);
45	dev->roce.reserved_gids.start = tblsz;
46	dev->roce.reserved_gids.count = 0;
47}
48
49void mlx5_cleanup_reserved_gids(struct mlx5_core_dev *dev)
50{
51	WARN_ON(!ida_is_empty(&dev->roce.reserved_gids.ida));
52	dev->roce.reserved_gids.start = 0;
53	dev->roce.reserved_gids.count = 0;
54	ida_destroy(&dev->roce.reserved_gids.ida);
55}
56
57int mlx5_core_reserve_gids(struct mlx5_core_dev *dev, unsigned int count)
58{
59	if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
60		mlx5_core_err(dev, "Cannot reserve GIDs when interfaces are up\n");
61		return -EPERM;
62	}
63	if (dev->roce.reserved_gids.start < count) {
64		mlx5_core_warn(dev, "GID table exhausted attempting to reserve %d more GIDs\n",
65			       count);
66		return -ENOMEM;
67	}
68	if (dev->roce.reserved_gids.count + count > MLX5_MAX_RESERVED_GIDS) {
69		mlx5_core_warn(dev, "Unable to reserve %d more GIDs\n", count);
70		return -ENOMEM;
71	}
72
73	dev->roce.reserved_gids.start -= count;
74	dev->roce.reserved_gids.count += count;
75	mlx5_core_dbg(dev, "Reserved %u GIDs starting at %u\n",
76		      dev->roce.reserved_gids.count,
77		      dev->roce.reserved_gids.start);
78	return 0;
79}
80
81void mlx5_core_unreserve_gids(struct mlx5_core_dev *dev, unsigned int count)
82{
83	WARN(test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state), "Unreserving GIDs when interfaces are up");
84	WARN(count > dev->roce.reserved_gids.count, "Unreserving %u GIDs when only %u reserved",
85	     count, dev->roce.reserved_gids.count);
86
87	dev->roce.reserved_gids.start += count;
88	dev->roce.reserved_gids.count -= count;
89	mlx5_core_dbg(dev, "%u GIDs starting at %u left reserved\n",
90		      dev->roce.reserved_gids.count,
91		      dev->roce.reserved_gids.start);
92}
93
94int mlx5_core_reserved_gid_alloc(struct mlx5_core_dev *dev, int *gid_index)
95{
96	int end = dev->roce.reserved_gids.start +
97		  dev->roce.reserved_gids.count;
98	int index = 0;
99
100	index = ida_simple_get(&dev->roce.reserved_gids.ida,
101			       dev->roce.reserved_gids.start, end,
102			       GFP_KERNEL);
103	if (index < 0)
104		return index;
105
106	mlx5_core_dbg(dev, "Allocating reserved GID %u\n", index);
107	*gid_index = index;
108	return 0;
109}
110
111void mlx5_core_reserved_gid_free(struct mlx5_core_dev *dev, int gid_index)
112{
113	mlx5_core_dbg(dev, "Freeing reserved GID %u\n", gid_index);
114	ida_simple_remove(&dev->roce.reserved_gids.ida, gid_index);
115}
116
117unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev)
118{
119	return dev->roce.reserved_gids.count;
120}
121EXPORT_SYMBOL_GPL(mlx5_core_reserved_gids_count);
122
123int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
124			   u8 roce_version, u8 roce_l3_type, const u8 *gid,
125			   const u8 *mac, bool vlan, u16 vlan_id)
126{
127#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v)
128	u32  in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
129	u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
130	void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address);
131	char *addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, in_addr,
132					  source_l3_address);
133	void *addr_mac = MLX5_ADDR_OF(roce_addr_layout, in_addr,
134				      source_mac_47_32);
135	int gidsz = MLX5_FLD_SZ_BYTES(roce_addr_layout, source_l3_address);
136
137	if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
138		return -EINVAL;
139
140	if (gid) {
141		if (vlan) {
142			MLX5_SET_RA(in_addr, vlan_valid, 1);
143			MLX5_SET_RA(in_addr, vlan_id, vlan_id);
144		}
145
146		ether_addr_copy(addr_mac, mac);
147		MLX5_SET_RA(in_addr, roce_version, roce_version);
148		MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
149		memcpy(addr_l3_addr, gid, gidsz);
150	}
151
152	MLX5_SET(set_roce_address_in, in, roce_address_index, index);
153	MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS);
154	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
155}
156EXPORT_SYMBOL(mlx5_core_roce_gid_set);
157