1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1998, 2001 Nicolas Souchu
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30#ifndef __IICONF_H
31#define __IICONF_H
32
33#include <sys/queue.h>
34#include <dev/iicbus/iic.h>
35
36
37#define IICPRI (PZERO+8)		/* XXX sleep/wakeup queue priority */
38
39#define LSB 0x1
40
41/*
42 * Options affecting iicbus_request_bus()
43 */
44#define IIC_DONTWAIT	0
45#define IIC_NOINTR	0
46#define IIC_WAIT	0x1
47#define IIC_INTR	0x2
48#define IIC_INTRWAIT	(IIC_INTR | IIC_WAIT)
49#define IIC_RECURSIVE	0x4
50#define IIC_REQBUS_DEV	0x8	/* See struct iic_reqbus_data, below. */
51
52/*
53 * The original iicbus->bridge callback api took a pointer to an int containing
54 * flags.  The new api allows a pointer to this struct, with IIC_REQBUS_DEV set
55 * in the flags to let the implementation know the pointer is actually to this
56 * struct which has the flags word first, followed by the device_t of the
57 * requesting bus and device.
58 *
59 * Note that the requesting device may not be a i2c slave device which is a
60 * child of the requested bus -- it may be a mux device which is electrically
61 * part of the bus hierarchy, but whose driver belongs to some other bus
62 * hierarchy such as gpio.
63 */
64struct iic_reqbus_data {
65	int      flags;      /* Flags from the set defined above. */
66	device_t bus;        /* The iicbus being requested. */
67	device_t dev;        /* The device requesting the bus. */
68};
69
70/*
71 * i2c modes
72 */
73#define IIC_MASTER	0x1
74#define IIC_SLAVE	0x2
75#define IIC_POLLED	0x4
76
77/*
78 * i2c speed
79 */
80#define IIC_UNKNOWN	0x0
81#define IIC_SLOW	0x1
82#define IIC_FAST	0x2
83#define IIC_FASTEST	0x3
84
85#define IIC_LAST_READ	0x1
86
87/*
88 * callback index
89 */
90#define IIC_REQUEST_BUS	0x1
91#define IIC_RELEASE_BUS	0x2
92
93/*
94 * interrupt events
95 */
96#define INTR_GENERAL	0x1	/* general call received */
97#define INTR_START	0x2	/* the I2C interface is addressed */
98#define INTR_STOP	0x3	/* stop condition received */
99#define INTR_RECEIVE	0x4	/* character received */
100#define INTR_TRANSMIT	0x5	/* character to transmit */
101#define INTR_ERROR	0x6	/* error */
102#define INTR_NOACK	0x7	/* no ack from master receiver */
103
104/*
105 * adapter layer errors
106 */
107#define	IIC_NOERR	0x0	/* no error occurred */
108#define IIC_EBUSERR	0x1	/* bus error (hardware not in expected state) */
109#define IIC_ENOACK	0x2	/* ack not received until timeout */
110#define IIC_ETIMEOUT	0x3	/* timeout */
111#define IIC_EBUSBSY	0x4	/* bus busy (reserved by another client) */
112#define IIC_ESTATUS	0x5	/* status error */
113#define IIC_EUNDERFLOW	0x6	/* slave ready for more data */
114#define IIC_EOVERFLOW	0x7	/* too much data */
115#define IIC_ENOTSUPP	0x8	/* request not supported */
116#define IIC_ENOADDR	0x9	/* no address assigned to the interface */
117#define IIC_ERESOURCE	0xa	/* resources (memory, whatever) unavailable */
118#define IIC_ERRNO	__INT_MIN /* marker bit: errno is in low-order bits */
119
120/*
121 * Note that all iicbus functions return IIC_Exxxxx status values,
122 * except iic2errno() (obviously) and iicbus_started() (returns bool).
123 */
124extern int iic2errno(int);
125extern int errno2iic(int);
126extern int iicbus_request_bus(device_t, device_t, int);
127extern int iicbus_release_bus(device_t, device_t);
128extern device_t iicbus_alloc_bus(device_t);
129
130extern void iicbus_intr(device_t, int, char *);
131
132extern int iicbus_null_repeated_start(device_t, u_char);
133extern int iicbus_null_callback(device_t, int, caddr_t);
134
135#define iicbus_reset(bus,speed,addr,oldaddr) \
136	(IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
137
138/* basic I2C operations */
139extern int iicbus_started(device_t);
140extern int iicbus_start(device_t, u_char, int);
141extern int iicbus_stop(device_t);
142extern int iicbus_repeated_start(device_t, u_char, int);
143extern int iicbus_write(device_t, const char *, int, int *, int);
144extern int iicbus_read(device_t, char *, int, int *, int, int);
145
146/* single byte read/write functions, start/stop not managed */
147extern int iicbus_write_byte(device_t, char, int);
148extern int iicbus_read_byte(device_t, char *, int);
149
150/* Read/write operations with start/stop conditions managed */
151extern int iicbus_block_write(device_t, u_char, char *, int, int *);
152extern int iicbus_block_read(device_t, u_char, char *, int, int *);
153
154/* vectors of iic operations to pass to bridge */
155int iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
156int iicbus_transfer_excl(device_t bus, struct iic_msg *msgs, uint32_t nmsgs,
157    int how);
158int iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
159
160/*
161 * Simple register read/write routines, but the "register" can be any size.
162 * The transfers are done with iicbus_transfer_excl().  Reads use a repeat-start
163 * between sending the address and reading; writes use a single start/stop.
164 */
165int iicdev_readfrom(device_t _slavedev, uint8_t _regaddr, void *_buffer,
166    uint16_t _buflen, int _waithow);
167int iicdev_writeto(device_t _slavedev, uint8_t _regaddr, void *_buffer,
168    uint16_t _buflen, int _waithow);
169
170#define IICBUS_MODVER	1
171#define IICBUS_MINVER	1
172#define IICBUS_MAXVER	1
173#define IICBUS_PREFVER	IICBUS_MODVER
174
175extern driver_t iicbb_driver;
176extern devclass_t iicbb_devclass;
177
178#define IICBB_MODVER	1
179#define IICBB_MINVER	1
180#define IICBB_MAXVER	1
181#define IICBB_PREFVER	IICBB_MODVER
182
183#endif
184