1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 5 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 6 * Copyright (c) 2018 Ian Lepore. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD$"); 31 32#include "opt_platform.h" 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bio.h> 37#include <sys/bus.h> 38#include <sys/conf.h> 39#include <sys/kernel.h> 40#include <sys/kthread.h> 41#include <sys/lock.h> 42#include <sys/mbuf.h> 43#include <sys/malloc.h> 44#include <sys/module.h> 45#include <sys/mutex.h> 46#include <geom/geom_disk.h> 47 48#ifdef FDT 49#include <dev/fdt/fdt_common.h> 50#include <dev/ofw/ofw_bus_subr.h> 51#include <dev/ofw/openfirm.h> 52#endif 53 54#include <dev/spibus/spi.h> 55#include "spibus_if.h" 56 57#include <dev/flash/mx25lreg.h> 58 59#define FL_NONE 0x00 60#define FL_ERASE_4K 0x01 61#define FL_ERASE_32K 0x02 62#define FL_ENABLE_4B_ADDR 0x04 63#define FL_DISABLE_4B_ADDR 0x08 64 65/* 66 * Define the sectorsize to be a smaller size rather than the flash 67 * sector size. Trying to run FFS off of a 64k flash sector size 68 * results in a completely un-usable system. 69 */ 70#define MX25L_SECTORSIZE 512 71 72struct mx25l_flash_ident 73{ 74 const char *name; 75 uint8_t manufacturer_id; 76 uint16_t device_id; 77 unsigned int sectorsize; 78 unsigned int sectorcount; 79 unsigned int flags; 80}; 81 82struct mx25l_softc 83{ 84 device_t sc_dev; 85 device_t sc_parent; 86 uint8_t sc_manufacturer_id; 87 uint16_t sc_device_id; 88 unsigned int sc_erasesize; 89 struct mtx sc_mtx; 90 struct disk *sc_disk; 91 struct proc *sc_p; 92 struct bio_queue_head sc_bio_queue; 93 unsigned int sc_flags; 94 unsigned int sc_taskstate; 95 uint8_t sc_dummybuf[FLASH_PAGE_SIZE]; 96}; 97 98#define TSTATE_STOPPED 0 99#define TSTATE_STOPPING 1 100#define TSTATE_RUNNING 2 101 102#define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 103#define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 104#define M25PXX_LOCK_INIT(_sc) \ 105 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 106 "mx25l", MTX_DEF) 107#define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 108#define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 109#define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 110 111/* disk routines */ 112static int mx25l_open(struct disk *dp); 113static int mx25l_close(struct disk *dp); 114static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 115static void mx25l_strategy(struct bio *bp); 116static int mx25l_getattr(struct bio *bp); 117static void mx25l_task(void *arg); 118 119static struct mx25l_flash_ident flash_devices[] = { 120 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 121 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 122 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 123 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 124 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 125 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 126 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 127 { "mx25l1606e", 0xc2, 0x2015, 64 * 1024, 32, FL_ERASE_4K}, 128 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 129 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 130 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 131 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 132 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 133 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 134 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 135 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 136 { "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K }, 137 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 138 139 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 140 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 141 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 142 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 143 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 144 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 145 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 146 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 147 148 /* Atmel */ 149 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 150 151 /* GigaDevice */ 152 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 153 { "gd25q128", 0xc8, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 154}; 155 156static int 157mx25l_wait_for_device_ready(struct mx25l_softc *sc) 158{ 159 uint8_t txBuf[2], rxBuf[2]; 160 struct spi_command cmd; 161 int err; 162 163 memset(&cmd, 0, sizeof(cmd)); 164 165 do { 166 txBuf[0] = CMD_READ_STATUS; 167 cmd.tx_cmd = txBuf; 168 cmd.rx_cmd = rxBuf; 169 cmd.rx_cmd_sz = 2; 170 cmd.tx_cmd_sz = 2; 171 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 172 } while (err == 0 && (rxBuf[1] & STATUS_WIP)); 173 174 return (err); 175} 176 177static struct mx25l_flash_ident* 178mx25l_get_device_ident(struct mx25l_softc *sc) 179{ 180 uint8_t txBuf[8], rxBuf[8]; 181 struct spi_command cmd; 182 uint8_t manufacturer_id; 183 uint16_t dev_id; 184 int err, i; 185 186 memset(&cmd, 0, sizeof(cmd)); 187 memset(txBuf, 0, sizeof(txBuf)); 188 memset(rxBuf, 0, sizeof(rxBuf)); 189 190 txBuf[0] = CMD_READ_IDENT; 191 cmd.tx_cmd = &txBuf; 192 cmd.rx_cmd = &rxBuf; 193 /* 194 * Some compatible devices has extended two-bytes ID 195 * We'll use only manufacturer/deviceid atm 196 */ 197 cmd.tx_cmd_sz = 4; 198 cmd.rx_cmd_sz = 4; 199 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 200 if (err) 201 return (NULL); 202 203 manufacturer_id = rxBuf[1]; 204 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 205 206 for (i = 0; i < nitems(flash_devices); i++) { 207 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 208 (flash_devices[i].device_id == dev_id)) 209 return &flash_devices[i]; 210 } 211 212 device_printf(sc->sc_dev, 213 "Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 214 manufacturer_id, dev_id); 215 return (NULL); 216} 217 218static int 219mx25l_set_writable(struct mx25l_softc *sc, int writable) 220{ 221 uint8_t txBuf[1], rxBuf[1]; 222 struct spi_command cmd; 223 int err; 224 225 memset(&cmd, 0, sizeof(cmd)); 226 memset(txBuf, 0, sizeof(txBuf)); 227 memset(rxBuf, 0, sizeof(rxBuf)); 228 229 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 230 cmd.tx_cmd = txBuf; 231 cmd.rx_cmd = rxBuf; 232 cmd.rx_cmd_sz = 1; 233 cmd.tx_cmd_sz = 1; 234 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 235 return (err); 236} 237 238static int 239mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector) 240{ 241 uint8_t txBuf[5], rxBuf[5]; 242 struct spi_command cmd; 243 int err; 244 245 if ((err = mx25l_set_writable(sc, 1)) != 0) 246 return (err); 247 248 memset(&cmd, 0, sizeof(cmd)); 249 memset(txBuf, 0, sizeof(txBuf)); 250 memset(rxBuf, 0, sizeof(rxBuf)); 251 252 cmd.tx_cmd = txBuf; 253 cmd.rx_cmd = rxBuf; 254 255 if (sc->sc_flags & FL_ERASE_4K) 256 txBuf[0] = CMD_BLOCK_4K_ERASE; 257 else if (sc->sc_flags & FL_ERASE_32K) 258 txBuf[0] = CMD_BLOCK_32K_ERASE; 259 else 260 txBuf[0] = CMD_SECTOR_ERASE; 261 262 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 263 cmd.rx_cmd_sz = 5; 264 cmd.tx_cmd_sz = 5; 265 txBuf[1] = ((sector >> 24) & 0xff); 266 txBuf[2] = ((sector >> 16) & 0xff); 267 txBuf[3] = ((sector >> 8) & 0xff); 268 txBuf[4] = (sector & 0xff); 269 } else { 270 cmd.rx_cmd_sz = 4; 271 cmd.tx_cmd_sz = 4; 272 txBuf[1] = ((sector >> 16) & 0xff); 273 txBuf[2] = ((sector >> 8) & 0xff); 274 txBuf[3] = (sector & 0xff); 275 } 276 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0) 277 return (err); 278 err = mx25l_wait_for_device_ready(sc); 279 return (err); 280} 281 282static int 283mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 284{ 285 uint8_t txBuf[8], rxBuf[8]; 286 struct spi_command cmd; 287 off_t bytes_to_write; 288 int err = 0; 289 290 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 291 cmd.tx_cmd_sz = 5; 292 cmd.rx_cmd_sz = 5; 293 } else { 294 cmd.tx_cmd_sz = 4; 295 cmd.rx_cmd_sz = 4; 296 } 297 298 /* 299 * Writes must be aligned to the erase sectorsize, since blocks are 300 * fully erased before they're written to. 301 */ 302 if (count % sc->sc_erasesize != 0 || offset % sc->sc_erasesize != 0) 303 return (EIO); 304 305 /* 306 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop 307 * to write chunks of FLASH_PAGE_SIZE bytes each. 308 */ 309 while (count != 0) { 310 /* If we crossed a sector boundary, erase the next sector. */ 311 if (((offset) % sc->sc_erasesize) == 0) { 312 err = mx25l_erase_cmd(sc, offset); 313 if (err) 314 break; 315 } 316 317 txBuf[0] = CMD_PAGE_PROGRAM; 318 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 319 txBuf[1] = (offset >> 24) & 0xff; 320 txBuf[2] = (offset >> 16) & 0xff; 321 txBuf[3] = (offset >> 8) & 0xff; 322 txBuf[4] = offset & 0xff; 323 } else { 324 txBuf[1] = (offset >> 16) & 0xff; 325 txBuf[2] = (offset >> 8) & 0xff; 326 txBuf[3] = offset & 0xff; 327 } 328 329 bytes_to_write = MIN(FLASH_PAGE_SIZE, count); 330 cmd.tx_cmd = txBuf; 331 cmd.rx_cmd = rxBuf; 332 cmd.tx_data = data; 333 cmd.rx_data = sc->sc_dummybuf; 334 cmd.tx_data_sz = (uint32_t)bytes_to_write; 335 cmd.rx_data_sz = (uint32_t)bytes_to_write; 336 337 /* 338 * Each completed write operation resets WEL (write enable 339 * latch) to disabled state, so we re-enable it here. 340 */ 341 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 342 break; 343 if ((err = mx25l_set_writable(sc, 1)) != 0) 344 break; 345 346 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 347 if (err != 0) 348 break; 349 err = mx25l_wait_for_device_ready(sc); 350 if (err) 351 break; 352 353 data += bytes_to_write; 354 offset += bytes_to_write; 355 count -= bytes_to_write; 356 } 357 358 return (err); 359} 360 361static int 362mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 363{ 364 uint8_t txBuf[8], rxBuf[8]; 365 struct spi_command cmd; 366 int err = 0; 367 368 /* 369 * Enforce that reads are aligned to the disk sectorsize, not the 370 * erase sectorsize. In this way, smaller read IO is possible, 371 * dramatically speeding up filesystem/geom_compress access. 372 */ 373 if (count % sc->sc_disk->d_sectorsize != 0 || 374 offset % sc->sc_disk->d_sectorsize != 0) 375 return (EIO); 376 377 txBuf[0] = CMD_FAST_READ; 378 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 379 cmd.tx_cmd_sz = 6; 380 cmd.rx_cmd_sz = 6; 381 382 txBuf[1] = (offset >> 24) & 0xff; 383 txBuf[2] = (offset >> 16) & 0xff; 384 txBuf[3] = (offset >> 8) & 0xff; 385 txBuf[4] = offset & 0xff; 386 /* Dummy byte */ 387 txBuf[5] = 0; 388 } else { 389 cmd.tx_cmd_sz = 5; 390 cmd.rx_cmd_sz = 5; 391 392 txBuf[1] = (offset >> 16) & 0xff; 393 txBuf[2] = (offset >> 8) & 0xff; 394 txBuf[3] = offset & 0xff; 395 /* Dummy byte */ 396 txBuf[4] = 0; 397 } 398 399 cmd.tx_cmd = txBuf; 400 cmd.rx_cmd = rxBuf; 401 cmd.tx_data = data; 402 cmd.rx_data = data; 403 cmd.tx_data_sz = count; 404 cmd.rx_data_sz = count; 405 406 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 407 return (err); 408} 409 410static int 411mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command) 412{ 413 uint8_t txBuf[1], rxBuf[1]; 414 struct spi_command cmd; 415 int err; 416 417 memset(&cmd, 0, sizeof(cmd)); 418 memset(txBuf, 0, sizeof(txBuf)); 419 memset(rxBuf, 0, sizeof(rxBuf)); 420 421 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 422 423 cmd.tx_cmd = txBuf; 424 cmd.rx_cmd = rxBuf; 425 426 txBuf[0] = command; 427 428 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0) 429 err = mx25l_wait_for_device_ready(sc); 430 431 return (err); 432} 433 434#ifdef FDT 435static struct ofw_compat_data compat_data[] = { 436 { "st,m25p", 1 }, 437 { "jedec,spi-nor", 1 }, 438 { NULL, 0 }, 439}; 440#endif 441 442static int 443mx25l_probe(device_t dev) 444{ 445#ifdef FDT 446 int i; 447 448 if (!ofw_bus_status_okay(dev)) 449 return (ENXIO); 450 451 /* First try to match the compatible property to the compat_data */ 452 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 453 goto found; 454 455 /* 456 * Next, try to find a compatible device using the names in the 457 * flash_devices structure 458 */ 459 for (i = 0; i < nitems(flash_devices); i++) 460 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 461 goto found; 462 463 return (ENXIO); 464found: 465#endif 466 device_set_desc(dev, "M25Pxx Flash Family"); 467 468 return (0); 469} 470 471static int 472mx25l_attach(device_t dev) 473{ 474 struct mx25l_softc *sc; 475 struct mx25l_flash_ident *ident; 476 int err; 477 478 sc = device_get_softc(dev); 479 sc->sc_dev = dev; 480 sc->sc_parent = device_get_parent(sc->sc_dev); 481 482 M25PXX_LOCK_INIT(sc); 483 484 ident = mx25l_get_device_ident(sc); 485 if (ident == NULL) 486 return (ENXIO); 487 488 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 489 return (err); 490 491 sc->sc_flags = ident->flags; 492 493 if (sc->sc_flags & FL_ERASE_4K) 494 sc->sc_erasesize = 4 * 1024; 495 else if (sc->sc_flags & FL_ERASE_32K) 496 sc->sc_erasesize = 32 * 1024; 497 else 498 sc->sc_erasesize = ident->sectorsize; 499 500 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 501 if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0) 502 return (err); 503 } else if (sc->sc_flags & FL_DISABLE_4B_ADDR) { 504 if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0) 505 return (err); 506 } 507 508 sc->sc_disk = disk_alloc(); 509 sc->sc_disk->d_open = mx25l_open; 510 sc->sc_disk->d_close = mx25l_close; 511 sc->sc_disk->d_strategy = mx25l_strategy; 512 sc->sc_disk->d_getattr = mx25l_getattr; 513 sc->sc_disk->d_ioctl = mx25l_ioctl; 514 sc->sc_disk->d_name = "flash/spi"; 515 sc->sc_disk->d_drv1 = sc; 516 sc->sc_disk->d_maxsize = DFLTPHYS; 517 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 518 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 519 sc->sc_disk->d_stripesize = sc->sc_erasesize; 520 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 521 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 522 strlcpy(sc->sc_disk->d_descr, ident->name, 523 sizeof(sc->sc_disk->d_descr)); 524 525 disk_create(sc->sc_disk, DISK_VERSION); 526 bioq_init(&sc->sc_bio_queue); 527 528 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 529 sc->sc_taskstate = TSTATE_RUNNING; 530 531 device_printf(sc->sc_dev, 532 "device type %s, size %dK in %d sectors of %dK, erase size %dK\n", 533 ident->name, 534 ident->sectorcount * ident->sectorsize / 1024, 535 ident->sectorcount, ident->sectorsize / 1024, 536 sc->sc_erasesize / 1024); 537 538 return (0); 539} 540 541static int 542mx25l_detach(device_t dev) 543{ 544 struct mx25l_softc *sc; 545 int err; 546 547 sc = device_get_softc(dev); 548 err = 0; 549 550 M25PXX_LOCK(sc); 551 if (sc->sc_taskstate == TSTATE_RUNNING) { 552 sc->sc_taskstate = TSTATE_STOPPING; 553 wakeup(sc); 554 while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) { 555 err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3); 556 if (err != 0) { 557 sc->sc_taskstate = TSTATE_RUNNING; 558 device_printf(sc->sc_dev, 559 "Failed to stop queue task\n"); 560 } 561 } 562 } 563 M25PXX_UNLOCK(sc); 564 565 if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) { 566 disk_destroy(sc->sc_disk); 567 bioq_flush(&sc->sc_bio_queue, NULL, ENXIO); 568 M25PXX_LOCK_DESTROY(sc); 569 } 570 return (err); 571} 572 573static int 574mx25l_open(struct disk *dp) 575{ 576 return (0); 577} 578 579static int 580mx25l_close(struct disk *dp) 581{ 582 583 return (0); 584} 585 586static int 587mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 588 struct thread *td) 589{ 590 591 return (EINVAL); 592} 593 594static void 595mx25l_strategy(struct bio *bp) 596{ 597 struct mx25l_softc *sc; 598 599 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 600 M25PXX_LOCK(sc); 601 bioq_disksort(&sc->sc_bio_queue, bp); 602 wakeup(sc); 603 M25PXX_UNLOCK(sc); 604} 605 606static int 607mx25l_getattr(struct bio *bp) 608{ 609 struct mx25l_softc *sc; 610 device_t dev; 611 612 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 613 return (ENXIO); 614 615 sc = bp->bio_disk->d_drv1; 616 dev = sc->sc_dev; 617 618 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 619 if (bp->bio_length != sizeof(dev)) 620 return (EFAULT); 621 bcopy(&dev, bp->bio_data, sizeof(dev)); 622 } else 623 return (-1); 624 return (0); 625} 626 627static void 628mx25l_task(void *arg) 629{ 630 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 631 struct bio *bp; 632 device_t dev; 633 634 for (;;) { 635 dev = sc->sc_dev; 636 M25PXX_LOCK(sc); 637 do { 638 if (sc->sc_taskstate == TSTATE_STOPPING) { 639 sc->sc_taskstate = TSTATE_STOPPED; 640 M25PXX_UNLOCK(sc); 641 wakeup(sc); 642 kproc_exit(0); 643 } 644 bp = bioq_first(&sc->sc_bio_queue); 645 if (bp == NULL) 646 msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0); 647 } while (bp == NULL); 648 bioq_remove(&sc->sc_bio_queue, bp); 649 M25PXX_UNLOCK(sc); 650 651 switch (bp->bio_cmd) { 652 case BIO_READ: 653 bp->bio_error = mx25l_read(sc, bp->bio_offset, 654 bp->bio_data, bp->bio_bcount); 655 break; 656 case BIO_WRITE: 657 bp->bio_error = mx25l_write(sc, bp->bio_offset, 658 bp->bio_data, bp->bio_bcount); 659 break; 660 default: 661 bp->bio_error = EINVAL; 662 } 663 664 665 biodone(bp); 666 } 667} 668 669static devclass_t mx25l_devclass; 670 671static device_method_t mx25l_methods[] = { 672 /* Device interface */ 673 DEVMETHOD(device_probe, mx25l_probe), 674 DEVMETHOD(device_attach, mx25l_attach), 675 DEVMETHOD(device_detach, mx25l_detach), 676 677 { 0, 0 } 678}; 679 680static driver_t mx25l_driver = { 681 "mx25l", 682 mx25l_methods, 683 sizeof(struct mx25l_softc), 684}; 685 686DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0); 687MODULE_DEPEND(mx25l, spibus, 1, 1, 1); 688#ifdef FDT 689MODULE_DEPEND(mx25l, fdt_slicer, 1, 1, 1); 690SPIBUS_FDT_PNP_INFO(compat_data); 691#endif 692