1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright �� 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 *	Eric Anholt <eric@anholt.net>
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD$");
30
31#include <dev/drm2/drmP.h>
32#include <dev/drm2/drm_crtc.h>
33#include <dev/drm2/i915/intel_drv.h>
34#include <dev/drm2/i915/i915_drm.h>
35#include <dev/drm2/i915/i915_drv.h>
36#include <dev/drm2/i915/dvo.h>
37
38#define SIL164_ADDR	0x38
39#define CH7xxx_ADDR	0x76
40#define TFP410_ADDR	0x38
41#define NS2501_ADDR     0x38
42
43static const struct intel_dvo_device intel_dvo_devices[] = {
44	{
45		.type = INTEL_DVO_CHIP_TMDS,
46		.name = "sil164",
47		.dvo_reg = DVOC,
48		.slave_addr = SIL164_ADDR,
49		.dev_ops = &sil164_ops,
50	},
51	{
52		.type = INTEL_DVO_CHIP_TMDS,
53		.name = "ch7xxx",
54		.dvo_reg = DVOC,
55		.slave_addr = CH7xxx_ADDR,
56		.dev_ops = &ch7xxx_ops,
57	},
58	{
59		.type = INTEL_DVO_CHIP_LVDS,
60		.name = "ivch",
61		.dvo_reg = DVOA,
62		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
63		.dev_ops = &ivch_ops,
64	},
65	{
66		.type = INTEL_DVO_CHIP_TMDS,
67		.name = "tfp410",
68		.dvo_reg = DVOC,
69		.slave_addr = TFP410_ADDR,
70		.dev_ops = &tfp410_ops,
71	},
72	{
73		.type = INTEL_DVO_CHIP_LVDS,
74		.name = "ch7017",
75		.dvo_reg = DVOC,
76		.slave_addr = 0x75,
77		.gpio = GMBUS_PORT_DPB,
78		.dev_ops = &ch7017_ops,
79	},
80	{
81	        .type = INTEL_DVO_CHIP_TMDS,
82		.name = "ns2501",
83		.dvo_reg = DVOC,
84		.slave_addr = NS2501_ADDR,
85		.dev_ops = &ns2501_ops,
86       }
87};
88
89struct intel_dvo {
90	struct intel_encoder base;
91
92	struct intel_dvo_device dev;
93
94	struct drm_display_mode *panel_fixed_mode;
95	bool panel_wants_dither;
96};
97
98static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
99{
100	return container_of(encoder, struct intel_dvo, base.base);
101}
102
103static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
104{
105	return container_of(intel_attached_encoder(connector),
106			    struct intel_dvo, base);
107}
108
109static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
110{
111	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
112
113	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
114}
115
116static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
117				   enum pipe *pipe)
118{
119	struct drm_device *dev = encoder->base.dev;
120	struct drm_i915_private *dev_priv = dev->dev_private;
121	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
122	u32 tmp;
123
124	tmp = I915_READ(intel_dvo->dev.dvo_reg);
125
126	if (!(tmp & DVO_ENABLE))
127		return false;
128
129	*pipe = PORT_TO_PIPE(tmp);
130
131	return true;
132}
133
134static void intel_disable_dvo(struct intel_encoder *encoder)
135{
136	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
137	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
138	u32 dvo_reg = intel_dvo->dev.dvo_reg;
139	u32 temp = I915_READ(dvo_reg);
140
141	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
142	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
143	I915_READ(dvo_reg);
144}
145
146static void intel_enable_dvo(struct intel_encoder *encoder)
147{
148	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
149	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
150	u32 dvo_reg = intel_dvo->dev.dvo_reg;
151	u32 temp = I915_READ(dvo_reg);
152
153	I915_WRITE(dvo_reg, temp | DVO_ENABLE);
154	I915_READ(dvo_reg);
155	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
156}
157
158static void intel_dvo_dpms(struct drm_connector *connector, int mode)
159{
160	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
161	struct drm_crtc *crtc;
162
163	/* dvo supports only 2 dpms states. */
164	if (mode != DRM_MODE_DPMS_ON)
165		mode = DRM_MODE_DPMS_OFF;
166
167	if (mode == connector->dpms)
168		return;
169
170	connector->dpms = mode;
171
172	/* Only need to change hw state when actually enabled */
173	crtc = intel_dvo->base.base.crtc;
174	if (!crtc) {
175		intel_dvo->base.connectors_active = false;
176		return;
177	}
178
179	if (mode == DRM_MODE_DPMS_ON) {
180		intel_dvo->base.connectors_active = true;
181
182		intel_crtc_update_dpms(crtc);
183
184		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
185	} else {
186		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
187
188		intel_dvo->base.connectors_active = false;
189
190		intel_crtc_update_dpms(crtc);
191	}
192
193	intel_modeset_check_state(connector->dev);
194}
195
196static int intel_dvo_mode_valid(struct drm_connector *connector,
197				struct drm_display_mode *mode)
198{
199	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
200
201	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
202		return MODE_NO_DBLESCAN;
203
204	/* XXX: Validate clock range */
205
206	if (intel_dvo->panel_fixed_mode) {
207		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
208			return MODE_PANEL;
209		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
210			return MODE_PANEL;
211	}
212
213	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
214}
215
216static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
217				 const struct drm_display_mode *mode,
218				 struct drm_display_mode *adjusted_mode)
219{
220	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
221
222	/* If we have timings from the BIOS for the panel, put them in
223	 * to the adjusted mode.  The CRTC will be set up for this mode,
224	 * with the panel scaling set up to source from the H/VDisplay
225	 * of the original mode.
226	 */
227	if (intel_dvo->panel_fixed_mode != NULL) {
228#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
229		C(hdisplay);
230		C(hsync_start);
231		C(hsync_end);
232		C(htotal);
233		C(vdisplay);
234		C(vsync_start);
235		C(vsync_end);
236		C(vtotal);
237		C(clock);
238#undef C
239	}
240
241	if (intel_dvo->dev.dev_ops->mode_fixup)
242		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
243
244	return true;
245}
246
247static void intel_dvo_mode_set(struct drm_encoder *encoder,
248			       struct drm_display_mode *mode,
249			       struct drm_display_mode *adjusted_mode)
250{
251	struct drm_device *dev = encoder->dev;
252	struct drm_i915_private *dev_priv = dev->dev_private;
253	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
254	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
255	int pipe = intel_crtc->pipe;
256	u32 dvo_val;
257	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
258	int dpll_reg = DPLL(pipe);
259
260	switch (dvo_reg) {
261	case DVOA:
262	default:
263		dvo_srcdim_reg = DVOA_SRCDIM;
264		break;
265	case DVOB:
266		dvo_srcdim_reg = DVOB_SRCDIM;
267		break;
268	case DVOC:
269		dvo_srcdim_reg = DVOC_SRCDIM;
270		break;
271	}
272
273	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
274
275	/* Save the data order, since I don't know what it should be set to. */
276	dvo_val = I915_READ(dvo_reg) &
277		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
278	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
279		   DVO_BLANK_ACTIVE_HIGH;
280
281	if (pipe == 1)
282		dvo_val |= DVO_PIPE_B_SELECT;
283	dvo_val |= DVO_PIPE_STALL;
284	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
285		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
286	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
287		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
288
289	I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
290
291	/*I915_WRITE(DVOB_SRCDIM,
292	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
293	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
294	I915_WRITE(dvo_srcdim_reg,
295		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
296		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
297	/*I915_WRITE(DVOB, dvo_val);*/
298	I915_WRITE(dvo_reg, dvo_val);
299}
300
301/**
302 * Detect the output connection on our DVO device.
303 *
304 * Unimplemented.
305 */
306static enum drm_connector_status
307intel_dvo_detect(struct drm_connector *connector, bool force)
308{
309	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
310	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
311}
312
313static int intel_dvo_get_modes(struct drm_connector *connector)
314{
315	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
316	struct drm_i915_private *dev_priv = connector->dev->dev_private;
317
318	/* We should probably have an i2c driver get_modes function for those
319	 * devices which will have a fixed set of modes determined by the chip
320	 * (TV-out, for example), but for now with just TMDS and LVDS,
321	 * that's not the case.
322	 */
323	intel_ddc_get_modes(connector,
324			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
325	if (!list_empty(&connector->probed_modes))
326		return 1;
327
328	if (intel_dvo->panel_fixed_mode != NULL) {
329		struct drm_display_mode *mode;
330		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
331		if (mode) {
332			drm_mode_probed_add(connector, mode);
333			return 1;
334		}
335	}
336
337	return 0;
338}
339
340static void intel_dvo_destroy(struct drm_connector *connector)
341{
342	drm_connector_cleanup(connector);
343	free(connector, DRM_MEM_KMS);
344}
345
346static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
347	.mode_fixup = intel_dvo_mode_fixup,
348	.mode_set = intel_dvo_mode_set,
349	.disable = intel_encoder_noop,
350};
351
352static const struct drm_connector_funcs intel_dvo_connector_funcs = {
353	.dpms = intel_dvo_dpms,
354	.detect = intel_dvo_detect,
355	.destroy = intel_dvo_destroy,
356	.fill_modes = drm_helper_probe_single_connector_modes,
357};
358
359static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
360	.mode_valid = intel_dvo_mode_valid,
361	.get_modes = intel_dvo_get_modes,
362	.best_encoder = intel_best_encoder,
363};
364
365static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
366{
367	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
368
369	if (intel_dvo->dev.dev_ops->destroy)
370		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
371
372	free(intel_dvo->panel_fixed_mode, DRM_MEM_KMS);
373
374	intel_encoder_destroy(encoder);
375}
376
377static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
378	.destroy = intel_dvo_enc_destroy,
379};
380
381/**
382 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
383 *
384 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
385 * chip being on DVOB/C and having multiple pipes.
386 */
387static struct drm_display_mode *
388intel_dvo_get_current_mode(struct drm_connector *connector)
389{
390	struct drm_device *dev = connector->dev;
391	struct drm_i915_private *dev_priv = dev->dev_private;
392	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
393	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
394	struct drm_display_mode *mode = NULL;
395
396	/* If the DVO port is active, that'll be the LVDS, so we can pull out
397	 * its timings to get how the BIOS set up the panel.
398	 */
399	if (dvo_val & DVO_ENABLE) {
400		struct drm_crtc *crtc;
401		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
402
403		crtc = intel_get_crtc_for_pipe(dev, pipe);
404		if (crtc) {
405			mode = intel_crtc_mode_get(dev, crtc);
406			if (mode) {
407				mode->type |= DRM_MODE_TYPE_PREFERRED;
408				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
409					mode->flags |= DRM_MODE_FLAG_PHSYNC;
410				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
411					mode->flags |= DRM_MODE_FLAG_PVSYNC;
412			}
413		}
414	}
415
416	return mode;
417}
418
419void intel_dvo_init(struct drm_device *dev)
420{
421	struct drm_i915_private *dev_priv = dev->dev_private;
422	struct intel_encoder *intel_encoder;
423	struct intel_dvo *intel_dvo;
424	struct intel_connector *intel_connector;
425	int i;
426	int encoder_type = DRM_MODE_ENCODER_NONE;
427
428	intel_dvo = malloc(sizeof(struct intel_dvo), DRM_MEM_KMS, M_WAITOK | M_ZERO);
429	if (!intel_dvo)
430		return;
431
432	intel_connector = malloc(sizeof(struct intel_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO);
433	if (!intel_connector) {
434		free(intel_dvo, DRM_MEM_KMS);
435		return;
436	}
437
438	intel_encoder = &intel_dvo->base;
439	drm_encoder_init(dev, &intel_encoder->base,
440			 &intel_dvo_enc_funcs, encoder_type);
441
442	intel_encoder->disable = intel_disable_dvo;
443	intel_encoder->enable = intel_enable_dvo;
444	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
445	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
446
447	/* Now, try to find a controller */
448	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
449		struct drm_connector *connector = &intel_connector->base;
450		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
451		device_t i2c;
452		int gpio;
453		bool dvoinit;
454
455		/* Allow the I2C driver info to specify the GPIO to be used in
456		 * special cases, but otherwise default to what's defined
457		 * in the spec.
458		 */
459		if (intel_gmbus_is_port_valid(dvo->gpio))
460			gpio = dvo->gpio;
461		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
462			gpio = GMBUS_PORT_SSC;
463		else
464			gpio = GMBUS_PORT_DPB;
465
466		/* Set up the I2C bus necessary for the chip we're probing.
467		 * It appears that everything is on GPIOE except for panels
468		 * on i830 laptops, which are on GPIOB (DVOA).
469		 */
470		i2c = intel_gmbus_get_adapter(dev_priv, gpio);
471
472		intel_dvo->dev = *dvo;
473
474		/* GMBUS NAK handling seems to be unstable, hence let the
475		 * transmitter detection run in bit banging mode for now.
476		 */
477		intel_gmbus_force_bit(i2c, true);
478
479		dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
480
481		intel_gmbus_force_bit(i2c, false);
482
483		if (!dvoinit)
484			continue;
485
486		intel_encoder->type = INTEL_OUTPUT_DVO;
487		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
488		switch (dvo->type) {
489		case INTEL_DVO_CHIP_TMDS:
490			intel_encoder->cloneable = true;
491			drm_connector_init(dev, connector,
492					   &intel_dvo_connector_funcs,
493					   DRM_MODE_CONNECTOR_DVII);
494			encoder_type = DRM_MODE_ENCODER_TMDS;
495			break;
496		case INTEL_DVO_CHIP_LVDS:
497			intel_encoder->cloneable = false;
498			drm_connector_init(dev, connector,
499					   &intel_dvo_connector_funcs,
500					   DRM_MODE_CONNECTOR_LVDS);
501			encoder_type = DRM_MODE_ENCODER_LVDS;
502			break;
503		}
504
505		drm_connector_helper_add(connector,
506					 &intel_dvo_connector_helper_funcs);
507		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
508		connector->interlace_allowed = false;
509		connector->doublescan_allowed = false;
510
511		drm_encoder_helper_add(&intel_encoder->base,
512				       &intel_dvo_helper_funcs);
513
514		intel_connector_attach_encoder(intel_connector, intel_encoder);
515		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
516			/* For our LVDS chipsets, we should hopefully be able
517			 * to dig the fixed panel mode out of the BIOS data.
518			 * However, it's in a different format from the BIOS
519			 * data on chipsets with integrated LVDS (stored in AIM
520			 * headers, likely), so for now, just get the current
521			 * mode being output through DVO.
522			 */
523			intel_dvo->panel_fixed_mode =
524				intel_dvo_get_current_mode(connector);
525			intel_dvo->panel_wants_dither = true;
526		}
527
528		return;
529	}
530
531	drm_encoder_cleanup(&intel_encoder->base);
532	free(intel_dvo, DRM_MEM_KMS);
533	free(intel_connector, DRM_MEM_KMS);
534}
535