1/***********************license start*************** 2 * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Inc. nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41/** 42 * @file 43 * Small utility functions and macros to ease programming of Octeon. 44 * 45 * <hr>$Revision: 38306 $<hr> 46*/ 47#ifndef __CVMX_UTILS_H__ 48#define __CVMX_UTILS_H__ 49 50#if !defined(__FreeBSD__) || !defined(_KERNEL) 51#include <stdarg.h> 52#endif 53 54#ifdef __cplusplus 55extern "C" { 56#endif 57 58#ifndef TRUE 59#define FALSE 0 60#define TRUE (!(FALSE)) 61#endif 62 63/* 64 * The macros cvmx_likely and cvmx_unlikely use the 65 * __builtin_expect GCC operation to control branch 66 * probabilities for a conditional. For example, an "if" 67 * statement in the code that will almost always be 68 * executed should be written as "if (cvmx_likely(...))". 69 * If the "else" section of an if statement is more 70 * probable, use "if (cvmx_unlikey(...))". 71 */ 72#define cvmx_likely(x) __builtin_expect(!!(x), 1) 73#define cvmx_unlikely(x) __builtin_expect(!!(x), 0) 74 75#if CVMX_ENABLE_DEBUG_PRINTS 76 #ifdef CVMX_BUILD_FOR_LINUX_KERNEL 77 #define cvmx_dprintf printk 78 #define cvmx_dvprintf vprintk 79 #elif defined(CVMX_BUILD_FOR_FREEBSD_KERNEL) 80 void cvmx_dvprintf(const char *, va_list); 81 void cvmx_dprintf(const char *, ...) __attribute__ ((format(printf, 1, 2))); 82 #else 83 #define cvmx_dprintf printf 84 #define cvmx_dvprintf vprintf 85 #endif 86#else 87 static inline void cvmx_dvprintf(const char *format, va_list ap) 88 { 89 /* Prints are disbled, do nothing */ 90 } 91 92 static inline void cvmx_dprintf(const char *format, ...) __attribute__ ((format(printf, 1, 2))); 93 static inline void cvmx_dprintf(const char *format, ...) 94 { 95 /* Prints are disbled, do nothing */ 96 } 97#endif 98 99#define CAST64(v) ((long long)(long)(v)) // use only when 'v' is a pointer 100#define CASTPTR(type, v) ((type *)(long)(v)) 101#define CVMX_CACHE_LINE_SIZE (128) // In bytes 102#define CVMX_CACHE_LINE_MASK (CVMX_CACHE_LINE_SIZE - 1) // In bytes 103#define CVMX_CACHE_LINE_ALIGNED __attribute__ ((aligned (CVMX_CACHE_LINE_SIZE))) 104 105/** 106 * This macro spins on a field waiting for it to reach a value. It 107 * is common in code to need to wait for a specific field in a CSR 108 * to match a specific value. Conceptually this macro expands to: 109 * 110 * 1) read csr at "address" with a csr typedef of "type" 111 * 2) Check if ("type".s."field" "op" "value") 112 * 3) If #2 isn't true loop to #1 unless too much time has passed. 113 */ 114#define CVMX_WAIT_FOR_FIELD64(address, type, field, op, value, timeout_usec)\ 115 ({int result; \ 116 do { \ 117 uint64_t done = cvmx_clock_get_count(CVMX_CLOCK_CORE) + (uint64_t)timeout_usec * \ 118 cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000000; \ 119 type c; \ 120 while (1) \ 121 { \ 122 c.u64 = cvmx_read_csr(address); \ 123 if ((c.s.field) op (value)) { \ 124 result = 0; \ 125 break; \ 126 } else if (cvmx_clock_get_count(CVMX_CLOCK_CORE) > done) { \ 127 result = -1; \ 128 break; \ 129 } else \ 130 cvmx_wait(100); \ 131 } \ 132 } while (0); \ 133 result;}) 134 135#define CVMX_BUILD_ASSERT_ZERO(e) (sizeof(struct {int __static_assert:(e)?1:-1;})) 136#define CVMX_BUILD_ASSERT(condition) ((void)CVMX_BUILD_ASSERT_ZERO(condition)) 137 138/** 139 * Builds a bit mask given the required size in bits. 140 * 141 * @param bits Number of bits in the mask 142 * @return The mask 143 */ 144static inline uint64_t cvmx_build_mask(uint64_t bits) 145{ 146 return ~((~0x0ull) << bits); 147} 148 149 150/** 151 * Builds a memory address for I/O based on the Major and Sub DID. 152 * 153 * @param major_did 5 bit major did 154 * @param sub_did 3 bit sub did 155 * @return I/O base address 156 */ 157static inline uint64_t cvmx_build_io_address(uint64_t major_did, uint64_t sub_did) 158{ 159 return ((0x1ull << 48) | (major_did << 43) | (sub_did << 40)); 160} 161 162 163/** 164 * Perform mask and shift to place the supplied value into 165 * the supplied bit rage. 166 * 167 * Example: cvmx_build_bits(39,24,value) 168 * <pre> 169 * 6 5 4 3 3 2 1 170 * 3 5 7 9 1 3 5 7 0 171 * +-------+-------+-------+-------+-------+-------+-------+------+ 172 * 000000000000000000000000___________value000000000000000000000000 173 * </pre> 174 * 175 * @param high_bit Highest bit value can occupy (inclusive) 0-63 176 * @param low_bit Lowest bit value can occupy inclusive 0-high_bit 177 * @param value Value to use 178 * @return Value masked and shifted 179 */ 180static inline uint64_t cvmx_build_bits(uint64_t high_bit, uint64_t low_bit, uint64_t value) 181{ 182 return ((value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit); 183} 184 185 186/** 187 * Return the number of cores available in the chip 188 * 189 * @return 190 */ 191static inline uint32_t cvmx_octeon_num_cores(void) 192{ 193 uint32_t ciu_fuse = (uint32_t)cvmx_read_csr(CVMX_CIU_FUSE) & 0xffffffffull; 194 return cvmx_pop(ciu_fuse); 195} 196 197 198/** 199 * Return true if Octeon is CN36XX 200 * 201 * @return 202 */ 203static inline int cvmx_octeon_model_CN36XX(void) 204{ 205 return(OCTEON_IS_MODEL(OCTEON_CN38XX) 206 &&cvmx_fuse_read(264)); 207} 208 209 210#ifdef __cplusplus 211} 212#endif 213 214#endif /* __CVMX_UTILS_H__ */ 215 216