1/*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the University of 18 * California, Berkeley and its contributors. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)profile.h 8.1 (Berkeley) 6/11/93 36 * $FreeBSD$ 37 */ 38 39#ifndef _MACHINE_PROFILE_H_ 40#define _MACHINE_PROFILE_H_ 41 42/* 43 * Config generates something to tell the compiler to align functions on 32 44 * byte boundaries. A strict alignment is good for keeping the tables small. 45 */ 46#define FUNCTION_ALIGNMENT 16 47 48 49#define _MCOUNT_DECL void mcount 50 51typedef u_long fptrdiff_t; 52 53/* 54 * Cannot implement mcount in C as GCC will trash the ip register when it 55 * pushes a trapframe. Pity we cannot insert assembly before the function 56 * prologue. 57 */ 58 59#ifndef PLTSYM 60#define PLTSYM 61#endif 62 63#define MCOUNT \ 64 __asm__(".text"); \ 65 __asm__(".align 2"); \ 66 __asm__(".type __mcount ,%function"); \ 67 __asm__(".global __mcount"); \ 68 __asm__("__mcount:"); \ 69 /* \ 70 * Preserve registers that are trashed during mcount \ 71 */ \ 72 __asm__("stmfd sp!, {r0-r3, ip, lr}"); \ 73 /* \ 74 * find the return address for mcount, \ 75 * and the return address for mcount's caller. \ 76 * \ 77 * frompcindex = pc pushed by call into self. \ 78 */ \ 79 __asm__("mov r0, ip"); \ 80 /* \ 81 * selfpc = pc pushed by mcount call \ 82 */ \ 83 __asm__("mov r1, lr"); \ 84 /* \ 85 * Call the real mcount code \ 86 */ \ 87 __asm__("bl mcount"); \ 88 /* \ 89 * Restore registers that were trashed during mcount \ 90 */ \ 91 __asm__("ldmfd sp!, {r0-r3, lr}"); \ 92 /* \ 93 * Return to the caller. Loading lr and pc in one instruction \ 94 * is deprecated on ARMv7 so we need this on its own. \ 95 */ \ 96 __asm__("ldmfd sp!, {pc}"); 97void bintr(void); 98void btrap(void); 99void eintr(void); 100void user(void); 101 102#define MCOUNT_FROMPC_USER(pc) \ 103 ((pc < (uintfptr_t)VM_MAXUSER_ADDRESS) ? (uintfptr_t)user : pc) 104 105#define MCOUNT_FROMPC_INTR(pc) \ 106 ((pc >= (uintfptr_t)btrap && pc < (uintfptr_t)eintr) ? \ 107 ((pc >= (uintfptr_t)bintr) ? (uintfptr_t)bintr : \ 108 (uintfptr_t)btrap) : ~0U) 109 110 111#ifdef _KERNEL 112 113#define MCOUNT_DECL(s) register_t s; 114 115#include <machine/asm.h> 116#include <machine/cpufunc.h> 117/* 118 * splhigh() and splx() are heavyweight, and call mcount(). Therefore 119 * we disabled interrupts (IRQ, but not FIQ) directly on the CPU. 120 * 121 * We're lucky that the CPSR and 's' both happen to be 'int's. 122 */ 123#define MCOUNT_ENTER(s) {s = intr_disable(); } /* kill IRQ */ 124#define MCOUNT_EXIT(s) {intr_restore(s); } /* restore old value */ 125 126void mcount(uintfptr_t frompc, uintfptr_t selfpc); 127 128#else 129typedef u_int uintfptr_t; 130#endif /* _KERNEL */ 131 132#endif /* !_MACHINE_PROFILE_H_ */ 133