1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1992, 1993
5 *	The Regents of the University of California.  All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 *    may be used to endorse or promote products derived from this software
21 *    without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 *	@(#)fpu_arith.h	8.1 (Berkeley) 6/11/93
36 *	$NetBSD: fpu_arith.h,v 1.3 2000/07/24 04:11:03 mycroft Exp $
37 * $FreeBSD$
38 */
39
40/*
41 * Extended-precision arithmetic.
42 *
43 * We hold the notion of a `carry register', which may or may not be a
44 * machine carry bit or register.  On the SPARC, it is just the machine's
45 * carry bit.
46 *
47 * In the worst case, you can compute the carry from x+y as
48 *	(unsigned)(x + y) < (unsigned)x
49 * and from x+y+c as
50 *	((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
51 * for example.
52 */
53
54/* set up for extended-precision arithemtic */
55#define	FPU_DECL_CARRY
56
57/*
58 * We have three kinds of add:
59 *	add with carry:					  r = x + y + c
60 *	add (ignoring current carry) and set carry:	c'r = x + y + 0
61 *	add with carry and set carry:			c'r = x + y + c
62 * The macros use `C' for `use carry' and `S' for `set carry'.
63 * Note that the state of the carry is undefined after ADDC and SUBC,
64 * so if all you have for these is `add with carry and set carry',
65 * that is OK.
66 *
67 * The same goes for subtract, except that we compute x - y - c.
68 *
69 * Finally, we have a way to get the carry into a `regular' variable,
70 * or set it from a value.  SET_CARRY turns 0 into no-carry, nonzero
71 * into carry; GET_CARRY sets its argument to 0 or 1.
72 */
73#define	FPU_ADDC(r, x, y) \
74	__asm __volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
75#define	FPU_ADDS(r, x, y) \
76	__asm __volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
77#define	FPU_ADDCS(r, x, y) \
78	__asm __volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
79#define	FPU_SUBC(r, x, y) \
80	__asm __volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
81#define	FPU_SUBS(r, x, y) \
82	__asm __volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
83#define	FPU_SUBCS(r, x, y) \
84	__asm __volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
85
86#define	FPU_GET_CARRY(r) __asm __volatile("addx %%g0,%%g0,%0" : "=r"(r))
87#define	FPU_SET_CARRY(v) __asm __volatile("addcc %0,-1,%%g0" : : "r"(v))
88
89#define	FPU_SHL1_BY_ADD	/* shift left 1 faster by ADDC than (a<<1)|(b>>31) */
90