psycho.c revision 114484
1/* 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 114484 2003-05-02 01:21:37Z tmm $ 32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_psycho.h" 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/malloc.h> 46#include <sys/pcpu.h> 47 48#include <ofw/openfirm.h> 49#include <ofw/ofw_pci.h> 50 51#include <machine/bus.h> 52#include <machine/iommureg.h> 53#include <machine/bus_common.h> 54#include <machine/frame.h> 55#include <machine/intr_machdep.h> 56#include <machine/nexusvar.h> 57#include <machine/ofw_upa.h> 58#include <machine/resource.h> 59 60#include <sys/rman.h> 61 62#include <machine/iommuvar.h> 63 64#include <pci/pcivar.h> 65#include <pci/pcireg.h> 66 67#include <sparc64/pci/ofw_pci.h> 68#include <sparc64/pci/psychoreg.h> 69#include <sparc64/pci/psychovar.h> 70 71#include "pcib_if.h" 72#include "sparcbus_if.h" 73 74static void psycho_get_ranges(phandle_t, struct upa_ranges **, int *); 75static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 76 int, driver_intr_t); 77static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 78 bus_addr_t *, u_long *); 79static void psycho_intr_stub(void *); 80#ifdef PSYCHO_STRAY 81static void psycho_intr_stray(void *); 82#endif 83static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 84 85 86/* Interrupt handlers */ 87static void psycho_ue(void *); 88static void psycho_ce(void *); 89static void psycho_bus_a(void *); 90static void psycho_bus_b(void *); 91static void psycho_powerfail(void *); 92#ifdef PSYCHO_MAP_WAKEUP 93static void psycho_wakeup(void *); 94#endif 95 96/* IOMMU support */ 97static void psycho_iommu_init(struct psycho_softc *, int); 98static ofw_pci_binit_t psycho_binit; 99 100/* 101 * bus space and bus dma support for UltraSPARC `psycho'. note that most 102 * of the bus dma support is provided by the iommu dvma controller. 103 */ 104static int psycho_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 105 bus_dmamap_t *); 106static int psycho_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 107static int psycho_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 108 void *, bus_size_t, bus_dmamap_callback_t *, void *, int); 109static int psycho_dmamap_load_mbuf(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 110 struct mbuf *, bus_dmamap_callback2_t *, void *, int); 111static int psycho_dmamap_load_uio(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 112 struct uio *, bus_dmamap_callback2_t *, void *, int); 113static void psycho_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 114static void psycho_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, int); 115static int psycho_dmamem_alloc_size(bus_dma_tag_t, bus_dma_tag_t, void **, int, 116 bus_dmamap_t *, bus_size_t size); 117static int psycho_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 118 bus_dmamap_t *); 119static void psycho_dmamem_free_size(bus_dma_tag_t, bus_dma_tag_t, void *, 120 bus_dmamap_t, bus_size_t size); 121static void psycho_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 122 bus_dmamap_t); 123 124/* 125 * autoconfiguration 126 */ 127static int psycho_probe(device_t); 128static int psycho_attach(device_t); 129static int psycho_read_ivar(device_t, device_t, int, u_long *); 130static int psycho_setup_intr(device_t, device_t, struct resource *, int, 131 driver_intr_t *, void *, void **); 132static int psycho_teardown_intr(device_t, device_t, struct resource *, void *); 133static struct resource *psycho_alloc_resource(device_t, device_t, int, int *, 134 u_long, u_long, u_long, u_int); 135static int psycho_activate_resource(device_t, device_t, int, int, 136 struct resource *); 137static int psycho_deactivate_resource(device_t, device_t, int, int, 138 struct resource *); 139static int psycho_release_resource(device_t, device_t, int, int, 140 struct resource *); 141static int psycho_maxslots(device_t); 142static u_int32_t psycho_read_config(device_t, u_int, u_int, u_int, u_int, int); 143static void psycho_write_config(device_t, u_int, u_int, u_int, u_int, u_int32_t, 144 int); 145static int psycho_route_interrupt(device_t, device_t, int); 146static int psycho_intr_pending(device_t, int); 147static bus_space_handle_t psycho_get_bus_handle(device_t dev, enum sbbt_id id, 148 bus_space_handle_t childhdl, bus_space_tag_t *tag); 149 150static device_method_t psycho_methods[] = { 151 /* Device interface */ 152 DEVMETHOD(device_probe, psycho_probe), 153 DEVMETHOD(device_attach, psycho_attach), 154 155 /* Bus interface */ 156 DEVMETHOD(bus_print_child, bus_generic_print_child), 157 DEVMETHOD(bus_read_ivar, psycho_read_ivar), 158 DEVMETHOD(bus_setup_intr, psycho_setup_intr), 159 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 160 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 161 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 162 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 163 DEVMETHOD(bus_release_resource, psycho_release_resource), 164 165 /* pcib interface */ 166 DEVMETHOD(pcib_maxslots, psycho_maxslots), 167 DEVMETHOD(pcib_read_config, psycho_read_config), 168 DEVMETHOD(pcib_write_config, psycho_write_config), 169 DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt), 170 171 /* sparcbus interface */ 172 DEVMETHOD(sparcbus_intr_pending, psycho_intr_pending), 173 DEVMETHOD(sparcbus_get_bus_handle, psycho_get_bus_handle), 174 175 { 0, 0 } 176}; 177 178static driver_t psycho_driver = { 179 "pcib", 180 psycho_methods, 181 sizeof(struct psycho_softc), 182}; 183 184static devclass_t psycho_devclass; 185 186DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 187 188SLIST_HEAD(, psycho_softc) psycho_softcs = 189 SLIST_HEAD_INITIALIZER(psycho_softcs); 190 191struct psycho_clr { 192 struct psycho_softc *pci_sc; 193 bus_addr_t pci_clr; /* clear register */ 194 driver_intr_t *pci_handler; /* handler to call */ 195 void *pci_arg; /* argument for the handler */ 196 void *pci_cookie; /* interrupt cookie of parent bus */ 197}; 198 199struct psycho_strayclr { 200 struct psycho_softc *psc_sc; 201 bus_addr_t psc_clr; /* clear register */ 202}; 203 204#define PSYCHO_READ8(sc, off) \ 205 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 206#define PSYCHO_WRITE8(sc, off, v) \ 207 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 208#define PCICTL_READ8(sc, off) \ 209 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 210#define PCICTL_WRITE8(sc, off, v) \ 211 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 212 213/* 214 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 215 * single PCI bus and does not have a streaming buffer. It often has an APB 216 * (advanced PCI bridge) connected to it, which was designed specifically for 217 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 218 * appears as two "simba"'s underneath the sabre. 219 * 220 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 221 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 222 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 223 * will usually find a "psycho+" since I don't think the original "psycho" 224 * ever shipped, and if it did it would be in the U30. 225 * 226 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 227 * both part of the same IC, they only have a single register space. As such, 228 * they need to be configured together, even though the autoconfiguration will 229 * attach them separately. 230 * 231 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 232 * as pci1 and pci2, although they have been implemented with other PCI bus 233 * numbers on some machines. 234 * 235 * On UltraII machines, there can be any number of "psycho+" ICs, each 236 * providing two PCI buses. 237 * 238 * 239 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 240 * the values of the following interrupts in this order: 241 * 242 * PCI Bus Error (30) 243 * DMA UE (2e) 244 * DMA CE (2f) 245 * Power Fail (25) 246 * 247 * We really should attach handlers for each. 248 */ 249#ifdef DEBUGGER_ON_POWERFAIL 250#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 251#else 252#define PSYCHO_PWRFAIL_INT_FLAGS 0 253#endif 254 255#define OFW_PCI_TYPE "pci" 256 257struct psycho_desc { 258 char *pd_string; 259 int pd_mode; 260 char *pd_name; 261}; 262 263static struct psycho_desc psycho_compats[] = { 264 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 265 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 266 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 267 { NULL, 0, NULL } 268}; 269 270static struct psycho_desc psycho_models[] = { 271 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 272 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 273 { NULL, 0, NULL } 274}; 275 276static struct psycho_desc * 277psycho_find_desc(struct psycho_desc *table, char *string) 278{ 279 struct psycho_desc *desc; 280 281 for (desc = table; desc->pd_string != NULL; desc++) { 282 if (strcmp(desc->pd_string, string) == 0) 283 return (desc); 284 } 285 return (NULL); 286} 287 288static struct psycho_desc * 289psycho_get_desc(phandle_t node, char *model) 290{ 291 struct psycho_desc *rv; 292 char compat[32]; 293 294 rv = NULL; 295 if (model != NULL) 296 rv = psycho_find_desc(psycho_models, model); 297 if (rv == NULL && 298 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 299 rv = psycho_find_desc(psycho_compats, compat); 300 return (rv); 301} 302 303static int 304psycho_probe(device_t dev) 305{ 306 phandle_t node; 307 char *dtype; 308 309 node = nexus_get_node(dev); 310 dtype = nexus_get_device_type(dev); 311 if (nexus_get_reg(dev) != NULL && dtype != NULL && 312 strcmp(dtype, OFW_PCI_TYPE) == 0 && 313 psycho_get_desc(node, nexus_get_model(dev)) != NULL) { 314 device_set_desc(dev, "U2P UPA-PCI bridge"); 315 return (0); 316 } 317 318 return (ENXIO); 319} 320 321/* 322 * SUNW,psycho initialisation .. 323 * - find the per-psycho registers 324 * - figure out the IGN. 325 * - find our partner psycho 326 * - configure ourselves 327 * - bus range, bus, 328 * - interrupt map, 329 * - setup the chipsets. 330 * - if we're the first of the pair, initialise the IOMMU, otherwise 331 * just copy it's tags and addresses. 332 */ 333static int 334psycho_attach(device_t dev) 335{ 336 struct psycho_softc *sc; 337 struct psycho_softc *osc = NULL; 338 struct psycho_softc *asc; 339 struct upa_regs *reg; 340 struct ofw_pci_bdesc obd; 341 struct psycho_desc *desc; 342 vm_paddr_t pcictl_offs; 343 phandle_t node; 344 u_int64_t csr; 345 u_long mlen; 346 int psycho_br[2]; 347 int n, i, nreg, rid; 348#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 349 bus_addr_t map, clr; 350 u_int64_t mr; 351#endif 352#ifdef PSYCHO_STRAY 353 struct psycho_strayclr *sclr; 354#endif 355 356 node = nexus_get_node(dev); 357 sc = device_get_softc(dev); 358 desc = psycho_get_desc(node, nexus_get_model(dev)); 359 360 sc->sc_node = node; 361 sc->sc_dev = dev; 362 sc->sc_dmatag = nexus_get_dmatag(dev); 363 sc->sc_mode = desc->pd_mode; 364 365 /* 366 * The psycho gets three register banks: 367 * (0) per-PBM configuration and status registers 368 * (1) per-PBM PCI configuration space, containing only the 369 * PBM 256-byte PCI header 370 * (2) the shared psycho configuration registers (struct psychoreg) 371 */ 372 reg = nexus_get_reg(dev); 373 nreg = nexus_get_nreg(dev); 374 /* Register layouts are different. stuupid. */ 375 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 376 if (nreg <= 2) 377 panic("psycho_attach: %d not enough registers", nreg); 378 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[2]); 379 mlen = UPA_REG_SIZE(®[2]); 380 pcictl_offs = UPA_REG_PHYS(®[0]); 381 } else { 382 if (nreg <= 0) 383 panic("psycho_attach: %d not enough registers", nreg); 384 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[0]); 385 mlen = UPA_REG_SIZE(reg); 386 pcictl_offs = sc->sc_basepaddr + PSR_PCICTL0; 387 } 388 389 /* 390 * Match other psycho's that are already configured against 391 * the base physical address. This will be the same for a 392 * pair of devices that share register space. 393 */ 394 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 395 if (asc->sc_basepaddr == sc->sc_basepaddr) { 396 /* Found partner */ 397 osc = asc; 398 break; 399 } 400 } 401 402 if (osc == NULL) { 403 rid = 0; 404 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 405 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 406 RF_ACTIVE); 407 if (sc->sc_mem_res == NULL || 408 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) 409 panic("psycho_attach: can't allocate device memory"); 410 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 411 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 412 } else { 413 /* 414 * There's another psycho using the same register space. Copy the 415 * relevant stuff. 416 */ 417 sc->sc_mem_res = NULL; 418 sc->sc_bustag = osc->sc_bustag; 419 sc->sc_bushandle = osc->sc_bushandle; 420 } 421 if (pcictl_offs < sc->sc_basepaddr) 422 panic("psycho_attach: bogus pci control register location"); 423 sc->sc_pcictl = pcictl_offs - sc->sc_basepaddr; 424 csr = PSYCHO_READ8(sc, PSR_CS); 425 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 426 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 427 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 428 429 device_printf(dev, "%s, impl %d, version %d, ign %#x\n", 430 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 431 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign); 432 433 /* 434 * Setup the PCI control register 435 */ 436 csr = PCICTL_READ8(sc, PCR_CS); 437 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 438 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 439 PCICTL_RTRYWAIT); 440 PCICTL_WRITE8(sc, PCR_CS, csr); 441 442 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 443 /* 444 * Use the PROM preset for now. 445 */ 446 csr = PCICTL_READ8(sc, PCR_TAS); 447 if (csr == 0) 448 panic("psycho_attach: sabre TAS not initialized."); 449 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 450 } else 451 sc->sc_dvmabase = -1; 452 453 /* Grab the psycho ranges */ 454 psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange); 455 456 /* Initialize memory and i/o rmans */ 457 sc->sc_io_rman.rm_type = RMAN_ARRAY; 458 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports"; 459 if (rman_init(&sc->sc_io_rman) != 0 || 460 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0) 461 panic("psycho_probe: failed to set up i/o rman"); 462 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 463 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory"; 464 if (rman_init(&sc->sc_mem_rman) != 0 || 465 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 466 panic("psycho_probe: failed to set up memory rman"); 467 /* 468 * Find the addresses of the various bus spaces. 469 * There should not be multiple ones of one kind. 470 * The physical start addresses of the ranges are the configuration, 471 * memory and IO handles. 472 */ 473 for (n = 0; n < sc->sc_nrange; n++) { 474 i = UPA_RANGE_CS(&sc->sc_range[n]); 475 if (sc->sc_bh[i] != 0) 476 panic("psycho_attach: duplicate range for space %d", i); 477 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); 478 } 479 /* 480 * Check that all needed handles are present. The PCI_CS_MEM64 one is 481 * not currently used. 482 */ 483 for (n = 0; n < 3; n++) { 484 if (sc->sc_bh[n] == 0) 485 panic("psycho_attach: range %d missing", n); 486 } 487 488 /* allocate our tags */ 489 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 490 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 491 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 492 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 493 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_dmat) != 0) 494 panic("psycho_attach: bus_dma_tag_create failed"); 495 /* Customize the tag */ 496 sc->sc_dmat->dt_cookie = sc; 497 sc->sc_dmat->dt_dmamap_create = psycho_dmamap_create; 498 sc->sc_dmat->dt_dmamap_destroy = psycho_dmamap_destroy; 499 sc->sc_dmat->dt_dmamap_load = psycho_dmamap_load; 500 sc->sc_dmat->dt_dmamap_load_mbuf = psycho_dmamap_load_mbuf; 501 sc->sc_dmat->dt_dmamap_load_uio = psycho_dmamap_load_uio; 502 sc->sc_dmat->dt_dmamap_unload = psycho_dmamap_unload; 503 sc->sc_dmat->dt_dmamap_sync = psycho_dmamap_sync; 504 sc->sc_dmat->dt_dmamem_alloc_size = psycho_dmamem_alloc_size; 505 sc->sc_dmat->dt_dmamem_alloc = psycho_dmamem_alloc; 506 sc->sc_dmat->dt_dmamem_free_size = psycho_dmamem_free_size; 507 sc->sc_dmat->dt_dmamem_free = psycho_dmamem_free; 508 /* XXX: register as root dma tag (kluge). */ 509 sparc64_root_dma_tag = sc->sc_dmat; 510 511 /* Register the softc, this is needed for paired psychos. */ 512 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 513 514 /* 515 * And finally, if we're a sabre or the first of a pair of psycho's to 516 * arrive here, start up the IOMMU and get a config space tag. 517 */ 518 if (osc == NULL) { 519 /* 520 * Establish handlers for interesting interrupts.... 521 * 522 * XXX We need to remember these and remove this to support 523 * hotplug on the UPA/FHC bus. 524 * 525 * XXX Not all controllers have these, but installing them 526 * is better than trying to sort through this mess. 527 */ 528 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 529 psycho_ue); 530 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 531 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 532 psycho_bus_a); 533 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 534 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); 535 /* Psycho-specific initialization. */ 536 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 537 /* 538 * Sabres do not have the following two interrupts. 539 */ 540 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 541 INTR_FAST, psycho_bus_b); 542#ifdef PSYCHO_MAP_WAKEUP 543 /* 544 * psycho_wakeup() doesn't do anything useful right 545 * now. 546 */ 547 psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, 548 psycho_wakeup); 549#endif /* PSYCHO_MAP_WAKEUP */ 550 551 /* Initialize the counter-timer. */ 552 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 553 PSR_TC0); 554 } 555 556 /* 557 * Setup IOMMU and PCI configuration if we're the first 558 * of a pair of psycho's to arrive here. 559 * 560 * We should calculate a TSB size based on amount of RAM 561 * and number of bus controllers and number and type of 562 * child devices. 563 * 564 * For the moment, 32KB should be more than enough. 565 */ 566 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 567 M_NOWAIT); 568 if (sc->sc_is == NULL) 569 panic("psycho_attach: malloc iommu_state failed"); 570 sc->sc_is->is_sb[0] = 0; 571 sc->sc_is->is_sb[1] = 0; 572 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 573 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 574 psycho_iommu_init(sc, 3); 575 } else { 576 /* Just copy IOMMU state, config tag and address */ 577 sc->sc_is = osc->sc_is; 578 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) 579 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 580 iommu_reset(sc->sc_is); 581 } 582 583 /* 584 * Enable all interrupts, clear all interrupt states, and install an 585 * interrupt handler for OBIO interrupts, which can be ISA ones 586 * (to frob the interrupt clear registers). 587 * This aids the debugging of interrupt routing problems, and is needed 588 * for isa drivers that use isa_irq_pending (otherwise the registers 589 * will never be cleared). 590 */ 591#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY) 592 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 593 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 594 mr = PSYCHO_READ8(sc, map); 595#ifdef PSYCHO_DEBUG 596 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 597#endif 598 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 599 for (i = 0; i < 4; i++) 600 PCICTL_WRITE8(sc, clr + i * 8, 0); 601 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 602 } 603 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 604 map <= PSR_SERIAL_INT_MAP; map += 8, clr += 8, n++) { 605 mr = PSYCHO_READ8(sc, map); 606#ifdef PSYCHO_DEBUG 607 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 608 (u_long)mr, (u_long)clr); 609#endif 610 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 611 PSYCHO_WRITE8(sc, clr, 0); 612#ifdef PSYCHO_STRAY 613 /* 614 * This can cause interrupt storms, and is therefore disabled 615 * by default. 616 * XXX: use intr_setup() to not confuse higher level code 617 */ 618 if (INTVEC(mr) != 0x7e6 && INTVEC(mr) != 0x7e7 && 619 INTVEC(mr) != 0) { 620 sclr = malloc(sizeof(*sclr), M_DEVBUF, M_WAITOK); 621 sclr->psc_sc = sc; 622 sclr->psc_clr = clr; 623 intr_setup(PIL_LOW, intr_fast, INTVEC(mr), 624 psycho_intr_stray, sclr); 625 } 626#endif 627 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 628 } 629#endif 630 631 /* 632 * Get the bus range from the firmware; it is used solely for obtaining 633 * the inital bus number, and cannot be trusted on all machines. 634 */ 635 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 636 if (n == -1) 637 panic("could not get psycho bus-range"); 638 if (n != sizeof(psycho_br)) 639 panic("broken psycho bus-range (%d)", n); 640 641 sc->sc_busno = ofw_pci_alloc_busno(sc->sc_node); 642 obd.obd_bus = psycho_br[0]; 643 obd.obd_secbus = obd.obd_subbus = sc->sc_busno; 644 obd.obd_slot = PCS_DEVICE; 645 obd.obd_func = PCS_FUNC; 646 obd.obd_init = psycho_binit; 647 obd.obd_super = NULL; 648 /* Initial setup. */ 649 psycho_binit(dev, &obd); 650 /* Update the bus number to what was just programmed. */ 651 obd.obd_bus = obd.obd_secbus; 652 /* 653 * Initialize the interrupt registers of all devices hanging from 654 * the host bridge directly or indirectly via PCI-PCI bridges. 655 * The MI code (and the PCI spec) assume that this is done during 656 * system initialization, however the firmware does not do this 657 * at least on some models, and we probably shouldn't trust that 658 * the firmware uses the same model as this driver if it does. 659 * Additionally, set up the bus numbers and ranges. 660 */ 661 ofw_pci_init(dev, sc->sc_node, sc->sc_ign, &obd); 662 663 device_add_child(dev, "pci", device_get_unit(dev)); 664 return (bus_generic_attach(dev)); 665} 666 667static void 668psycho_set_intr(struct psycho_softc *sc, int index, 669 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler) 670{ 671 int rid, vec; 672 u_int64_t mr; 673 674 mr = PSYCHO_READ8(sc, map); 675 vec = INTVEC(mr); 676 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 677 vec, vec, 1, RF_ACTIVE); 678 if (sc->sc_irq_res[index] == NULL) 679 panic("psycho_set_intr: failed to get interrupt"); 680 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 681 handler, sc, &sc->sc_ihand[index]); 682 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 683} 684 685static int 686psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 687 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 688{ 689 bus_addr_t intrmap, intrclr; 690 u_int64_t im; 691 u_long diag; 692 int found; 693 694 found = 0; 695 /* Hunt thru obio first */ 696 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 697 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 698 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, 699 diag >>= 2) { 700 im = PSYCHO_READ8(sc, intrmap); 701 if (INTINO(im) == ino) { 702 diag &= 2; 703 found = 1; 704 break; 705 } 706 } 707 708 if (!found) { 709 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG); 710 /* Now do PCI interrupts */ 711 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR; 712 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32, 713 diag >>= 8) { 714 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 715 (intrmap == PSR_PCIA2_INT_MAP || 716 intrmap == PSR_PCIA3_INT_MAP)) 717 continue; 718 im = PSYCHO_READ8(sc, intrmap); 719 if (((im ^ ino) & 0x3c) == 0) { 720 intrclr += 8 * (ino & 3); 721 diag = (diag >> ((ino & 3) * 2)) & 2; 722 found = 1; 723 break; 724 } 725 } 726 } 727 if (intrmapptr != NULL) 728 *intrmapptr = intrmap; 729 if (intrclrptr != NULL) 730 *intrclrptr = intrclr; 731 if (intrdiagptr != NULL) 732 *intrdiagptr = diag; 733 return (found); 734} 735 736/* grovel the OBP for various psycho properties */ 737static void 738psycho_get_ranges(phandle_t node, struct upa_ranges **rp, int *np) 739{ 740 741 *np = OF_getprop_alloc(node, "ranges", sizeof(**rp), (void **)rp); 742 if (*np == -1) 743 panic("could not get psycho ranges"); 744} 745 746/* 747 * Interrupt handlers. 748 */ 749static void 750psycho_ue(void *arg) 751{ 752 struct psycho_softc *sc = (struct psycho_softc *)arg; 753 u_int64_t afar, afsr; 754 755 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 756 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 757 /* 758 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 759 * the AFAR to be set to the physical address of the TTE entry that 760 * was invalid/write protected. Call into the iommu code to have 761 * them decoded to virtual IO addresses. 762 */ 763 if ((afsr & UEAFSR_P_DTE) != 0) 764 iommu_decode_fault(sc->sc_is, afar); 765 /* It's uncorrectable. Dump the regs and panic. */ 766 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 767 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 768} 769 770static void 771psycho_ce(void *arg) 772{ 773 struct psycho_softc *sc = (struct psycho_softc *)arg; 774 u_int64_t afar, afsr; 775 776 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 777 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 778 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 779 /* It's correctable. Dump the regs and continue. */ 780 printf("%s: correctable DMA error AFAR %#lx AFSR %#lx\n", 781 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 782} 783 784static void 785psycho_bus_a(void *arg) 786{ 787 struct psycho_softc *sc = (struct psycho_softc *)arg; 788 u_int64_t afar, afsr; 789 790 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 791 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 792 /* It's uncorrectable. Dump the regs and panic. */ 793 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 794 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 795} 796 797static void 798psycho_bus_b(void *arg) 799{ 800 struct psycho_softc *sc = (struct psycho_softc *)arg; 801 u_int64_t afar, afsr; 802 803 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 804 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 805 /* It's uncorrectable. Dump the regs and panic. */ 806 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 807 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 808} 809 810static void 811psycho_powerfail(void *arg) 812{ 813 814 /* We lost power. Try to shut down NOW. */ 815#ifdef DEBUGGER_ON_POWERFAIL 816 struct psycho_softc *sc = (struct psycho_softc *)arg; 817 818 Debugger("powerfail"); 819 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 820#else 821 printf("Power Failure Detected: Shutting down NOW.\n"); 822 shutdown_nice(0); 823#endif 824} 825 826#ifdef PSYCHO_MAP_WAKEUP 827static void 828psycho_wakeup(void *arg) 829{ 830 struct psycho_softc *sc = (struct psycho_softc *)arg; 831 832 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 833 /* Gee, we don't really have a framework to deal with this properly. */ 834 printf("%s: power management wakeup\n", device_get_name(sc->sc_dev)); 835} 836#endif /* PSYCHO_MAP_WAKEUP */ 837 838/* initialise the IOMMU... */ 839void 840psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 841{ 842 char *name; 843 struct iommu_state *is = sc->sc_is; 844 845 /* punch in our copies */ 846 is->is_bustag = sc->sc_bustag; 847 is->is_bushandle = sc->sc_bushandle; 848 is->is_iommu = PSR_IOMMU; 849 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 850 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 851 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 852 is->is_dva = PSR_IOMMU_SVADIAG; 853 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 854 855 /* give us a nice name.. */ 856 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 857 if (name == 0) 858 panic("couldn't malloc iommu name"); 859 snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev)); 860 861 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 862} 863 864static void 865psycho_binit(device_t busdev, struct ofw_pci_bdesc *obd) 866{ 867 868#ifdef PSYCHO_DEBUG 869 printf("psycho at %u/%u/%u: setting bus #s to %u/%u/%u\n", 870 obd->obd_bus, obd->obd_slot, obd->obd_func, obd->obd_bus, 871 obd->obd_secbus, obd->obd_subbus); 872#endif /* PSYCHO_DEBUG */ 873 /* 874 * NOTE: this must be kept in this order, since the last write will 875 * change the config space address of the psycho. 876 */ 877 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 878 PCSR_SUBBUS, obd->obd_subbus, 1); 879 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func, 880 PCSR_SECBUS, obd->obd_secbus, 1); 881} 882 883static int 884psycho_maxslots(device_t dev) 885{ 886 887 /* 888 * XXX: is this correct? At any rate, a number that is too high 889 * shouldn't do any harm, if only because of the way things are 890 * handled in psycho_read_config. 891 */ 892 return (31); 893} 894 895/* 896 * Keep a table of quirky PCI devices that need fixups before the MI PCI code 897 * creates the resource lists. This needs to be moved around once other bus 898 * drivers are added. Moving it to the MI code should maybe be reconsidered 899 * if one of these devices appear in non-sparc64 boxen. It's likely that not 900 * all BIOSes/firmwares can deal with them. 901 */ 902struct psycho_dquirk { 903 u_int32_t dq_devid; 904 int dq_quirk; 905}; 906 907/* Quirk types. May be or'ed together. */ 908#define DQT_BAD_INTPIN 1 /* Intpin reg 0, but intpin used */ 909 910static struct psycho_dquirk dquirks[] = { 911 { 0x1001108e, DQT_BAD_INTPIN }, /* Sun HME (PCIO func. 1) */ 912 { 0x1101108e, DQT_BAD_INTPIN }, /* Sun GEM (PCIO2 func. 1) */ 913 { 0x1102108e, DQT_BAD_INTPIN }, /* Sun FireWire ctl. (PCIO2 func. 2) */ 914 { 0x1103108e, DQT_BAD_INTPIN }, /* Sun USB ctl. (PCIO2 func. 3) */ 915}; 916 917#define NDQUIRKS (sizeof(dquirks) / sizeof(dquirks[0])) 918 919static u_int32_t 920psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 921 int width) 922{ 923 struct psycho_softc *sc; 924 bus_space_handle_t bh; 925 u_long offset = 0; 926 u_int32_t r, devid; 927 int i; 928 929 /* 930 * The psycho bridge does not tolerate accesses to unconfigured PCI 931 * devices' or function's config space, so look up the device in the 932 * firmware device tree first, and if it is not present, return a value 933 * that will make the detection code think that there is no device here. 934 * This is ugly... 935 */ 936 if (reg == 0 && ofw_pci_find_node(bus, slot, func) == 0) 937 return (0xffffffff); 938 sc = (struct psycho_softc *)device_get_softc(dev); 939 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 940 bh = sc->sc_bh[PCI_CS_CONFIG]; 941 switch (width) { 942 case 1: 943 r = bus_space_read_1(sc->sc_cfgt, bh, offset); 944 break; 945 case 2: 946 r = bus_space_read_2(sc->sc_cfgt, bh, offset); 947 break; 948 case 4: 949 r = bus_space_read_4(sc->sc_cfgt, bh, offset); 950 break; 951 default: 952 panic("psycho_read_config: bad width"); 953 } 954 if (reg == PCIR_INTPIN && r == 0) { 955 /* Check for DQT_BAD_INTPIN quirk. */ 956 devid = psycho_read_config(dev, bus, slot, func, 957 PCIR_DEVVENDOR, 4); 958 for (i = 0; i < NDQUIRKS; i++) { 959 if (dquirks[i].dq_devid == devid) { 960 /* 961 * Need to set the intpin to a value != 0 so 962 * that the MI code will think that this device 963 * has an interrupt. 964 * Just use 1 (intpin a) for now. This is, of 965 * course, bogus, but since interrupts are 966 * routed in advance, this does not really 967 * matter. 968 */ 969 if ((dquirks[i].dq_quirk & DQT_BAD_INTPIN) != 0) 970 r = 1; 971 break; 972 } 973 } 974 } 975 return (r); 976} 977 978static void 979psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 980 u_int reg, u_int32_t val, int width) 981{ 982 struct psycho_softc *sc; 983 bus_space_handle_t bh; 984 u_long offset = 0; 985 986 sc = (struct psycho_softc *)device_get_softc(dev); 987 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 988 bh = sc->sc_bh[PCI_CS_CONFIG]; 989 switch (width) { 990 case 1: 991 bus_space_write_1(sc->sc_cfgt, bh, offset, val); 992 break; 993 case 2: 994 bus_space_write_2(sc->sc_cfgt, bh, offset, val); 995 break; 996 case 4: 997 bus_space_write_4(sc->sc_cfgt, bh, offset, val); 998 break; 999 default: 1000 panic("psycho_write_config: bad width"); 1001 } 1002} 1003 1004static int 1005psycho_route_interrupt(device_t bus, device_t dev, int pin) 1006{ 1007 1008 /* 1009 * XXX: ugly loathsome hack: 1010 * We can't use ofw_pci_route_intr() here; the device passed may be 1011 * the one of a bridge, so the original device can't be recovered. 1012 * 1013 * We need to use the firmware to route interrupts, however it has 1014 * no interface which could be used to interpret intpins; instead, 1015 * all assignments are done by device. 1016 * 1017 * The MI pci code will try to reroute interrupts of 0, although they 1018 * are correct; all other interrupts are preinitialized, so if we 1019 * get here, the intline is either 0 (so return 0), or we hit a 1020 * device which was not preinitialized (e.g. hotplugged stuff), in 1021 * which case we are lost. 1022 */ 1023 return (0); 1024} 1025 1026static int 1027psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 1028{ 1029 struct psycho_softc *sc; 1030 1031 sc = (struct psycho_softc *)device_get_softc(dev); 1032 switch (which) { 1033 case PCIB_IVAR_BUS: 1034 *result = sc->sc_busno; 1035 return (0); 1036 } 1037 return (ENOENT); 1038} 1039 1040/* Write to the correct clr register, and call the actual handler. */ 1041static void 1042psycho_intr_stub(void *arg) 1043{ 1044 struct psycho_clr *pc; 1045 1046 pc = (struct psycho_clr *)arg; 1047 pc->pci_handler(pc->pci_arg); 1048 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 1049} 1050 1051#ifdef PSYCHO_STRAY 1052/* 1053 * Write to the correct clr register and return. arg is the address of the clear 1054 * register to be used. 1055 * XXX: print a message? 1056 */ 1057static void 1058psycho_intr_stray(void *arg) 1059{ 1060 struct psycho_strayclr *sclr = arg; 1061 1062 PSYCHO_WRITE8(sclr->psc_sc, sclr->psc_clr, 0); 1063} 1064#endif 1065 1066static int 1067psycho_setup_intr(device_t dev, device_t child, 1068 struct resource *ires, int flags, driver_intr_t *intr, void *arg, 1069 void **cookiep) 1070{ 1071 struct psycho_softc *sc; 1072 struct psycho_clr *pc; 1073 bus_addr_t intrmapptr, intrclrptr; 1074 long vec = rman_get_start(ires); 1075 u_int64_t mr; 1076 int ino, error; 1077 1078 sc = (struct psycho_softc *)device_get_softc(dev); 1079 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 1080 if (pc == NULL) 1081 return (NULL); 1082 1083 /* 1084 * Hunt through all the interrupt mapping regs to look for our 1085 * interrupt vector. 1086 * 1087 * XXX We only compare INOs rather than IGNs since the firmware may 1088 * not provide the IGN and the IGN is constant for all device on that 1089 * PCI controller. This could cause problems for the FFB/external 1090 * interrupt which has a full vector that can be set arbitrarily. 1091 */ 1092 ino = INTINO(vec); 1093 1094 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 1095 printf("Cannot find interrupt vector %lx\n", vec); 1096 free(pc, M_DEVBUF); 1097 return (NULL); 1098 } 1099 1100#ifdef PSYCHO_DEBUG 1101 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n", 1102 ino, (u_long)intrmapptr, (u_long)intrclrptr); 1103#endif 1104 pc->pci_sc = sc; 1105 pc->pci_arg = arg; 1106 pc->pci_handler = intr; 1107 pc->pci_clr = intrclrptr; 1108 /* Disable the interrupt while we fiddle with it */ 1109 mr = PSYCHO_READ8(sc, intrmapptr); 1110 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); 1111 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 1112 psycho_intr_stub, pc, cookiep); 1113 if (error != 0) { 1114 free(pc, M_DEVBUF); 1115 return (error); 1116 } 1117 pc->pci_cookie = *cookiep; 1118 *cookiep = pc; 1119 1120 /* 1121 * Clear the interrupt, it might have been triggered before it was 1122 * set up. 1123 */ 1124 PSYCHO_WRITE8(sc, intrclrptr, 0); 1125 /* 1126 * Enable the interrupt and program the target module now we have the 1127 * handler installed. 1128 */ 1129 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 1130 return (error); 1131} 1132 1133static int 1134psycho_teardown_intr(device_t dev, device_t child, 1135 struct resource *vec, void *cookie) 1136{ 1137 struct psycho_clr *pc; 1138 int error; 1139 1140 pc = (struct psycho_clr *)cookie; 1141 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 1142 pc->pci_cookie); 1143 /* 1144 * Don't disable the interrupt for now, so that stray interupts get 1145 * detected... 1146 */ 1147 if (error != 0) 1148 free(pc, M_DEVBUF); 1149 return (error); 1150} 1151 1152static struct resource * 1153psycho_alloc_resource(device_t bus, device_t child, int type, int *rid, 1154 u_long start, u_long end, u_long count, u_int flags) 1155{ 1156 struct psycho_softc *sc; 1157 struct resource *rv; 1158 struct rman *rm; 1159 bus_space_tag_t bt; 1160 bus_space_handle_t bh; 1161 int needactivate = flags & RF_ACTIVE; 1162 1163 flags &= ~RF_ACTIVE; 1164 1165 sc = (struct psycho_softc *)device_get_softc(bus); 1166 if (type == SYS_RES_IRQ) { 1167 /* 1168 * XXX: Don't accept blank ranges for now, only single 1169 * interrupts. The other case should not happen with the MI pci 1170 * code... 1171 * XXX: This may return a resource that is out of the range 1172 * that was specified. Is this correct...? 1173 */ 1174 if (start != end) 1175 panic("psycho_alloc_resource: XXX: interrupt range"); 1176 start = end |= sc->sc_ign; 1177 return (bus_alloc_resource(bus, type, rid, start, end, 1178 count, flags)); 1179 } 1180 switch (type) { 1181 case SYS_RES_MEMORY: 1182 rm = &sc->sc_mem_rman; 1183 bt = sc->sc_memt; 1184 bh = sc->sc_bh[PCI_CS_MEM32]; 1185 break; 1186 case SYS_RES_IOPORT: 1187 rm = &sc->sc_io_rman; 1188 bt = sc->sc_iot; 1189 bh = sc->sc_bh[PCI_CS_IO]; 1190 break; 1191 default: 1192 return (NULL); 1193 } 1194 1195 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1196 if (rv == NULL) 1197 return (NULL); 1198 1199 bh += rman_get_start(rv); 1200 rman_set_bustag(rv, bt); 1201 rman_set_bushandle(rv, bh); 1202 1203 if (needactivate) { 1204 if (bus_activate_resource(child, type, *rid, rv)) { 1205 rman_release_resource(rv); 1206 return (NULL); 1207 } 1208 } 1209 1210 return (rv); 1211} 1212 1213static int 1214psycho_activate_resource(device_t bus, device_t child, int type, int rid, 1215 struct resource *r) 1216{ 1217 void *p; 1218 int error; 1219 1220 if (type == SYS_RES_IRQ) 1221 return (bus_activate_resource(bus, type, rid, r)); 1222 if (type == SYS_RES_MEMORY) { 1223 /* 1224 * Need to memory-map the device space, as some drivers depend 1225 * on the virtual address being set and useable. 1226 */ 1227 error = sparc64_bus_mem_map(rman_get_bustag(r), 1228 rman_get_bushandle(r), rman_get_size(r), 0, NULL, &p); 1229 if (error != 0) 1230 return (error); 1231 rman_set_virtual(r, p); 1232 } 1233 return (rman_activate_resource(r)); 1234} 1235 1236static int 1237psycho_deactivate_resource(device_t bus, device_t child, int type, int rid, 1238 struct resource *r) 1239{ 1240 1241 if (type == SYS_RES_IRQ) 1242 return (bus_deactivate_resource(bus, type, rid, r)); 1243 if (type == SYS_RES_MEMORY) { 1244 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r)); 1245 rman_set_virtual(r, NULL); 1246 } 1247 return (rman_deactivate_resource(r)); 1248} 1249 1250static int 1251psycho_release_resource(device_t bus, device_t child, int type, int rid, 1252 struct resource *r) 1253{ 1254 int error; 1255 1256 if (type == SYS_RES_IRQ) 1257 return (bus_release_resource(bus, type, rid, r)); 1258 if (rman_get_flags(r) & RF_ACTIVE) { 1259 error = bus_deactivate_resource(child, type, rid, r); 1260 if (error) 1261 return error; 1262 } 1263 return (rman_release_resource(r)); 1264} 1265 1266static int 1267psycho_intr_pending(device_t dev, int intr) 1268{ 1269 struct psycho_softc *sc; 1270 u_long diag; 1271 1272 sc = (struct psycho_softc *)device_get_softc(dev); 1273 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { 1274 printf("psycho_intr_pending: mapping not found for %d\n", intr); 1275 return (0); 1276 } 1277 return (diag != 0); 1278} 1279 1280static bus_space_handle_t 1281psycho_get_bus_handle(device_t dev, enum sbbt_id id, 1282 bus_space_handle_t childhdl, bus_space_tag_t *tag) 1283{ 1284 struct psycho_softc *sc; 1285 1286 sc = (struct psycho_softc *)device_get_softc(dev); 1287 switch(id) { 1288 case SBBT_IO: 1289 *tag = sc->sc_iot; 1290 return (sc->sc_bh[PCI_CS_IO] + childhdl); 1291 case SBBT_MEM: 1292 *tag = sc->sc_memt; 1293 return (sc->sc_bh[PCI_CS_MEM32] + childhdl); 1294 default: 1295 panic("psycho_get_bus_handle: illegal space\n"); 1296 } 1297} 1298 1299/* 1300 * below here is bus space and bus dma support 1301 */ 1302static bus_space_tag_t 1303psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1304{ 1305 bus_space_tag_t bt; 1306 1307 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1308 M_NOWAIT | M_ZERO); 1309 if (bt == NULL) 1310 panic("psycho_alloc_bus_tag: out of memory"); 1311 1312 bzero(bt, sizeof *bt); 1313 bt->bst_cookie = sc; 1314 bt->bst_parent = sc->sc_bustag; 1315 bt->bst_type = type; 1316 return (bt); 1317} 1318 1319/* 1320 * hooks into the iommu dvma calls. 1321 */ 1322static int 1323psycho_dmamem_alloc_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 1324 int flags, bus_dmamap_t *mapp, bus_size_t size) 1325{ 1326 struct psycho_softc *sc; 1327 1328 sc = (struct psycho_softc *)pdmat->dt_cookie; 1329 return (iommu_dvmamem_alloc_size(pdmat, ddmat, sc->sc_is, vaddr, flags, 1330 mapp, size)); 1331} 1332 1333static int 1334psycho_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 1335 int flags, bus_dmamap_t *mapp) 1336{ 1337 struct psycho_softc *sc; 1338 1339 sc = (struct psycho_softc *)pdmat->dt_cookie; 1340 return (iommu_dvmamem_alloc(pdmat, ddmat, sc->sc_is, vaddr, flags, 1341 mapp)); 1342} 1343 1344static void 1345psycho_dmamem_free_size(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 1346 bus_dmamap_t map, bus_size_t size) 1347{ 1348 struct psycho_softc *sc; 1349 1350 sc = (struct psycho_softc *)pdmat->dt_cookie; 1351 iommu_dvmamem_free_size(pdmat, ddmat, sc->sc_is, vaddr, map, size); 1352} 1353 1354static void 1355psycho_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 1356 bus_dmamap_t map) 1357{ 1358 struct psycho_softc *sc; 1359 1360 sc = (struct psycho_softc *)pdmat->dt_cookie; 1361 iommu_dvmamem_free(pdmat, ddmat, sc->sc_is, vaddr, map); 1362} 1363 1364static int 1365psycho_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 1366 bus_dmamap_t *mapp) 1367{ 1368 struct psycho_softc *sc; 1369 1370 sc = (struct psycho_softc *)pdmat->dt_cookie; 1371 return (iommu_dvmamap_create(pdmat, ddmat, sc->sc_is, flags, mapp)); 1372 1373} 1374 1375static int 1376psycho_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1377 bus_dmamap_t map) 1378{ 1379 struct psycho_softc *sc; 1380 1381 sc = (struct psycho_softc *)pdmat->dt_cookie; 1382 return (iommu_dvmamap_destroy(pdmat, ddmat, sc->sc_is, map)); 1383} 1384 1385static int 1386psycho_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1387 void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 1388 void *callback_arg, int flags) 1389{ 1390 struct psycho_softc *sc; 1391 1392 sc = (struct psycho_softc *)pdmat->dt_cookie; 1393 return (iommu_dvmamap_load(pdmat, ddmat, sc->sc_is, map, buf, buflen, 1394 callback, callback_arg, flags)); 1395} 1396 1397static int 1398psycho_dmamap_load_mbuf(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1399 bus_dmamap_t map, struct mbuf *m, bus_dmamap_callback2_t *callback, 1400 void *callback_arg, int flags) 1401{ 1402 struct psycho_softc *sc; 1403 1404 sc = (struct psycho_softc *)pdmat->dt_cookie; 1405 return (iommu_dvmamap_load_mbuf(pdmat, ddmat, sc->sc_is, map, m, 1406 callback, callback_arg, flags)); 1407} 1408 1409static int 1410psycho_dmamap_load_uio(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, 1411 bus_dmamap_t map, struct uio *uio, bus_dmamap_callback2_t *callback, 1412 void *callback_arg, int flags) 1413{ 1414 struct psycho_softc *sc; 1415 1416 sc = (struct psycho_softc *)pdmat->dt_cookie; 1417 return (iommu_dvmamap_load_uio(pdmat, ddmat, sc->sc_is, map, uio, 1418 callback, callback_arg, flags)); 1419} 1420 1421static void 1422psycho_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 1423{ 1424 struct psycho_softc *sc; 1425 1426 sc = (struct psycho_softc *)pdmat->dt_cookie; 1427 iommu_dvmamap_unload(pdmat, ddmat, sc->sc_is, map); 1428} 1429 1430static void 1431psycho_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 1432 int op) 1433{ 1434 struct psycho_softc *sc; 1435 1436 sc = (struct psycho_softc *)pdmat->dt_cookie; 1437 iommu_dvmamap_sync(pdmat, ddmat, sc->sc_is, map, op); 1438} 1439