intr_machdep.h revision 178443 
1/*-
2 * Copyright (c) 2001 Jake Burkholder.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/sparc64/include/intr_machdep.h 178443 2008-04-23 20:04:38Z marius $
27 */
28
29#ifndef	_MACHINE_INTR_MACHDEP_H_
30#define	_MACHINE_INTR_MACHDEP_H_
31
32#define	IRSR_BUSY	(1 << 5)
33
34#define	PIL_MAX		(1 << 4)
35#define	IV_MAX		(1 << 11)
36#define	IV_NAMLEN	1024
37
38#define	IR_FREE		(PIL_MAX * 2)
39
40#define	IH_SHIFT	PTR_SHIFT
41#define	IQE_SHIFT	5
42#define	IV_SHIFT	6
43
44#define	PIL_LOW		1	/* stray interrupts */
45#define	PIL_ITHREAD	2	/* interrupts that use ithreads */
46#define	PIL_RENDEZVOUS	3	/* smp rendezvous ipi */
47#define	PIL_AST		4	/* ast ipi */
48#define	PIL_STOP	5	/* stop cpu ipi */
49#define	PIL_PREEMPT	6	/* preempt idle thread cpu ipi */
50#define	PIL_FAST	13	/* fast interrupts */
51#define	PIL_TICK	14
52
53#ifndef LOCORE
54
55struct trapframe;
56
57typedef	void ih_func_t(struct trapframe *);
58typedef	void iv_func_t(void *);
59
60struct intr_request {
61	struct	intr_request *ir_next;
62	iv_func_t *ir_func;
63	void	*ir_arg;
64	u_int	ir_vec;
65	u_int	ir_pri;
66};
67
68struct intr_controller {
69	void	(*ic_enable)(void *);
70	void	(*ic_disable)(void *);
71	void	(*ic_assign)(void *);
72	void	(*ic_clear)(void *);
73};
74
75struct intr_vector {
76	iv_func_t *iv_func;
77	void	*iv_arg;
78	const struct	intr_controller *iv_ic;
79	void	*iv_icarg;
80	struct	intr_event *iv_event;
81	u_int	iv_pri;
82	u_int	iv_vec;
83	u_int	iv_mid;
84	u_int	iv_refcnt;
85	u_int	iv_pad[2];
86};
87
88extern ih_func_t *intr_handlers[];
89extern struct intr_vector intr_vectors[];
90
91#ifdef SMP
92void	intr_add_cpu(u_int cpu);
93#endif
94int	intr_bind(int vec, u_char cpu);
95void	intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
96	    void *iva);
97void	intr_init1(void);
98void	intr_init2(void);
99int	intr_controller_register(int vec, const struct intr_controller *ic,
100	    void *icarg);
101int	inthand_add(const char *name, int vec, int (*filt)(void *),
102	    void (*handler)(void *), void *arg, int flags, void **cookiep);
103int	inthand_remove(int vec, void *cookie);
104
105ih_func_t intr_fast;
106
107#endif /* !LOCORE */
108
109#endif /* !_MACHINE_INTR_MACHDEP_H_ */
110