fhc.c revision 182070 
1/*-
2 * Copyright (c) 2003 Jake Burkholder.
3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/sparc64/fhc/fhc.c 182070 2008-08-23 16:07:20Z marius $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/pcpu.h>
38
39#include <dev/led/led.h>
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42#include <dev/ofw/openfirm.h>
43
44#include <machine/bus.h>
45#include <machine/bus_common.h>
46#include <machine/resource.h>
47
48#include <sys/rman.h>
49
50#include <sparc64/fhc/fhcreg.h>
51#include <sparc64/sbus/ofw_sbus.h>
52
53struct fhc_devinfo {
54	struct ofw_bus_devinfo	fdi_obdinfo;
55	struct resource_list	fdi_rl;
56};
57
58struct fhc_softc {
59	struct resource		*sc_memres[FHC_NREG];
60	int			sc_nrange;
61	struct sbus_ranges	*sc_ranges;
62	int			sc_ign;
63	struct cdev		*sc_led_dev;
64};
65
66static device_probe_t fhc_probe;
67static device_attach_t fhc_attach;
68static bus_print_child_t fhc_print_child;
69static bus_probe_nomatch_t fhc_probe_nomatch;
70static bus_setup_intr_t fhc_setup_intr;
71static bus_alloc_resource_t fhc_alloc_resource;
72static bus_get_resource_list_t fhc_get_resource_list;
73static ofw_bus_get_devinfo_t fhc_get_devinfo;
74
75static void fhc_intr_enable(void *);
76static void fhc_intr_disable(void *);
77static void fhc_intr_assign(void *);
78static void fhc_intr_clear(void *);
79static void fhc_led_func(void *, int);
80static int fhc_print_res(struct fhc_devinfo *);
81
82static device_method_t fhc_methods[] = {
83	/* Device interface */
84	DEVMETHOD(device_probe,		fhc_probe),
85	DEVMETHOD(device_attach,	fhc_attach),
86	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
87	DEVMETHOD(device_suspend,	bus_generic_suspend),
88	DEVMETHOD(device_resume,	bus_generic_resume),
89
90	/* Bus interface */
91	DEVMETHOD(bus_print_child,	fhc_print_child),
92	DEVMETHOD(bus_probe_nomatch,	fhc_probe_nomatch),
93	DEVMETHOD(bus_setup_intr,	fhc_setup_intr),
94	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
95	DEVMETHOD(bus_alloc_resource,	fhc_alloc_resource),
96	DEVMETHOD(bus_release_resource,	bus_generic_rl_release_resource),
97	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
98	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
99	DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
100	DEVMETHOD(bus_get_resource,	bus_generic_rl_get_resource),
101
102	/* ofw_bus interface */
103	DEVMETHOD(ofw_bus_get_devinfo,	fhc_get_devinfo),
104	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
105	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
106	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
107	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
108	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
109
110	{ NULL, NULL }
111};
112
113static driver_t fhc_driver = {
114	"fhc",
115	fhc_methods,
116	sizeof(struct fhc_softc),
117};
118
119static devclass_t fhc_devclass;
120
121DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0);
122DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0);
123MODULE_DEPEND(fhc, central, 1, 1, 1);
124MODULE_VERSION(fhc, 1);
125
126static const struct intr_controller fhc_ic = {
127	fhc_intr_enable,
128	fhc_intr_disable,
129	fhc_intr_assign,
130	fhc_intr_clear
131};
132
133struct fhc_icarg {
134	struct fhc_softc	*fica_sc;
135	struct resource		*fica_memres;
136};
137
138static int
139fhc_probe(device_t dev)
140{
141
142	if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
143		device_set_desc(dev, "fhc");
144		return (0);
145	}
146	return (ENXIO);
147}
148
149static int
150fhc_attach(device_t dev)
151{
152	char ledname[sizeof("boardXX")];
153	struct fhc_devinfo *fdi;
154	struct fhc_icarg *fica;
155	struct fhc_softc *sc;
156	struct sbus_regs *reg;
157	phandle_t child;
158	phandle_t node;
159	device_t cdev;
160	uint32_t board;
161	uint32_t ctrl;
162	uint32_t *intr;
163	uint32_t iv;
164	char *name;
165	int central;
166	int error;
167	int i;
168	int nintr;
169	int nreg;
170	int rid;
171
172	sc = device_get_softc(dev);
173	node = ofw_bus_get_node(dev);
174
175	central = 0;
176	if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
177		central = 1;
178
179	for (i = 0; i < FHC_NREG; i++) {
180		rid = i;
181		sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
182		    &rid, RF_ACTIVE);
183		if (sc->sc_memres[i] == NULL) {
184			device_printf(dev, "cannot allocate resource %d\n", i);
185			error = ENXIO;
186			goto fail_memres;
187		}
188	}
189
190	if (central != 0) {
191		board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
192		board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
193	} else {
194		if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
195			device_printf(dev, "cannot get board number\n");
196			error = ENXIO;
197			goto fail_memres;
198		}
199	}
200
201	device_printf(dev, "board %d, ", board);
202	if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
203		printf("model %s\n", name);
204		free(name, M_OFWPROP);
205	} else
206		printf("model unknown\n");
207
208	for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
209		bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0);
210		(void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
211	}
212
213	sc->sc_ign = board << 1;
214	bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
215	sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
216
217	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
218	if (central == 0)
219		ctrl |= FHC_CTRL_IXIST;
220	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
221	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
222	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
223
224	sc->sc_nrange = OF_getprop_alloc(node, "ranges",
225	    sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
226	if (sc->sc_nrange == -1) {
227		device_printf(dev, "cannot get ranges\n");
228		error = ENXIO;
229		goto fail_memres;
230	}
231
232	/*
233	 * Apparently only the interrupt controller of boards hanging off
234	 * of central(4) is indented to be used, otherwise we would have
235	 * conflicts registering the interrupt controllers for all FHC
236	 * boards as the board number and thus the IGN isn't unique.
237	 */
238	if (central == 1) {
239		/*
240		 * Hunt through all the interrupt mapping regs and register
241		 * our interrupt controller for the corresponding interrupt
242		 * vectors.
243		 */
244		for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
245			fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
246			if (fica == NULL)
247				panic("%s: could not allocate interrupt "
248				    "controller argument", __func__);
249			fica->fica_sc = sc;
250			fica->fica_memres = sc->sc_memres[i];
251#ifdef FHC_DEBUG
252			device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
253			    (u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
254			    (u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
255#endif
256			/*
257			 * XXX we only pick the INO rather than the INR
258			 * from the IMR since the firmware may not provide
259			 * the IGN and the IGN is constant for all devices
260			 * on that FireHose controller.
261			 */
262			if (intr_controller_register(INTMAP_VEC(sc->sc_ign,
263			    INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
264			    &fhc_ic, fica) != 0)
265				panic("%s: could not register interrupt "
266				    "controller for map %d", __func__, i);
267		}
268	} else {
269		snprintf(ledname, sizeof(ledname), "board%d", board);
270		sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
271	}
272
273	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
274		fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
275		if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
276			free(fdi, M_DEVBUF);
277			continue;
278		}
279		nreg = OF_getprop_alloc(child, "reg", sizeof(*reg),
280		    (void **)&reg);
281		if (nreg == -1) {
282			device_printf(dev, "<%s>: incomplete\n",
283			    fdi->fdi_obdinfo.obd_name);
284			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
285			free(fdi, M_DEVBUF);
286			continue;
287		}
288		resource_list_init(&fdi->fdi_rl);
289		for (i = 0; i < nreg; i++)
290			resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, i,
291			    reg[i].sbr_offset, reg[i].sbr_offset +
292			    reg[i].sbr_size, reg[i].sbr_size);
293		free(reg, M_OFWPROP);
294		if (central == 1) {
295			nintr = OF_getprop_alloc(child, "interrupts",
296			    sizeof(*intr), (void **)&intr);
297			if (nintr != -1) {
298				for (i = 0; i < nintr; i++) {
299					iv = INTMAP_VEC(sc->sc_ign, intr[i]);
300					resource_list_add(&fdi->fdi_rl,
301					    SYS_RES_IRQ, i, iv, iv, 1);
302				}
303				free(intr, M_OFWPROP);
304			}
305		}
306		cdev = device_add_child(dev, NULL, -1);
307		if (cdev == NULL) {
308			device_printf(dev, "<%s>: device_add_child failed\n",
309			    fdi->fdi_obdinfo.obd_name);
310			resource_list_free(&fdi->fdi_rl);
311			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
312			free(fdi, M_DEVBUF);
313			continue;
314		}
315		device_set_ivars(cdev, fdi);
316	}
317
318	return (bus_generic_attach(dev));
319
320 fail_memres:
321	for (i = 0; i < FHC_NREG; i++)
322		if (sc->sc_memres[i] != NULL)
323			bus_release_resource(dev, SYS_RES_MEMORY,
324			    rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
325	return (error);
326}
327
328static int
329fhc_print_child(device_t dev, device_t child)
330{
331	int rv;
332
333	rv = bus_print_child_header(dev, child);
334	rv += fhc_print_res(device_get_ivars(child));
335	rv += bus_print_child_footer(dev, child);
336	return (rv);
337}
338
339static void
340fhc_probe_nomatch(device_t dev, device_t child)
341{
342	const char *type;
343
344	device_printf(dev, "<%s>", ofw_bus_get_name(child));
345	fhc_print_res(device_get_ivars(child));
346	type = ofw_bus_get_type(child);
347	printf(" type %s (no driver attached)\n",
348	    type != NULL ? type : "unknown");
349}
350
351static void
352fhc_intr_enable(void *arg)
353{
354	struct intr_vector *iv = arg;
355	struct fhc_icarg *fica = iv->iv_icarg;
356
357	bus_write_4(fica->fica_memres, FHC_IMAP,
358	    INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
359	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
360}
361
362static void
363fhc_intr_disable(void *arg)
364{
365	struct intr_vector *iv = arg;
366	struct fhc_icarg *fica = iv->iv_icarg;
367
368	bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
369	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
370}
371
372static void
373fhc_intr_assign(void *arg)
374{
375	struct intr_vector *iv = arg;
376	struct fhc_icarg *fica = iv->iv_icarg;
377
378	bus_write_4(fica->fica_memres, FHC_IMAP, INTMAP_TID(
379	    bus_read_4(fica->fica_memres, FHC_IMAP), iv->iv_mid));
380	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
381}
382
383static void
384fhc_intr_clear(void *arg)
385{
386	struct intr_vector *iv = arg;
387	struct fhc_icarg *fica = iv->iv_icarg;
388
389	bus_write_4(fica->fica_memres, FHC_ICLR, 0x0);
390	(void)bus_read_4(fica->fica_memres, FHC_ICLR);
391}
392
393static int
394fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
395    driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
396{
397	struct fhc_softc *sc;
398	u_long vec;
399
400	sc = device_get_softc(bus);
401	/*
402	 * Make sure the vector is fully specified and we registered
403	 * our interrupt controller for it.
404	 */
405	vec = rman_get_start(r);
406	if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
407		device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
408		return (EINVAL);
409	}
410	return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
411	    arg, cookiep));
412}
413
414static struct resource *
415fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
416    u_long start, u_long end, u_long count, u_int flags)
417{
418	struct resource_list *rl;
419	struct resource_list_entry *rle;
420	struct fhc_softc *sc;
421	struct resource *res;
422	bus_addr_t coffset;
423	bus_addr_t cend;
424	bus_addr_t phys;
425	int isdefault;
426	int passthrough;
427	int i;
428
429	isdefault = (start == 0UL && end == ~0UL);
430	passthrough = (device_get_parent(child) != bus);
431	res = NULL;
432	rle = NULL;
433	rl = BUS_GET_RESOURCE_LIST(bus, child);
434	sc = device_get_softc(bus);
435	switch (type) {
436	case SYS_RES_IRQ:
437		return (resource_list_alloc(rl, bus, child, type, rid, start,
438		    end, count, flags));
439	case SYS_RES_MEMORY:
440		if (!passthrough) {
441			rle = resource_list_find(rl, type, *rid);
442			if (rle == NULL)
443				return (NULL);
444			if (rle->res != NULL)
445				panic("%s: resource entry is busy", __func__);
446			if (isdefault) {
447				start = rle->start;
448				count = ulmax(count, rle->count);
449				end = ulmax(rle->end, start + count - 1);
450			}
451		}
452		for (i = 0; i < sc->sc_nrange; i++) {
453			coffset = sc->sc_ranges[i].coffset;
454			cend = coffset + sc->sc_ranges[i].size - 1;
455			if (start >= coffset && end <= cend) {
456				start -= coffset;
457				end -= coffset;
458				phys = sc->sc_ranges[i].poffset |
459				    ((bus_addr_t)sc->sc_ranges[i].pspace << 32);
460				res = bus_generic_alloc_resource(bus, child,
461				    type, rid, phys + start, phys + end,
462				    count, flags);
463				if (!passthrough)
464					rle->res = res;
465				break;
466			}
467		}
468		break;
469	}
470	return (res);
471}
472
473static struct resource_list *
474fhc_get_resource_list(device_t bus, device_t child)
475{
476	struct fhc_devinfo *fdi;
477
478	fdi = device_get_ivars(child);
479	return (&fdi->fdi_rl);
480}
481
482static const struct ofw_bus_devinfo *
483fhc_get_devinfo(device_t bus, device_t child)
484{
485	struct fhc_devinfo *fdi;
486
487	fdi = device_get_ivars(child);
488	return (&fdi->fdi_obdinfo);
489}
490
491static void
492fhc_led_func(void *arg, int onoff)
493{
494	struct fhc_softc *sc;
495	uint32_t ctrl;
496
497	sc = (struct fhc_softc *)arg;
498
499	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
500	if (onoff)
501		ctrl |= FHC_CTRL_RLED;
502	else
503		ctrl &= ~FHC_CTRL_RLED;
504	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
505	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
506	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
507}
508
509static int
510fhc_print_res(struct fhc_devinfo *fdi)
511{
512	int rv;
513
514	rv = 0;
515	rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
516	    "%#lx");
517	rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
518	return (rv);
519}
520