fhc.c revision 178443 
1/*-
2 * Copyright (c) 2003 Jake Burkholder.
3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/sparc64/fhc/fhc.c 178443 2008-04-23 20:04:38Z marius $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/pcpu.h>
38
39#include <dev/led/led.h>
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42#include <dev/ofw/openfirm.h>
43
44#include <machine/bus.h>
45#include <machine/bus_common.h>
46#include <machine/resource.h>
47
48#include <sys/rman.h>
49
50#include <sparc64/fhc/fhcreg.h>
51#include <sparc64/sbus/ofw_sbus.h>
52
53struct fhc_devinfo {
54	struct ofw_bus_devinfo	fdi_obdinfo;
55	struct resource_list	fdi_rl;
56};
57
58struct fhc_softc {
59	struct resource		*sc_memres[FHC_NREG];
60	int			sc_nrange;
61	struct sbus_ranges	*sc_ranges;
62	int			sc_ign;
63	struct cdev		*sc_led_dev;
64};
65
66static device_probe_t fhc_probe;
67static device_attach_t fhc_attach;
68static bus_print_child_t fhc_print_child;
69static bus_probe_nomatch_t fhc_probe_nomatch;
70static bus_setup_intr_t fhc_setup_intr;
71static bus_alloc_resource_t fhc_alloc_resource;
72static bus_get_resource_list_t fhc_get_resource_list;
73static ofw_bus_get_devinfo_t fhc_get_devinfo;
74
75static void fhc_intr_enable(void *);
76static void fhc_intr_disable(void *);
77static void fhc_intr_assign(void *);
78static void fhc_intr_clear(void *);
79static void fhc_led_func(void *, int);
80static int fhc_print_res(struct fhc_devinfo *);
81
82static device_method_t fhc_methods[] = {
83	/* Device interface */
84	DEVMETHOD(device_probe,		fhc_probe),
85	DEVMETHOD(device_attach,	fhc_attach),
86	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
87	DEVMETHOD(device_suspend,	bus_generic_suspend),
88	DEVMETHOD(device_resume,	bus_generic_resume),
89
90	/* Bus interface */
91	DEVMETHOD(bus_print_child,	fhc_print_child),
92	DEVMETHOD(bus_probe_nomatch,	fhc_probe_nomatch),
93	DEVMETHOD(bus_setup_intr,	fhc_setup_intr),
94	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
95	DEVMETHOD(bus_alloc_resource,	fhc_alloc_resource),
96	DEVMETHOD(bus_release_resource,	bus_generic_rl_release_resource),
97	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
98	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
99	DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
100	DEVMETHOD(bus_get_resource,	bus_generic_rl_get_resource),
101
102	/* ofw_bus interface */
103	DEVMETHOD(ofw_bus_get_devinfo,	fhc_get_devinfo),
104	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
105	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
106	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
107	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
108	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
109
110	{ NULL, NULL }
111};
112
113static driver_t fhc_driver = {
114	"fhc",
115	fhc_methods,
116	sizeof(struct fhc_softc),
117};
118
119static devclass_t fhc_devclass;
120
121DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0);
122DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0);
123
124static const struct intr_controller fhc_ic = {
125	fhc_intr_enable,
126	fhc_intr_disable,
127	fhc_intr_assign,
128	fhc_intr_clear
129};
130
131struct fhc_icarg {
132	struct fhc_softc	*fica_sc;
133	struct resource		*fica_memres;
134};
135
136static int
137fhc_probe(device_t dev)
138{
139
140	if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
141		device_set_desc(dev, "fhc");
142		return (0);
143	}
144	return (ENXIO);
145}
146
147static int
148fhc_attach(device_t dev)
149{
150	char ledname[sizeof("boardXX")];
151	struct fhc_devinfo *fdi;
152	struct fhc_icarg *fica;
153	struct fhc_softc *sc;
154	struct sbus_regs *reg;
155	phandle_t child;
156	phandle_t node;
157	device_t cdev;
158	uint32_t board;
159	uint32_t ctrl;
160	uint32_t *intr;
161	uint32_t iv;
162	char *name;
163	int central;
164	int error;
165	int i;
166	int nintr;
167	int nreg;
168	int rid;
169
170	sc = device_get_softc(dev);
171	node = ofw_bus_get_node(dev);
172
173	central = 0;
174	if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
175		central = 1;
176
177	for (i = 0; i < FHC_NREG; i++) {
178		rid = i;
179		sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
180		    &rid, RF_ACTIVE);
181		if (sc->sc_memres[i] == NULL) {
182			device_printf(dev, "cannot allocate resource %d\n", i);
183			error = ENXIO;
184			goto fail_memres;
185		}
186	}
187
188	if (central != 0) {
189		board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
190		board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
191	} else {
192		if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
193			device_printf(dev, "cannot get board number\n");
194			error = ENXIO;
195			goto fail_memres;
196		}
197	}
198
199	device_printf(dev, "board %d, ", board);
200	if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
201		printf("model %s\n", name);
202		free(name, M_OFWPROP);
203	} else
204		printf("model unknown\n");
205
206	for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
207		bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0);
208		(void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
209	}
210
211	sc->sc_ign = board << 1;
212	bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
213	sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
214
215	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
216	if (central == 0)
217		ctrl |= FHC_CTRL_IXIST;
218	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
219	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
220	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
221
222	sc->sc_nrange = OF_getprop_alloc(node, "ranges",
223	    sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
224	if (sc->sc_nrange == -1) {
225		device_printf(dev, "cannot get ranges\n");
226		error = ENXIO;
227		goto fail_memres;
228	}
229
230	/*
231	 * Apparently only the interrupt controller of boards hanging off
232	 * of central(4) is indented to be used, otherwise we would have
233	 * conflicts registering the interrupt controllers for all FHC
234	 * boards as the board number and thus the IGN isn't unique.
235	 */
236	if (central == 1) {
237		/*
238		 * Hunt through all the interrupt mapping regs and register
239		 * our interrupt controller for the corresponding interrupt
240		 * vectors.
241		 */
242		for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
243			fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
244			if (fica == NULL)
245				panic("%s: could not allocate interrupt "
246				    "controller argument", __func__);
247			fica->fica_sc = sc;
248			fica->fica_memres = sc->sc_memres[i];
249#ifdef FHC_DEBUG
250			device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
251			    (u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
252			    (u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
253#endif
254			/*
255			 * XXX we only pick the INO rather than the INR
256			 * from the IMR since the firmware may not provide
257			 * the IGN and the IGN is constant for all devices
258			 * on that FireHose controller.
259			 */
260			if (intr_controller_register(INTMAP_VEC(sc->sc_ign,
261			    INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
262			    &fhc_ic, fica) != 0)
263				panic("%s: could not register interrupt "
264				    "controller for map %d", __func__, i);
265		}
266	} else {
267		snprintf(ledname, sizeof(ledname), "board%d", board);
268		sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
269	}
270
271	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
272		fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
273		if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
274			free(fdi, M_DEVBUF);
275			continue;
276		}
277		nreg = OF_getprop_alloc(child, "reg", sizeof(*reg),
278		    (void **)&reg);
279		if (nreg == -1) {
280			device_printf(dev, "<%s>: incomplete\n",
281			    fdi->fdi_obdinfo.obd_name);
282			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
283			free(fdi, M_DEVBUF);
284			continue;
285		}
286		resource_list_init(&fdi->fdi_rl);
287		for (i = 0; i < nreg; i++)
288			resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, i,
289			    reg[i].sbr_offset, reg[i].sbr_offset +
290			    reg[i].sbr_size, reg[i].sbr_size);
291		free(reg, M_OFWPROP);
292		if (central == 1) {
293			nintr = OF_getprop_alloc(child, "interrupts",
294			    sizeof(*intr), (void **)&intr);
295			if (nintr != -1) {
296				for (i = 0; i < nintr; i++) {
297					iv = INTMAP_VEC(sc->sc_ign, intr[i]);
298					resource_list_add(&fdi->fdi_rl,
299					    SYS_RES_IRQ, i, iv, iv, 1);
300				}
301				free(intr, M_OFWPROP);
302			}
303		}
304		cdev = device_add_child(dev, NULL, -1);
305		if (cdev == NULL) {
306			device_printf(dev, "<%s>: device_add_child failed\n",
307			    fdi->fdi_obdinfo.obd_name);
308			resource_list_free(&fdi->fdi_rl);
309			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
310			free(fdi, M_DEVBUF);
311			continue;
312		}
313		device_set_ivars(cdev, fdi);
314	}
315
316	return (bus_generic_attach(dev));
317
318 fail_memres:
319	for (i = 0; i < FHC_NREG; i++)
320		if (sc->sc_memres[i] != NULL)
321			bus_release_resource(dev, SYS_RES_MEMORY,
322			    rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
323 	return (error);
324}
325
326static int
327fhc_print_child(device_t dev, device_t child)
328{
329	int rv;
330
331	rv = bus_print_child_header(dev, child);
332	rv += fhc_print_res(device_get_ivars(child));
333	rv += bus_print_child_footer(dev, child);
334	return (rv);
335}
336
337static void
338fhc_probe_nomatch(device_t dev, device_t child)
339{
340	const char *type;
341
342	device_printf(dev, "<%s>", ofw_bus_get_name(child));
343	fhc_print_res(device_get_ivars(child));
344	type = ofw_bus_get_type(child);
345	printf(" type %s (no driver attached)\n",
346	    type != NULL ? type : "unknown");
347}
348
349static void
350fhc_intr_enable(void *arg)
351{
352	struct intr_vector *iv = arg;
353	struct fhc_icarg *fica = iv->iv_icarg;
354
355	bus_write_4(fica->fica_memres, FHC_IMAP,
356	    INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
357	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
358}
359
360static void
361fhc_intr_disable(void *arg)
362{
363	struct intr_vector *iv = arg;
364	struct fhc_icarg *fica = iv->iv_icarg;
365
366	bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
367	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
368}
369
370static void
371fhc_intr_assign(void *arg)
372{
373	struct intr_vector *iv = arg;
374	struct fhc_icarg *fica = iv->iv_icarg;
375
376	bus_write_4(fica->fica_memres, FHC_IMAP, INTMAP_TID(
377	    bus_read_4(fica->fica_memres, FHC_IMAP), iv->iv_mid));
378	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
379}
380
381static void
382fhc_intr_clear(void *arg)
383{
384	struct intr_vector *iv = arg;
385	struct fhc_icarg *fica = iv->iv_icarg;
386
387	bus_write_4(fica->fica_memres, FHC_ICLR, 0x0);
388	(void)bus_read_4(fica->fica_memres, FHC_ICLR);
389}
390
391static int
392fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
393    driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
394{
395	struct fhc_softc *sc;
396	u_long vec;
397
398	sc = device_get_softc(bus);
399	/*
400	 * Make sure the vector is fully specified and we registered
401	 * our interrupt controller for it.
402 	 */
403	vec = rman_get_start(r);
404	if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
405		device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
406 		return (EINVAL);
407 	}
408	return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
409	    arg, cookiep));
410}
411
412static struct resource *
413fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
414    u_long start, u_long end, u_long count, u_int flags)
415{
416	struct resource_list *rl;
417	struct resource_list_entry *rle;
418	struct fhc_softc *sc;
419	struct resource *res;
420	bus_addr_t coffset;
421	bus_addr_t cend;
422	bus_addr_t phys;
423	int isdefault;
424	int passthrough;
425	int i;
426
427	isdefault = (start == 0UL && end == ~0UL);
428	passthrough = (device_get_parent(child) != bus);
429	res = NULL;
430	rle = NULL;
431	rl = BUS_GET_RESOURCE_LIST(bus, child);
432	sc = device_get_softc(bus);
433	switch (type) {
434	case SYS_RES_IRQ:
435		return (resource_list_alloc(rl, bus, child, type, rid, start,
436		    end, count, flags));
437	case SYS_RES_MEMORY:
438		if (!passthrough) {
439			rle = resource_list_find(rl, type, *rid);
440			if (rle == NULL)
441				return (NULL);
442			if (rle->res != NULL)
443				panic("%s: resource entry is busy", __func__);
444			if (isdefault) {
445				start = rle->start;
446				count = ulmax(count, rle->count);
447				end = ulmax(rle->end, start + count - 1);
448			}
449		}
450		for (i = 0; i < sc->sc_nrange; i++) {
451			coffset = sc->sc_ranges[i].coffset;
452			cend = coffset + sc->sc_ranges[i].size - 1;
453			if (start >= coffset && end <= cend) {
454				start -= coffset;
455				end -= coffset;
456				phys = sc->sc_ranges[i].poffset |
457				    ((bus_addr_t)sc->sc_ranges[i].pspace << 32);
458				res = bus_generic_alloc_resource(bus, child,
459				    type, rid, phys + start, phys + end,
460				    count, flags);
461				if (!passthrough)
462					rle->res = res;
463				break;
464			}
465		}
466		break;
467	}
468	return (res);
469}
470
471static struct resource_list *
472fhc_get_resource_list(device_t bus, device_t child)
473{
474	struct fhc_devinfo *fdi;
475
476	fdi = device_get_ivars(child);
477	return (&fdi->fdi_rl);
478}
479
480static const struct ofw_bus_devinfo *
481fhc_get_devinfo(device_t bus, device_t child)
482{
483	struct fhc_devinfo *fdi;
484
485	fdi = device_get_ivars(child);
486	return (&fdi->fdi_obdinfo);
487}
488
489static void
490fhc_led_func(void *arg, int onoff)
491{
492	struct fhc_softc *sc;
493	uint32_t ctrl;
494
495	sc = (struct fhc_softc *)arg;
496
497	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
498	if (onoff)
499		ctrl |= FHC_CTRL_RLED;
500	else
501		ctrl &= ~FHC_CTRL_RLED;
502	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
503	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
504	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
505}
506
507static int
508fhc_print_res(struct fhc_devinfo *fdi)
509{
510	int rv;
511
512	rv = 0;
513	rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
514	    "%#lx");
515	rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
516	return (rv);
517}
518