1292407Sbr/*- 2292407Sbr * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> 3292407Sbr * All rights reserved. 4292407Sbr * 5292407Sbr * Portions of this software were developed by SRI International and the 6292407Sbr * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7292407Sbr * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8292407Sbr * 9292407Sbr * Portions of this software were developed by the University of Cambridge 10292407Sbr * Computer Laboratory as part of the CTSRD Project, with support from the 11292407Sbr * UK Higher Education Innovation Fund (HEIF). 12292407Sbr * 13292407Sbr * Redistribution and use in source and binary forms, with or without 14292407Sbr * modification, are permitted provided that the following conditions 15292407Sbr * are met: 16292407Sbr * 1. Redistributions of source code must retain the above copyright 17292407Sbr * notice, this list of conditions and the following disclaimer. 18292407Sbr * 2. Redistributions in binary form must reproduce the above copyright 19292407Sbr * notice, this list of conditions and the following disclaimer in the 20292407Sbr * documentation and/or other materials provided with the distribution. 21292407Sbr * 22292407Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23292407Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24292407Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25292407Sbr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26292407Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27292407Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28292407Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29292407Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30292407Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31292407Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32292407Sbr * SUCH DAMAGE. 33292407Sbr * 34292407Sbr * $FreeBSD: releng/11.0/sys/riscv/include/cpu.h 292407 2015-12-17 18:44:30Z br $ 35292407Sbr */ 36292407Sbr 37292407Sbr#ifndef _MACHINE_CPU_H_ 38292407Sbr#define _MACHINE_CPU_H_ 39292407Sbr 40292407Sbr#include <machine/atomic.h> 41292407Sbr#include <machine/frame.h> 42292407Sbr 43292407Sbr#define TRAPF_PC(tfp) ((tfp)->tf_ra) 44292407Sbr#define TRAPF_USERMODE(tfp) (((tfp)->tf_sepc & (1ul << 63)) == 0) 45292407Sbr 46292407Sbr#define cpu_getstack(td) ((td)->td_frame->tf_sp) 47292407Sbr#define cpu_setstack(td, sp) ((td)->td_frame->tf_sp = (sp)) 48292407Sbr#define cpu_spinwait() /* nothing */ 49292407Sbr 50292407Sbr#ifdef _KERNEL 51292407Sbr 52292407Sbr/* 53292407Sbr * 0x0000 CPU ID unimplemented 54292407Sbr * 0x0001 UC Berkeley Rocket repo 55292407Sbr * 0x0002��0x7FFE Reserved for open-source repos 56292407Sbr * 0x7FFF Reserved for extension 57292407Sbr * 0x8000 Reserved for anonymous source 58292407Sbr * 0x8001��0xFFFE Reserved for proprietary implementations 59292407Sbr * 0xFFFF Reserved for extension 60292407Sbr */ 61292407Sbr 62292407Sbr#define CPU_IMPL_SHIFT 0 63292407Sbr#define CPU_IMPL_MASK (0xffff << CPU_IMPL_SHIFT) 64292407Sbr#define CPU_IMPL(mimpid) ((mimpid & CPU_IMPL_MASK) >> CPU_IMPL_SHIFT) 65292407Sbr#define CPU_IMPL_UNIMPLEMEN 0x0 66292407Sbr#define CPU_IMPL_UCB_ROCKET 0x1 67292407Sbr 68292407Sbr#define CPU_PART_SHIFT 62 69292407Sbr#define CPU_PART_MASK (0x3ul << CPU_PART_SHIFT) 70292407Sbr#define CPU_PART(mcpuid) ((mcpuid & CPU_PART_MASK) >> CPU_PART_SHIFT) 71292407Sbr#define CPU_PART_RV32I 0x0 72292407Sbr#define CPU_PART_RV32E 0x1 73292407Sbr#define CPU_PART_RV64I 0x2 74292407Sbr#define CPU_PART_RV128I 0x3 75292407Sbr 76292407Sbrextern char btext[]; 77292407Sbrextern char etext[]; 78292407Sbr 79292407Sbrvoid cpu_halt(void) __dead2; 80292407Sbrvoid cpu_reset(void) __dead2; 81292407Sbrvoid fork_trampoline(void); 82292407Sbrvoid identify_cpu(void); 83292407Sbrvoid swi_vm(void *v); 84292407Sbr 85292407Sbrstatic __inline uint64_t 86292407Sbrget_cyclecount(void) 87292407Sbr{ 88292407Sbr 89292407Sbr /* TODO: This is bogus */ 90292407Sbr return (1); 91292407Sbr} 92292407Sbr 93292407Sbr#endif 94292407Sbr 95292407Sbr#endif /* !_MACHINE_CPU_H_ */ 96