mmu_phyp.c revision 255643
1/*
2 * Copyright (C) 2010 Andreas Tobler
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: head/sys/powerpc/pseries/mmu_phyp.c 255643 2013-09-17 17:37:04Z nwhitehorn $");
28
29#include <sys/param.h>
30#include <sys/kernel.h>
31#include <sys/ktr.h>
32#include <sys/lock.h>
33#include <sys/msgbuf.h>
34#include <sys/mutex.h>
35#include <sys/proc.h>
36#include <sys/sysctl.h>
37#include <sys/systm.h>
38#include <sys/vmmeter.h>
39
40#include <dev/ofw/openfirm.h>
41#include <machine/ofw_machdep.h>
42
43#include <vm/vm.h>
44#include <vm/vm_param.h>
45#include <vm/vm_kern.h>
46#include <vm/vm_page.h>
47#include <vm/vm_map.h>
48#include <vm/vm_object.h>
49#include <vm/vm_extern.h>
50#include <vm/vm_pageout.h>
51#include <vm/uma.h>
52
53#include <powerpc/aim/mmu_oea64.h>
54
55#include "mmu_if.h"
56#include "moea64_if.h"
57
58#include "phyp-hvcall.h"
59
60extern int n_slbs;
61
62/*
63 * Kernel MMU interface
64 */
65
66static void	mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
67		    vm_offset_t kernelend);
68static void	mphyp_cpu_bootstrap(mmu_t mmup, int ap);
69static void	mphyp_pte_synch(mmu_t, uintptr_t pt, struct lpte *pvo_pt);
70static void	mphyp_pte_clear(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
71		    uint64_t vpn, u_int64_t ptebit);
72static void	mphyp_pte_unset(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
73		    uint64_t vpn);
74static void	mphyp_pte_change(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
75		    uint64_t vpn);
76static int	mphyp_pte_insert(mmu_t, u_int ptegidx, struct lpte *pvo_pt);
77static uintptr_t mphyp_pvo_to_pte(mmu_t, const struct pvo_entry *pvo);
78
79#define VSID_HASH_MASK		0x0000007fffffffffULL
80
81
82static mmu_method_t mphyp_methods[] = {
83        MMUMETHOD(mmu_bootstrap,        mphyp_bootstrap),
84        MMUMETHOD(mmu_cpu_bootstrap,    mphyp_cpu_bootstrap),
85
86	MMUMETHOD(moea64_pte_synch,     mphyp_pte_synch),
87        MMUMETHOD(moea64_pte_clear,     mphyp_pte_clear),
88        MMUMETHOD(moea64_pte_unset,     mphyp_pte_unset),
89        MMUMETHOD(moea64_pte_change,    mphyp_pte_change),
90        MMUMETHOD(moea64_pte_insert,    mphyp_pte_insert),
91        MMUMETHOD(moea64_pvo_to_pte,    mphyp_pvo_to_pte),
92
93        { 0, 0 }
94};
95
96MMU_DEF_INHERIT(pseries_mmu, "mmu_phyp", mphyp_methods, 0, oea64_mmu);
97
98static void
99mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
100{
101	uint64_t final_pteg_count = 0;
102	char buf[8];
103	uint32_t prop[2];
104	uint32_t nptlp, shift = 0, slb_encoding = 0;
105	phandle_t dev, node, root;
106	int idx, len, res;
107
108	moea64_early_bootstrap(mmup, kernelstart, kernelend);
109
110	root = OF_peer(0);
111
112        dev = OF_child(root);
113	while (dev != 0) {
114                res = OF_getprop(dev, "name", buf, sizeof(buf));
115                if (res > 0 && strcmp(buf, "cpus") == 0)
116                        break;
117                dev = OF_peer(dev);
118        }
119
120	node = OF_child(dev);
121
122	while (node != 0) {
123                res = OF_getprop(node, "device_type", buf, sizeof(buf));
124                if (res > 0 && strcmp(buf, "cpu") == 0)
125                        break;
126                node = OF_peer(node);
127        }
128
129	res = OF_getprop(node, "ibm,pft-size", prop, sizeof(prop));
130	if (res <= 0)
131		panic("mmu_phyp: unknown PFT size");
132	final_pteg_count = 1 << prop[1];
133	res = OF_getprop(node, "ibm,slb-size", prop, sizeof(prop[0]));
134	if (res > 0)
135		n_slbs = prop[0];
136
137	moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
138
139	/*
140	 * Scan the large page size property for PAPR compatible machines.
141	 * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties'
142	 * for the encoding of the property.
143	 */
144
145	len = OF_getproplen(node, "ibm,segment-page-sizes");
146	if (len > 0) {
147		/*
148		 * We have to use a variable length array on the stack
149		 * since we have very limited stack space.
150		 */
151		cell_t arr[len/sizeof(cell_t)];
152		res = OF_getprop(node, "ibm,segment-page-sizes", &arr,
153				 sizeof(arr));
154		len /= 4;
155		idx = 0;
156		while (len > 0) {
157			shift = arr[idx];
158			slb_encoding = arr[idx + 1];
159			nptlp = arr[idx + 2];
160			idx += 3;
161			len -= 3;
162			while (len > 0 && nptlp) {
163				idx += 2;
164				len -= 2;
165				nptlp--;
166			}
167		}
168		moea64_large_page_shift = shift;
169		moea64_large_page_size = 1 << shift;
170	}
171
172	moea64_mid_bootstrap(mmup, kernelstart, kernelend);
173	moea64_late_bootstrap(mmup, kernelstart, kernelend);
174}
175
176static void
177mphyp_cpu_bootstrap(mmu_t mmup, int ap)
178{
179	struct slb *slb = PCPU_GET(slb);
180	register_t seg0;
181	int i;
182
183	/*
184	 * Install kernel SLB entries
185	 */
186
187        __asm __volatile ("slbia");
188        __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0));
189	for (i = 0; i < 64; i++) {
190		if (!(slb[i].slbe & SLBE_VALID))
191			continue;
192
193		__asm __volatile ("slbmte %0, %1" ::
194		    "r"(slb[i].slbv), "r"(slb[i].slbe));
195	}
196}
197
198static void
199mphyp_pte_synch(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt)
200{
201	struct lpte pte;
202	uint64_t junk;
203
204	phyp_pft_hcall(H_READ, 0, slot, 0, 0, &pte.pte_hi, &pte.pte_lo,
205	    &junk);
206
207	pvo_pt->pte_lo |= pte.pte_lo & (LPTE_CHG | LPTE_REF);
208}
209
210static void
211mphyp_pte_clear(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn,
212    u_int64_t ptebit)
213{
214
215	if (ptebit & LPTE_CHG)
216		phyp_hcall(H_CLEAR_MOD, 0, slot);
217	if (ptebit & LPTE_REF)
218		phyp_hcall(H_CLEAR_REF, 0, slot);
219}
220
221static void
222mphyp_pte_unset(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn)
223{
224
225	/* XXX: last argument can check the VPN -- set flag to enable */
226	phyp_hcall(H_REMOVE, 0, slot, vpn);
227}
228
229static void
230mphyp_pte_change(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn)
231{
232	struct lpte evicted;
233	uint64_t index, junk;
234	int64_t result;
235
236	/*
237	 * NB: this is protected by the global table lock, so this two-step
238	 * is safe, except for the scratch-page case. No CPUs on which we run
239	 * this code should be using scratch pages.
240	 */
241	KASSERT(!(pvo_pt->pte_hi & LPTE_LOCKED),
242	    ("Locked pages not supported on PHYP"));
243
244	/* XXX: optimization using H_PROTECT for common case? */
245	result = phyp_hcall(H_REMOVE, 0, slot, vpn);
246	if (result != H_SUCCESS)
247		panic("mphyp_pte_change() invalidation failure: %ld\n", result);
248	result = phyp_pft_hcall(H_ENTER, H_EXACT, slot, pvo_pt->pte_hi,
249				pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
250	if (result != H_SUCCESS)
251		panic("mphyp_pte_change() insertion failure: %ld\n", result);
252}
253
254static __inline int
255mphyp_pte_spillable_ident(u_int ptegidx, struct lpte *to_evict)
256{
257	uint64_t slot, junk, k;
258	struct lpte pt;
259	int     i, j;
260
261	/* Start at a random slot */
262	i = mftb() % 8;
263	k = -1;
264	for (j = 0; j < 8; j++) {
265		slot = (ptegidx << 3) + (i + j) % 8;
266		phyp_pft_hcall(H_READ, 0, slot, 0, 0, &pt.pte_hi, &pt.pte_lo,
267		    &junk);
268
269		if (pt.pte_hi & LPTE_SWBITS)
270			continue;
271
272		/* This is a candidate, so remember it */
273		k = slot;
274
275		/* Try to get a page that has not been used lately */
276		if (!(pt.pte_lo & LPTE_REF)) {
277			memcpy(to_evict, &pt, sizeof(struct lpte));
278			return (k);
279		}
280	}
281
282	phyp_pft_hcall(H_READ, 0, slot, 0, 0, &to_evict->pte_hi,
283	    &to_evict->pte_lo, &junk);
284	return (k);
285}
286
287static int
288mphyp_pte_insert(mmu_t mmu, u_int ptegidx, struct lpte *pvo_pt)
289{
290	int64_t result;
291	struct lpte evicted;
292	struct pvo_entry *pvo;
293	uint64_t index, junk;
294	u_int pteg_bktidx;
295
296	/* Check for locked pages, which we can't support on this system */
297	KASSERT(!(pvo_pt->pte_hi & LPTE_LOCKED),
298	    ("Locked pages not supported on PHYP"));
299
300	/* Initialize PTE */
301	pvo_pt->pte_hi |= LPTE_VALID;
302	pvo_pt->pte_hi &= ~LPTE_HID;
303	evicted.pte_hi = 0;
304
305	/*
306	 * First try primary hash.
307	 */
308	pteg_bktidx = ptegidx;
309	result = phyp_pft_hcall(H_ENTER, 0, pteg_bktidx << 3, pvo_pt->pte_hi,
310	    pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
311	if (result == H_SUCCESS)
312		return (index & 0x07);
313	KASSERT(result == H_PTEG_FULL, ("Page insertion error: %ld "
314	    "(ptegidx: %#x/%#x, PTE %#lx/%#lx", result, ptegidx,
315	    moea64_pteg_count, pvo_pt->pte_hi, pvo_pt->pte_lo));
316
317	/*
318	 * Next try secondary hash.
319	 */
320	pteg_bktidx ^= moea64_pteg_mask;
321	pvo_pt->pte_hi |= LPTE_HID;
322	result = phyp_pft_hcall(H_ENTER, 0, pteg_bktidx << 3,
323	    pvo_pt->pte_hi, pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
324	if (result == H_SUCCESS)
325		return (index & 0x07);
326	KASSERT(result == H_PTEG_FULL, ("Secondary page insertion error: %ld",
327	    result));
328
329	/*
330	 * Out of luck. Find a PTE to sacrifice.
331	 */
332	pteg_bktidx = ptegidx;
333	index = mphyp_pte_spillable_ident(pteg_bktidx, &evicted);
334	if (index == -1L) {
335		pteg_bktidx ^= moea64_pteg_mask;
336		index = mphyp_pte_spillable_ident(pteg_bktidx, &evicted);
337	}
338
339	if (index == -1L) {
340		/* No freeable slots in either PTEG? We're hosed. */
341		panic("mphyp_pte_insert: overflow");
342		return (-1);
343	}
344
345	if (pteg_bktidx == ptegidx)
346                pvo_pt->pte_hi &= ~LPTE_HID;
347        else
348                pvo_pt->pte_hi |= LPTE_HID;
349
350	/*
351	 * Synchronize the sacrifice PTE with its PVO, then mark both
352	 * invalid. The PVO will be reused when/if the VM system comes
353	 * here after a fault.
354	 */
355
356	if (evicted.pte_hi & LPTE_HID)
357		pteg_bktidx ^= moea64_pteg_mask; /* PTEs indexed by primary */
358
359	LIST_FOREACH(pvo, &moea64_pvo_table[pteg_bktidx], pvo_olink) {
360		if (pvo->pvo_pte.lpte.pte_hi == evicted.pte_hi) {
361			KASSERT(pvo->pvo_pte.lpte.pte_hi & LPTE_VALID,
362			    ("Invalid PVO for valid PTE!"));
363			phyp_hcall(H_REMOVE, 0, index, 0);
364			PVO_PTEGIDX_CLR(pvo);
365			moea64_pte_overflow++;
366			break;
367		}
368	}
369
370	KASSERT(pvo->pvo_pte.lpte.pte_hi == evicted.pte_hi,
371	   ("Unable to find PVO for spilled PTE"));
372
373	/*
374	 * Set the new PTE.
375	 */
376	result = phyp_pft_hcall(H_ENTER, H_EXACT, index, pvo_pt->pte_hi,
377	    pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
378	if (result == H_SUCCESS)
379		return (index & 0x07);
380
381	panic("Page replacement error: %ld", result);
382	return (-1);
383}
384
385static __inline u_int
386va_to_pteg(uint64_t vsid, vm_offset_t addr, int large)
387{
388	uint64_t hash;
389	int shift;
390
391	shift = large ? moea64_large_page_shift : ADDR_PIDX_SHFT;
392	hash = (vsid & VSID_HASH_MASK) ^ (((uint64_t)addr & ADDR_PIDX) >>
393	    shift);
394	return (hash & moea64_pteg_mask);
395}
396
397static uintptr_t
398mphyp_pvo_to_pte(mmu_t mmu, const struct pvo_entry *pvo)
399{
400	uint64_t vsid;
401	u_int ptegidx;
402
403	/* If the PTEG index is not set, then there is no page table entry */
404	if (!PVO_PTEGIDX_ISSET(pvo))
405		return (-1);
406
407	vsid = PVO_VSID(pvo);
408	ptegidx = va_to_pteg(vsid, PVO_VADDR(pvo), pvo->pvo_vaddr & PVO_LARGE);
409
410	/*
411	 * We can find the actual pte entry without searching by grabbing
412	 * the PTEG index from 3 unused bits in pvo_vaddr and by
413	 * noticing the HID bit.
414	 */
415	if (pvo->pvo_pte.lpte.pte_hi & LPTE_HID)
416		ptegidx ^= moea64_pteg_mask;
417
418	return ((ptegidx << 3) | PVO_PTEGIDX_GET(pvo));
419}
420
421