mpc85xx.c revision 234609 
1/*-
2 * Copyright (C) 2008 Semihalf, Rafal Jaworowski
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/mpc85xx.c 234609 2012-04-23 15:47:07Z nwhitehorn $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/lock.h>
33#include <sys/mutex.h>
34#include <sys/rman.h>
35
36#include <vm/vm.h>
37#include <vm/vm_param.h>
38
39#include <machine/cpu.h>
40#include <machine/cpufunc.h>
41#include <machine/pio.h>
42#include <machine/spr.h>
43
44#include <powerpc/mpc85xx/mpc85xx.h>
45
46/*
47 * MPC85xx system specific routines
48 */
49
50uint32_t
51ccsr_read4(uintptr_t addr)
52{
53	volatile uint32_t *ptr = (void *)addr;
54
55	return (*ptr);
56}
57
58void
59ccsr_write4(uintptr_t addr, uint32_t val)
60{
61	volatile uint32_t *ptr = (void *)addr;
62
63	*ptr = val;
64	powerpc_iomb();
65}
66
67int
68law_getmax(void)
69{
70	uint32_t ver;
71
72	ver = SVR_VER(mfspr(SPR_SVR));
73	if (ver == SVR_MPC8555E || ver == SVR_MPC8555)
74		return (8);
75	if (ver == SVR_MPC8548E || ver == SVR_MPC8548 ||
76	    ver == SVR_MPC8533E || ver == SVR_MPC8533)
77		return (10);
78
79	return (12);
80}
81
82#define	_LAW_SR(trgt,size)	(0x80000000 | (trgt << 20) | (ffsl(size) - 2))
83#define	_LAW_BAR(addr)		(addr >> 12)
84
85int
86law_enable(int trgt, u_long addr, u_long size)
87{
88	uint32_t bar, sr;
89	int i, law_max;
90
91	law_max = law_getmax();
92	bar = _LAW_BAR(addr);
93	sr = _LAW_SR(trgt, size);
94
95	/* Bail if already programmed. */
96	for (i = 0; i < law_max; i++)
97		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
98		    bar == ccsr_read4(OCP85XX_LAWBAR(i)))
99			return (0);
100
101	/* Find an unused access window. */
102	for (i = 0; i < law_max; i++)
103		if ((ccsr_read4(OCP85XX_LAWSR(i)) & 0x80000000) == 0)
104			break;
105
106	if (i == law_max)
107		return (ENOSPC);
108
109	ccsr_write4(OCP85XX_LAWBAR(i), bar);
110	ccsr_write4(OCP85XX_LAWSR(i), sr);
111	return (0);
112}
113
114int
115law_disable(int trgt, u_long addr, u_long size)
116{
117	uint32_t bar, sr;
118	int i, law_max;
119
120	law_max = law_getmax();
121	bar = _LAW_BAR(addr);
122	sr = _LAW_SR(trgt, size);
123
124	/* Find and disable requested LAW. */
125	for (i = 0; i < law_max; i++)
126		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
127		    bar == ccsr_read4(OCP85XX_LAWBAR(i))) {
128			ccsr_write4(OCP85XX_LAWBAR(i), 0);
129			ccsr_write4(OCP85XX_LAWSR(i), 0);
130			return (0);
131		}
132
133	return (ENOENT);
134}
135
136int
137law_pci_target(struct resource *res, int *trgt_mem, int *trgt_io)
138{
139	u_long start;
140	uint32_t ver;
141	int trgt, rv;
142
143	ver = SVR_VER(mfspr(SPR_SVR));
144
145	start = rman_get_start(res) & 0xf000;
146
147	rv = 0;
148	trgt = -1;
149	switch (start) {
150	case 0x8000:
151		trgt = 0;
152		break;
153	case 0x9000:
154		trgt = 1;
155		break;
156	case 0xa000:
157		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
158			trgt = 3;
159		else
160			trgt = 2;
161		break;
162	case 0xb000:
163		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
164			rv = EINVAL;
165		else
166			trgt = 3;
167		break;
168	default:
169		rv = ENXIO;
170	}
171	*trgt_mem = *trgt_io = trgt;
172	return (rv);
173}
174
175