pio.h revision 77957
1/* 2 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed under OpenBSD by 15 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 16 * 4. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 20 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $ 32 * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ 33 * $FreeBSD: head/sys/powerpc/include/pio.h 77957 2001-06-10 02:39:37Z benno $ 34 */ 35 36#ifndef _MACHINE_PIO_H_ 37#define _MACHINE_PIO_H_ 38/* 39 * I/O macros. 40 */ 41 42static __inline void 43__outb(volatile u_int8_t *a, u_int8_t v) 44{ 45 *a = v; 46 __asm__ volatile("eieio; sync"); 47} 48 49static __inline void 50__outw(volatile u_int16_t *a, u_int16_t v) 51{ 52 *a = v; 53 __asm__ volatile("eieio; sync"); 54} 55 56static __inline void 57__outl(volatile u_int32_t *a, u_int32_t v) 58{ 59 *a = v; 60 __asm__ volatile("eieio; sync"); 61} 62 63static __inline void 64__outwrb(volatile u_int16_t *a, u_int16_t v) 65{ 66 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 67 __asm__ volatile("eieio; sync"); 68} 69 70static __inline void 71__outlrb(volatile u_int32_t *a, u_int32_t v) 72{ 73 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 74 __asm__ volatile("eieio; sync"); 75} 76 77static __inline u_int8_t 78__inb(volatile u_int8_t *a) 79{ 80 u_int8_t _v_; 81 82 _v_ = *a; 83 __asm__ volatile("eieio; sync"); 84 return _v_; 85} 86 87static __inline u_int16_t 88__inw(volatile u_int16_t *a) 89{ 90 u_int16_t _v_; 91 92 _v_ = *a; 93 __asm__ volatile("eieio; sync"); 94 return _v_; 95} 96 97static __inline u_int32_t 98__inl(volatile u_int32_t *a) 99{ 100 u_int32_t _v_; 101 102 _v_ = *a; 103 __asm__ volatile("eieio; sync"); 104 return _v_; 105} 106 107static __inline u_int16_t 108__inwrb(volatile u_int16_t *a) 109{ 110 u_int16_t _v_; 111 112 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 113 __asm__ volatile("eieio; sync"); 114 return _v_; 115} 116 117static __inline u_int32_t 118__inlrb(volatile u_int32_t *a) 119{ 120 u_int32_t _v_; 121 122 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 123 __asm__ volatile("eieio; sync"); 124 return _v_; 125} 126 127#define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) 128#define out8(a,v) outb(a,v) 129#define outw(a,v) (__outw((volatile u_int16_t *)(a), v)) 130#define out16(a,v) outw(a,v) 131#define outl(a,v) (__outl((volatile u_int32_t *)(a), v)) 132#define out32(a,v) outl(a,v) 133#define inb(a) (__inb((volatile u_int8_t *)(a))) 134#define in8(a) inb(a) 135#define inw(a) (__inw((volatile u_int16_t *)(a))) 136#define in16(a) inw(a) 137#define inl(a) (__inl((volatile u_int32_t *)(a))) 138#define in32(a) inl(a) 139 140#define out8rb(a,v) outb(a,v) 141#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v)) 142#define out16rb(a,v) outwrb(a,v) 143#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v)) 144#define out32rb(a,v) outlrb(a,v) 145#define in8rb(a) inb(a) 146#define inwrb(a) (__inwrb((volatile u_int16_t *)(a))) 147#define in16rb(a) inwrb(a) 148#define inlrb(a) (__inlrb((volatile u_int32_t *)(a))) 149#define in32rb(a) inlrb(a) 150 151 152static __inline void 153__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c) 154{ 155 while (c--) 156 *a = *s++; 157 __asm__ volatile("eieio; sync"); 158} 159 160static __inline void 161__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c) 162{ 163 while (c--) 164 *a = *s++; 165 __asm__ volatile("eieio; sync"); 166} 167 168static __inline void 169__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c) 170{ 171 while (c--) 172 *a = *s++; 173 __asm__ volatile("eieio; sync"); 174} 175 176static __inline void 177__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c) 178{ 179 while (c--) 180 __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 181 __asm__ volatile("eieio; sync"); 182} 183 184static __inline void 185__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c) 186{ 187 while (c--) 188 __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 189 __asm__ volatile("eieio; sync"); 190} 191 192static __inline void 193__insb(volatile u_int8_t *a, u_int8_t *d, size_t c) 194{ 195 while (c--) 196 *d++ = *a; 197 __asm__ volatile("eieio; sync"); 198} 199 200static __inline void 201__insw(volatile u_int16_t *a, u_int16_t *d, size_t c) 202{ 203 while (c--) 204 *d++ = *a; 205 __asm__ volatile("eieio; sync"); 206} 207 208static __inline void 209__insl(volatile u_int32_t *a, u_int32_t *d, size_t c) 210{ 211 while (c--) 212 *d++ = *a; 213 __asm__ volatile("eieio; sync"); 214} 215 216static __inline void 217__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c) 218{ 219 while (c--) 220 __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 221 __asm__ volatile("eieio; sync"); 222} 223 224static __inline void 225__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c) 226{ 227 while (c--) 228 __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 229 __asm__ volatile("eieio; sync"); 230} 231 232#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c)) 233#define outs8(a,s,c) outsb(a,s,c) 234#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c)) 235#define outs16(a,s,c) outsw(a,s,c) 236#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c)) 237#define outs32(a,s,c) outsl(a,s,c) 238#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c)) 239#define ins8(a,d,c) insb(a,d,c) 240#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c)) 241#define ins16(a,d,c) insw(a,d,c) 242#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c)) 243#define ins32(a,d,c) insl(a,d,c) 244 245#define outs8rb(a,s,c) outsb(a,s,c) 246#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c)) 247#define outs16rb(a,s,c) outswrb(a,s,c) 248#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c)) 249#define outs32rb(a,s,c) outslrb(a,s,c) 250#define ins8rb(a,d,c) insb(a,d,c) 251#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c)) 252#define ins16rb(a,d,c) inswrb(a,d,c) 253#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c)) 254#define ins32rb(a,d,c) inslrb(a,d,c) 255 256#endif /*_MACHINE_PIO_H_*/ 257