pio.h revision 139825
1139825Simp/*- 277957Sbenno * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 377957Sbenno * 477957Sbenno * Redistribution and use in source and binary forms, with or without 577957Sbenno * modification, are permitted provided that the following conditions 677957Sbenno * are met: 777957Sbenno * 1. Redistributions of source code must retain the above copyright 877957Sbenno * notice, this list of conditions and the following disclaimer. 977957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1077957Sbenno * notice, this list of conditions and the following disclaimer in the 1177957Sbenno * documentation and/or other materials provided with the distribution. 1277957Sbenno * 3. All advertising materials mentioning features or use of this software 1377957Sbenno * must display the following acknowledgement: 1477957Sbenno * This product includes software developed under OpenBSD by 1577957Sbenno * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 1677957Sbenno * 4. The name of the author may not be used to endorse or promote products 1777957Sbenno * derived from this software without specific prior written permission. 1877957Sbenno * 1977957Sbenno * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 2077957Sbenno * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 2177957Sbenno * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2277957Sbenno * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 2377957Sbenno * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2477957Sbenno * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2577957Sbenno * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2677957Sbenno * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2777957Sbenno * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2877957Sbenno * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2977957Sbenno * SUCH DAMAGE. 3077957Sbenno * 3177957Sbenno * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $ 3277957Sbenno * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ 3377957Sbenno * $FreeBSD: head/sys/powerpc/include/pio.h 139825 2005-01-07 02:29:27Z imp $ 3477957Sbenno */ 3577957Sbenno 3677957Sbenno#ifndef _MACHINE_PIO_H_ 3777957Sbenno#define _MACHINE_PIO_H_ 3877957Sbenno/* 3977957Sbenno * I/O macros. 4077957Sbenno */ 4177957Sbenno 4277957Sbennostatic __inline void 4377957Sbenno__outb(volatile u_int8_t *a, u_int8_t v) 4477957Sbenno{ 4577957Sbenno *a = v; 4677957Sbenno __asm__ volatile("eieio; sync"); 4777957Sbenno} 4877957Sbenno 4977957Sbennostatic __inline void 5077957Sbenno__outw(volatile u_int16_t *a, u_int16_t v) 5177957Sbenno{ 5277957Sbenno *a = v; 5377957Sbenno __asm__ volatile("eieio; sync"); 5477957Sbenno} 5577957Sbenno 5677957Sbennostatic __inline void 5777957Sbenno__outl(volatile u_int32_t *a, u_int32_t v) 5877957Sbenno{ 5977957Sbenno *a = v; 6077957Sbenno __asm__ volatile("eieio; sync"); 6177957Sbenno} 6277957Sbenno 6377957Sbennostatic __inline void 6477957Sbenno__outwrb(volatile u_int16_t *a, u_int16_t v) 6577957Sbenno{ 6677957Sbenno __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 6777957Sbenno __asm__ volatile("eieio; sync"); 6877957Sbenno} 6977957Sbenno 7077957Sbennostatic __inline void 7177957Sbenno__outlrb(volatile u_int32_t *a, u_int32_t v) 7277957Sbenno{ 7377957Sbenno __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 7477957Sbenno __asm__ volatile("eieio; sync"); 7577957Sbenno} 7677957Sbenno 7777957Sbennostatic __inline u_int8_t 7877957Sbenno__inb(volatile u_int8_t *a) 7977957Sbenno{ 8077957Sbenno u_int8_t _v_; 8177957Sbenno 8277957Sbenno _v_ = *a; 8377957Sbenno __asm__ volatile("eieio; sync"); 8477957Sbenno return _v_; 8577957Sbenno} 8677957Sbenno 8777957Sbennostatic __inline u_int16_t 8877957Sbenno__inw(volatile u_int16_t *a) 8977957Sbenno{ 9077957Sbenno u_int16_t _v_; 9177957Sbenno 9277957Sbenno _v_ = *a; 9377957Sbenno __asm__ volatile("eieio; sync"); 9477957Sbenno return _v_; 9577957Sbenno} 9677957Sbenno 9777957Sbennostatic __inline u_int32_t 9877957Sbenno__inl(volatile u_int32_t *a) 9977957Sbenno{ 10077957Sbenno u_int32_t _v_; 10177957Sbenno 10277957Sbenno _v_ = *a; 10377957Sbenno __asm__ volatile("eieio; sync"); 10477957Sbenno return _v_; 10577957Sbenno} 10677957Sbenno 10777957Sbennostatic __inline u_int16_t 10877957Sbenno__inwrb(volatile u_int16_t *a) 10977957Sbenno{ 11077957Sbenno u_int16_t _v_; 11177957Sbenno 11277957Sbenno __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 11377957Sbenno __asm__ volatile("eieio; sync"); 11477957Sbenno return _v_; 11577957Sbenno} 11677957Sbenno 11777957Sbennostatic __inline u_int32_t 11877957Sbenno__inlrb(volatile u_int32_t *a) 11977957Sbenno{ 12077957Sbenno u_int32_t _v_; 12177957Sbenno 12277957Sbenno __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 12377957Sbenno __asm__ volatile("eieio; sync"); 12477957Sbenno return _v_; 12577957Sbenno} 12677957Sbenno 12777957Sbenno#define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) 12877957Sbenno#define out8(a,v) outb(a,v) 12977957Sbenno#define outw(a,v) (__outw((volatile u_int16_t *)(a), v)) 13077957Sbenno#define out16(a,v) outw(a,v) 13177957Sbenno#define outl(a,v) (__outl((volatile u_int32_t *)(a), v)) 13277957Sbenno#define out32(a,v) outl(a,v) 13377957Sbenno#define inb(a) (__inb((volatile u_int8_t *)(a))) 13477957Sbenno#define in8(a) inb(a) 13577957Sbenno#define inw(a) (__inw((volatile u_int16_t *)(a))) 13677957Sbenno#define in16(a) inw(a) 13777957Sbenno#define inl(a) (__inl((volatile u_int32_t *)(a))) 13877957Sbenno#define in32(a) inl(a) 13977957Sbenno 14077957Sbenno#define out8rb(a,v) outb(a,v) 14177957Sbenno#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v)) 14277957Sbenno#define out16rb(a,v) outwrb(a,v) 14377957Sbenno#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v)) 14477957Sbenno#define out32rb(a,v) outlrb(a,v) 14577957Sbenno#define in8rb(a) inb(a) 14677957Sbenno#define inwrb(a) (__inwrb((volatile u_int16_t *)(a))) 14777957Sbenno#define in16rb(a) inwrb(a) 14877957Sbenno#define inlrb(a) (__inlrb((volatile u_int32_t *)(a))) 14977957Sbenno#define in32rb(a) inlrb(a) 15077957Sbenno 15177957Sbenno 15277957Sbennostatic __inline void 15377957Sbenno__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c) 15477957Sbenno{ 15577957Sbenno while (c--) 15677957Sbenno *a = *s++; 15777957Sbenno __asm__ volatile("eieio; sync"); 15877957Sbenno} 15977957Sbenno 16077957Sbennostatic __inline void 16177957Sbenno__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c) 16277957Sbenno{ 16377957Sbenno while (c--) 16477957Sbenno *a = *s++; 16577957Sbenno __asm__ volatile("eieio; sync"); 16677957Sbenno} 16777957Sbenno 16877957Sbennostatic __inline void 16977957Sbenno__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c) 17077957Sbenno{ 17177957Sbenno while (c--) 17277957Sbenno *a = *s++; 17377957Sbenno __asm__ volatile("eieio; sync"); 17477957Sbenno} 17577957Sbenno 17677957Sbennostatic __inline void 17777957Sbenno__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c) 17877957Sbenno{ 17977957Sbenno while (c--) 18077957Sbenno __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 18177957Sbenno __asm__ volatile("eieio; sync"); 18277957Sbenno} 18377957Sbenno 18477957Sbennostatic __inline void 18577957Sbenno__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c) 18677957Sbenno{ 18777957Sbenno while (c--) 18877957Sbenno __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 18977957Sbenno __asm__ volatile("eieio; sync"); 19077957Sbenno} 19177957Sbenno 19277957Sbennostatic __inline void 19377957Sbenno__insb(volatile u_int8_t *a, u_int8_t *d, size_t c) 19477957Sbenno{ 19577957Sbenno while (c--) 19677957Sbenno *d++ = *a; 19777957Sbenno __asm__ volatile("eieio; sync"); 19877957Sbenno} 19977957Sbenno 20077957Sbennostatic __inline void 20177957Sbenno__insw(volatile u_int16_t *a, u_int16_t *d, size_t c) 20277957Sbenno{ 20377957Sbenno while (c--) 20477957Sbenno *d++ = *a; 20577957Sbenno __asm__ volatile("eieio; sync"); 20677957Sbenno} 20777957Sbenno 20877957Sbennostatic __inline void 20977957Sbenno__insl(volatile u_int32_t *a, u_int32_t *d, size_t c) 21077957Sbenno{ 21177957Sbenno while (c--) 21277957Sbenno *d++ = *a; 21377957Sbenno __asm__ volatile("eieio; sync"); 21477957Sbenno} 21577957Sbenno 21677957Sbennostatic __inline void 21777957Sbenno__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c) 21877957Sbenno{ 21977957Sbenno while (c--) 22077957Sbenno __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 22177957Sbenno __asm__ volatile("eieio; sync"); 22277957Sbenno} 22377957Sbenno 22477957Sbennostatic __inline void 22577957Sbenno__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c) 22677957Sbenno{ 22777957Sbenno while (c--) 22877957Sbenno __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 22977957Sbenno __asm__ volatile("eieio; sync"); 23077957Sbenno} 23177957Sbenno 23277957Sbenno#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c)) 23377957Sbenno#define outs8(a,s,c) outsb(a,s,c) 23477957Sbenno#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c)) 23577957Sbenno#define outs16(a,s,c) outsw(a,s,c) 23677957Sbenno#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c)) 23777957Sbenno#define outs32(a,s,c) outsl(a,s,c) 23877957Sbenno#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c)) 23977957Sbenno#define ins8(a,d,c) insb(a,d,c) 24077957Sbenno#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c)) 24177957Sbenno#define ins16(a,d,c) insw(a,d,c) 24277957Sbenno#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c)) 24377957Sbenno#define ins32(a,d,c) insl(a,d,c) 24477957Sbenno 24577957Sbenno#define outs8rb(a,s,c) outsb(a,s,c) 24677957Sbenno#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c)) 24777957Sbenno#define outs16rb(a,s,c) outswrb(a,s,c) 24877957Sbenno#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c)) 24977957Sbenno#define outs32rb(a,s,c) outslrb(a,s,c) 25077957Sbenno#define ins8rb(a,d,c) insb(a,d,c) 25177957Sbenno#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c)) 25277957Sbenno#define ins16rb(a,d,c) inswrb(a,d,c) 25377957Sbenno#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c)) 25477957Sbenno#define ins32rb(a,d,c) inslrb(a,d,c) 25577957Sbenno 25677957Sbenno#endif /*_MACHINE_PIO_H_*/ 257