1110385Sbenno/*- 2110385Sbenno * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 3110385Sbenno * 4110385Sbenno * Redistribution and use in source and binary forms, with or without 5110385Sbenno * modification, are permitted provided that the following conditions 6110385Sbenno * are met: 7110385Sbenno * 1. Redistributions of source code must retain the above copyright 8110385Sbenno * notice, this list of conditions and the following disclaimer. 9110385Sbenno * 2. Redistributions in binary form must reproduce the above copyright 10110385Sbenno * notice, this list of conditions and the following disclaimer in the 11110385Sbenno * documentation and/or other materials provided with the distribution. 12110385Sbenno * 3. The name of the author may not be used to endorse or promote products 13110385Sbenno * derived from this software without specific prior written permission. 14110385Sbenno * 15110385Sbenno * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16110385Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17110385Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18110385Sbenno * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19110385Sbenno * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20110385Sbenno * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21110385Sbenno * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22110385Sbenno * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23110385Sbenno * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24110385Sbenno * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25110385Sbenno * 26110385Sbenno * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ 27110385Sbenno * $FreeBSD: releng/11.0/sys/powerpc/include/hid.h 236025 2012-05-25 21:12:24Z raj $ 28110385Sbenno */ 29110385Sbenno 30110385Sbenno#ifndef _POWERPC_HID_H_ 31110385Sbenno#define _POWERPC_HID_H_ 32110385Sbenno 33110385Sbenno/* Hardware Implementation Dependent registers for the PowerPC */ 34110385Sbenno 35191375Sraj#define HID0_EMCP 0x80000000 /* Enable machine check pin */ 36110385Sbenno#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ 37110385Sbenno#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ 38110385Sbenno#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ 39110385Sbenno#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ 40110385Sbenno#define HID0_EICE 0x04000000 /* Enable ICE output */ 41110385Sbenno#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ 42110385Sbenno#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ 43110385Sbenno#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ 44198445Snwhitehorn#define HID0_DEEPNAP 0x01000000 /* Enable deep nap mode (970) */ 45141224Sgrehan#define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */ 46110385Sbenno#define HID0_DOZE 0x00800000 /* Enable doze mode */ 47110385Sbenno#define HID0_NAP 0x00400000 /* Enable nap mode */ 48110385Sbenno#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ 49110385Sbenno#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ 50110385Sbenno#define HID0_RISEG 0x00080000 /* Read I-SEG */ 51190681Snwhitehorn#define HID0_TG 0x00040000 /* Timebase Granularity (OEA64) */ 52141224Sgrehan#define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */ 53110385Sbenno#define HID0_EIEC 0x00040000 /* Enable internal error checking */ 54141224Sgrehan#define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */ 55110385Sbenno#define HID0_NHR 0x00010000 /* Not hard reset */ 56110385Sbenno#define HID0_ICE 0x00008000 /* Enable i-cache */ 57110385Sbenno#define HID0_DCE 0x00004000 /* Enable d-cache */ 58110385Sbenno#define HID0_ILOCK 0x00002000 /* i-cache lock */ 59110385Sbenno#define HID0_DLOCK 0x00001000 /* d-cache lock */ 60110385Sbenno#define HID0_ICFI 0x00000800 /* i-cache flush invalidate */ 61110385Sbenno#define HID0_DCFI 0x00000400 /* d-cache flush invalidate */ 62110385Sbenno#define HID0_SPD 0x00000200 /* Disable speculative cache access */ 63125614Sgrehan#define HID0_XBSEN 0x00000100 /* Extended BAT block-size enable (7457) */ 64110385Sbenno#define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ 65141224Sgrehan#define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+)*/ 66110385Sbenno#define HID0_SGE 0x00000080 /* Enable store gathering */ 67110385Sbenno#define HID0_DCFA 0x00000040 /* Data cache flush assist */ 68110385Sbenno#define HID0_BTIC 0x00000020 /* Enable BTIC */ 69176534Sraj#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ 70110385Sbenno#define HID0_ABE 0x00000008 /* Enable address broadcast */ 71176534Sraj#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ 72110385Sbenno#define HID0_BHT 0x00000004 /* Enable branch history table */ 73110385Sbenno#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ 74110385Sbenno 75176742Sraj#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ 76176742Sraj 77191375Sraj#define HID0_E500_TBEN 0x00004000 /* Time Base and decr. enable */ 78191375Sraj#define HID0_E500_SEL_TBCLK 0x00002000 /* Select Time Base clock */ 79191375Sraj#define HID0_E500_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ 80176742Sraj 81236025Sraj#define HID0_E500MC_L2MMU_MHD 0x40000000 /* L2MMU Multiple Hit Detection */ 82236025Sraj 83110385Sbenno#define HID0_BITMASK \ 84110385Sbenno "\20" \ 85110385Sbenno "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ 86110385Sbenno "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ 87110385Sbenno "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ 88110385Sbenno "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" 89110385Sbenno 90110385Sbenno#define HID0_7450_BITMASK \ 91110385Sbenno "\20" \ 92110385Sbenno "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ 93125614Sgrehan "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ 94125614Sgrehan "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ 95110385Sbenno "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" 96110385Sbenno 97176534Sraj#define HID0_E500_BITMASK \ 98176534Sraj "\20" \ 99176534Sraj "\040EMCP\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ 100176534Sraj "\030DOZE\027NAP\026SLEEP\025b11\024b12\023b13\022b14\021b15" \ 101176534Sraj "\020b16\017TBEN\016SEL_TBCLK\015b19\014b20\013b21\012b22\011b23" \ 102176534Sraj "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" 103176534Sraj 104198445Snwhitehorn#define HID0_970_BITMASK \ 105198445Snwhitehorn "\20" \ 106198445Snwhitehorn "\040ONEPPC\037SINGLE\036ISYNCSC\035SERGP\031DEEPNAP\030DOZE" \ 107198445Snwhitehorn "\027NAP\025DPM\023TG\022HANGDETECT\021NHR\020INORDER" \ 108198445Snwhitehorn "\016TBCTRL\015TBEN\012CIABREN\011HDICEEN\001ENATTN" 109198445Snwhitehorn 110236025Sraj#define HID0_E500MC_BITMASK \ 111236025Sraj "\20" \ 112236025Sraj "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ 113236025Sraj "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ 114236025Sraj "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ 115236025Sraj "\010EN_MAS7_UPDATE\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" 116236025Sraj 117236025Sraj#define HID0_E5500_BITMASK \ 118236025Sraj "\20" \ 119236025Sraj "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ 120236025Sraj "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ 121236025Sraj "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ 122236025Sraj "\010b24\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" 123236025Sraj 124110385Sbenno/* 125110385Sbenno * HID0 bit definitions per cpu model 126110385Sbenno * 127176742Sraj * bit 603 604 750 7400 7410 7450 7457 e500 128176742Sraj * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP 129176742Sraj * 1 - ECP DBP - - - - - 130176742Sraj * 2 EBA EBA EBA EBA EDA - - - 131176742Sraj * 3 EBD EBD EBD EBD EBD - - - 132176742Sraj * 4 SBCLK - BCLK BCKL BCLK - - - 133176742Sraj * 5 EICE - - - - TBEN TBEN - 134176742Sraj * 6 ECLK - ECLK ECLK ECLK - - - 135176742Sraj * 7 PAR PAR PAR PAR PAR STEN STEN - 136176742Sraj * 8 DOZE - DOZE DOZE DOZE - HBATEN DOZE 137176742Sraj * 9 NAP - NAP NAP NAP NAP NAP NAP 138176742Sraj * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP SLEEP 139176742Sraj * 11 DPM - DPM DPM DPM DPM DPM - 140176742Sraj * 12 RISEG - - RISEG - - - - 141176742Sraj * 13 - - - EIEC EIEC BHTCLR BHTCLR - 142176742Sraj * 14 - - - - - XAEN XAEN - 143176742Sraj * 15 - NHR NHR NHR NHR NHR NHR - 144176742Sraj * 16 ICE ICE ICE ICE ICE ICE ICE - 145176742Sraj * 17 DCE DCE DCE DCE DCE DCE DCE TBEN 146176742Sraj * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK SEL_TBCLK 147176742Sraj * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - 148176742Sraj * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI - 149176742Sraj * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI - 150176742Sraj * 22 - - SPD SPD SPG SPD SPD - 151176742Sraj * 23 - - IFEM IFTT IFTT - XBSEN - 152176742Sraj * 24 - SIE SGE SGE SGE SGE SGE EN_MAS7_UPDATE 153176742Sraj * 25 - - DCFA DCFA DCFA - - DCFA 154176742Sraj * 26 - - BTIC BTIC BTIC BTIC BTIC - 155176742Sraj * 27 FBIOB - - - - LRSTK LRSTK - 156176742Sraj * 28 - - ABE - - FOLD FOLD - 157176742Sraj * 29 - BHT BHT BHT BHT BHT BHT - 158176742Sraj * 30 - - - NOPDST NOPDST NOPDST NOPDST - 159176742Sraj * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI 160110385Sbenno * 161236025Sraj * bit e500mc e5500 162236025Sraj * 0 EMCP EMCP 163236025Sraj * 1 EN_L2MMU_MHD EN_L2MMU_MHD 164236025Sraj * 2 - - 165236025Sraj * 3 - - 166236025Sraj * 4 - - 167236025Sraj * 5 - - 168236025Sraj * 6 - - 169236025Sraj * 7 - - 170236025Sraj * 8 - - 171236025Sraj * 9 - - 172236025Sraj * 10 - - 173236025Sraj * 11 - - 174236025Sraj * 12 - - 175236025Sraj * 13 - - 176236025Sraj * 14 - - 177236025Sraj * 15 - - 178236025Sraj * 16 - - 179236025Sraj * 17 - - 180236025Sraj * 18 - - 181236025Sraj * 19 - - 182236025Sraj * 20 - - 183236025Sraj * 21 - - 184236025Sraj * 22 - - 185236025Sraj * 23 - - 186236025Sraj * 24 EN_MAS7_UPDATE - 187236025Sraj * 25 DCFA DCFA 188236025Sraj * 26 - - 189236025Sraj * 27 CIGLSO CIGLSO 190236025Sraj * 28 - - 191236025Sraj * 29 - - 192236025Sraj * 30 - - 193236025Sraj * 31 NOPTI NOPTI 194236025Sraj * 195110385Sbenno * 604: ECP = Enable cache parity checking 196110385Sbenno * 604: SIE = Serial instruction execution disable 197110385Sbenno * 7450: TBEN = Time Base Enable 198110385Sbenno * 7450: STEN = Software table lookup enable 199110385Sbenno * 7450: BHTCLR = Branch history clear 200125614Sgrehan * 7450: XAEN = Extended Addressing Enabled 201110385Sbenno * 7450: LRSTK = Link Register Stack Enable 202110385Sbenno * 7450: FOLD = Branch folding enable 203125614Sgrehan * 7457: HBATEN = High BAT Enable 204125614Sgrehan * 7457: XBSEN = Extended BAT Block Size Enable 205110385Sbenno */ 206110385Sbenno 207191375Sraj#define HID1_E500_ABE 0x00001000 /* Address broadcast enable */ 208191375Sraj#define HID1_E500_ASTME 0x00002000 /* Address bus streaming mode enable */ 209191375Sraj#define HID1_E500_RFXE 0x00020000 /* Read fault exception enable */ 210191375Sraj 211191375Sraj#define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN) 212191375Sraj#define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) 213236025Sraj#define HID0_E500MC_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD | \ 214236025Sraj HID0_E500_MAS7UPDEN) 215236025Sraj#define HID0_E5500_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD) 216191375Sraj 217209975Snwhitehorn#define HID5_970_DCBZ_SIZE_HI 0x00000080UL /* dcbz does a 32-byte store */ 218209975Snwhitehorn#define HID4_970_DISABLE_LG_PG 0x00000004ULL /* disables large pages */ 219190953Snwhitehorn 220110385Sbenno#endif /* _POWERPC_HID_H_ */ 221