cpu.h revision 293052
1254721Semaste/*-
2254721Semaste * Copyright (C) 1995-1997 Wolfgang Solfrank.
3254721Semaste * Copyright (C) 1995-1997 TooLs GmbH.
4254721Semaste * All rights reserved.
5254721Semaste *
6254721Semaste * Redistribution and use in source and binary forms, with or without
7254721Semaste * modification, are permitted provided that the following conditions
8254721Semaste * are met:
9254721Semaste * 1. Redistributions of source code must retain the above copyright
10254721Semaste *    notice, this list of conditions and the following disclaimer.
11254721Semaste * 2. Redistributions in binary form must reproduce the above copyright
12254721Semaste *    notice, this list of conditions and the following disclaimer in the
13254721Semaste *    documentation and/or other materials provided with the distribution.
14254721Semaste * 3. All advertising materials mentioning features or use of this software
15254721Semaste *    must display the following acknowledgement:
16254721Semaste *	This product includes software developed by TooLs GmbH.
17254721Semaste * 4. The name of TooLs GmbH may not be used to endorse or promote products
18254721Semaste *    derived from this software without specific prior written permission.
19254721Semaste *
20254721Semaste * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21254721Semaste * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22254721Semaste * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23254721Semaste * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24254721Semaste * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25254721Semaste * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26254721Semaste * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27254721Semaste * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28254721Semaste * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29254721Semaste * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30254721Semaste *
31254721Semaste *	$NetBSD: cpu.h,v 1.11 2000/05/26 21:19:53 thorpej Exp $
32254721Semaste * $FreeBSD: head/sys/powerpc/include/cpu.h 293052 2016-01-02 18:15:10Z nwhitehorn $
33263363Semaste */
34254721Semaste
35254721Semaste#ifndef _MACHINE_CPU_H_
36254721Semaste#define	_MACHINE_CPU_H_
37254721Semaste
38254721Semaste#include <machine/frame.h>
39254721Semaste#include <machine/pcb.h>
40254721Semaste#include <machine/psl.h>
41254721Semaste
42254721Semaste/*
43254721Semaste * CPU Feature Attributes
44254721Semaste *
45254721Semaste * These are defined in the PowerPC ELF ABI for the AT_HWCAP vector,
46263363Semaste * and are exported to userland via the machdep.cpu_features
47254721Semaste * sysctl.
48254721Semaste */
49254721Semaste
50254721Semasteextern int cpu_features;
51254721Semasteextern int cpu_features2;
52254721Semaste
53254721Semaste#define	PPC_FEATURE_32		0x80000000	/* Always true */
54254721Semaste#define	PPC_FEATURE_64		0x40000000	/* Defined on a 64-bit CPU */
55254721Semaste#define	PPC_FEATURE_HAS_ALTIVEC	0x10000000
56254721Semaste#define	PPC_FEATURE_HAS_FPU	0x08000000
57254721Semaste#define	PPC_FEATURE_HAS_MMU	0x04000000
58#define	PPC_FEATURE_UNIFIED_CACHE 0x01000000
59#define	PPC_FEATURE_BOOKE	0x00008000
60#define	PPC_FEATURE_SMT		0x00004000
61#define	PPC_FEATURE_ARCH_2_05	0x00001000
62#define	PPC_FEATURE_HAS_DFP	0x00000400
63#define	PPC_FEATURE_ARCH_2_06	0x00000100
64#define	PPC_FEATURE_HAS_VSX	0x00000080
65
66#define	PPC_FEATURE2_ARCH_2_07	0x80000000
67#define	PPC_FEATURE2_HAS_HTM	0x40000000
68#define	PPC_FEATURE2_HAS_VCRYPTO 0x02000000
69
70#define	PPC_FEATURE_BITMASK						\
71	"\20"								\
72	"\040PPC32\037PPC64\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE"	\
73	"\020BOOKE\017SMT\015ARCH205\013DFP\011ARCH206\010VSX"
74#define	PPC_FEATURE2_BITMASK						\
75	"\20"								\
76	"\040ARCH207\037HTM\032VCRYPTO"
77
78#define	TRAPF_USERMODE(frame)	(((frame)->srr1 & PSL_PR) != 0)
79#define	TRAPF_PC(frame)		((frame)->srr0)
80
81/*
82 * CTL_MACHDEP definitions.
83 */
84#define	CPU_CACHELINE	1
85
86static __inline u_int64_t
87get_cyclecount(void)
88{
89	u_int32_t _upper, _lower;
90	u_int64_t _time;
91
92	__asm __volatile(
93		"mftb %0\n"
94		"mftbu %1"
95		: "=r" (_lower), "=r" (_upper));
96
97	_time = (u_int64_t)_upper;
98	_time = (_time << 32) + _lower;
99	return (_time);
100}
101
102#define	cpu_getstack(td)	((td)->td_frame->fixreg[1])
103#define	cpu_spinwait()		__asm __volatile("or 27,27,27") /* yield */
104
105extern char btext[];
106extern char etext[];
107
108void	cpu_halt(void);
109void	cpu_reset(void);
110void	cpu_sleep(void);
111void	flush_disable_caches(void);
112void	fork_trampoline(void);
113void	swi_vm(void *);
114
115#endif	/* _MACHINE_CPU_H_ */
116