rmi_mips_exts.h revision 202173 
1/*-
2 * Copyright (c) 2003-2009 RMI Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of RMI Corporation, nor the names of its contributors,
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * RMI_BSD */
30#ifndef __MIPS_EXTS_H__
31#define __MIPS_EXTS_H__
32
33#define enable_KX(flags)   __asm__ __volatile__ (          \
34		".set push\n"              \
35		".set noat\n"               \
36		".set noreorder\n"     \
37		"mfc0 %0, $12\n\t"             \
38		"ori $1, %0, 0x81\n\t"   \
39		"xori $1, 1\n\t"      \
40		"mtc0 $1, $12\n"       \
41		".set pop\n"          \
42		: "=r"(flags) )
43
44#define disable_KX(flags)   __asm__ __volatile__ (          \
45		".set push\n"              \
46		"mtc0 %0, $12\n"       \
47		".set pop\n"          \
48		: : "r"(flags) )
49
50#define CPU_BLOCKID_IFU      0
51#define CPU_BLOCKID_ICU      1
52#define CPU_BLOCKID_IEU      2
53#define CPU_BLOCKID_LSU      3
54#define CPU_BLOCKID_MMU      4
55#define CPU_BLOCKID_PRF      5
56
57#define LSU_CERRLOG_REGID    9
58
59static __inline__ unsigned int read_32bit_phnx_ctrl_reg(int block, int reg)
60{
61	unsigned int __res;
62
63	__asm__ __volatile__(
64			".set\tpush\n\t"
65			".set\tnoreorder\n\t"
66			"move $9, %1\n"
67			/* "mfcr\t$8, $9\n\t"          */
68			".word 0x71280018\n"
69			"move %0, $8\n"
70			".set\tpop"
71			: "=r" (__res) : "r"((block<<8)|reg)
72			: "$8", "$9"
73			);
74	return __res;
75}
76
77static __inline__ void write_32bit_phnx_ctrl_reg(int block, int reg, unsigned int value)
78{
79	__asm__ __volatile__(
80			".set\tpush\n\t"
81			".set\tnoreorder\n\t"
82			"move $8, %0\n"
83			"move $9, %1\n"
84			/* "mtcr\t$8, $9\n\t"  */
85			".word 0x71280019\n"
86			".set\tpop"
87			:
88			: "r" (value), "r"((block<<8)|reg)
89			: "$8", "$9"
90			);
91}
92
93static __inline__ unsigned long long read_64bit_phnx_ctrl_reg(int block, int reg)
94{
95	unsigned int high, low;
96
97	__asm__ __volatile__(
98		".set\tmips64\n\t"
99		"move    $9, %2\n"
100		/* "mfcr    $8, $9\n" */
101		".word   0x71280018\n"
102		"dsrl32  %0, $8, 0\n\t"
103		"dsll32  $8, $8, 0\n\t"
104		"dsrl32  %1, $8, 0\n\t"
105		".set mips0"
106		: "=r" (high), "=r"(low)
107		: "r"((block<<8)|reg)
108		: "$8", "$9"
109		);
110
111	return ( (((unsigned long long)high)<<32) | low);
112}
113
114static __inline__ void write_64bit_phnx_ctrl_reg(int block, int reg,unsigned long long value)
115{
116	__uint32_t low, high;
117	high = value >> 32;
118	low = value & 0xffffffff;
119
120	__asm__ __volatile__(
121		".set push\n"
122		".set noreorder\n"
123		".set mips4\n\t"
124		/* Set up "rs" */
125		"move $9, %0\n"
126
127		/* Store 64 bit value in "rt" */
128		"dsll32 $10, %1, 0  \n\t"
129		"dsll32 $8, %2, 0  \n\t"
130		"dsrl32 $8, $8, 0  \n\t"
131		"or     $10, $8, $8 \n\t"
132
133		".word 0x71280019\n" /* mtcr $8, $9 */
134
135		".set pop\n"
136
137		:  /* No outputs */
138		: "r"((block<<8)|reg), "r" (high), "r" (low)
139		: "$8", "$9", "$10"
140		);
141}
142
143
144#endif
145