iomap.h revision 224110 
1/*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in
13 *    the documentation and/or other materials provided with the
14 *    distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/mips/nlm/hal/iomap.h 224110 2011-07-16 19:35:44Z jchandra $
29 * NETLOGIC_BSD */
30
31#ifndef __NLM_IOMAP_H__
32#define __NLM_IOMAP_H__
33
34/**
35* @file_name xlpiomap.h
36* @author Netlogic Microsystems
37* @brief Basic definitions Netlogic XLP IO BASEs
38*/
39
40/* ----------------------------------
41 *   XLP RESET Physical Address Map
42 * ----------------------------------
43 * PCI ECFG : 0x18000000 - 0x1bffffff
44 * PCI CFG  : 0x1c000000 - 0x1cffffff
45 * FLASH    : 0x1fc00000 - 0x1fffffff
46 * ----------------------------------
47 */
48
49#define XLP_DEFAULT_IO_BASE             0x18000000
50#define XLP_DEFAULT_IO_BASE_KSEG1       0xb8000000
51#define XLP_IO_SIZE 			(64 << 20)	/* Size of the ECFG Space      */
52#define XLP_IO_PCI_HDRSZ		0x100
53#define XLP_IO_DEV(node, dev)		((dev) + (node) * 8)
54#define XLP_HDR_OFFSET(node, bus, dev, fn)	(((bus) << 20) | \
55				((XLP_IO_DEV(node, dev)) << 15) | ((fn) << 12))
56
57#define XLP_IO_BRIDGE_OFFSET(node)	XLP_HDR_OFFSET(node,0,0,0)
58/* coherent inter chip */
59#define XLP_IO_CIC0_OFFSET(node)	XLP_HDR_OFFSET(node,0,0,1)
60#define XLP_IO_CIC1_OFFSET(node)	XLP_HDR_OFFSET(node,0,0,2)
61#define XLP_IO_CIC2_OFFSET(node)	XLP_HDR_OFFSET(node,0,0,3)
62#define	XLP_IO_PIC_OFFSET(node)		XLP_HDR_OFFSET(node,0,0,4)
63
64#define	XLP_IO_PCIE_OFFSET(node,i)	XLP_HDR_OFFSET(node,0,1,i)
65#define	XLP_IO_PCIE0_OFFSET(node)	XLP_HDR_OFFSET(node,0,1,0)
66#define	XLP_IO_PCIE1_OFFSET(node)	XLP_HDR_OFFSET(node,0,1,1)
67#define	XLP_IO_PCIE2_OFFSET(node)	XLP_HDR_OFFSET(node,0,1,2)
68#define	XLP_IO_PCIE3_OFFSET(node)	XLP_HDR_OFFSET(node,0,1,3)
69
70#define XLP_IO_USB_OFFSET(node, i)	XLP_HDR_OFFSET(node,0,2,i)
71#define	XLP_IO_USB_EHCI0_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,0)
72#define	XLP_IO_USB_OHCI0_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,1)
73#define	XLP_IO_USB_OHCI1_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,2)
74#define	XLP_IO_USB_EHCI1_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,3)
75#define	XLP_IO_USB_OHCI2_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,4)
76#define	XLP_IO_USB_OHCI3_OFFSET(node)	XLP_HDR_OFFSET(node,0,2,5)
77
78#define	XLP_IO_NAE_OFFSET(node)		XLP_HDR_OFFSET(node,0,3,0)
79#define	XLP_IO_POE_OFFSET(node)		XLP_HDR_OFFSET(node,0,3,1)
80
81#define	XLP_IO_CMS_OFFSET(node)		XLP_HDR_OFFSET(node,0,4,0)
82
83#define	XLP_IO_DMA_OFFSET(node)		XLP_HDR_OFFSET(node,0,5,1)
84#define	XLP_IO_SEC_OFFSET(node)		XLP_HDR_OFFSET(node,0,5,2)
85#define	XLP_IO_CMP_OFFSET(node)		XLP_HDR_OFFSET(node,0,5,3)
86
87#define XLP_IO_UART_OFFSET(node, i)	XLP_HDR_OFFSET(node,0,6,i)
88#define XLP_IO_UART0_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,0)
89#define XLP_IO_UART1_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,1)
90#define XLP_IO_I2C_OFFSET(node, i)	XLP_HDR_OFFSET(node,0,6,2+i)
91#define XLP_IO_I2C0_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,2)
92#define XLP_IO_I2C1_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,3)
93#define	XLP_IO_GPIO_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,4)
94/* system management */
95#define	XLP_IO_SYS_OFFSET(node)		XLP_HDR_OFFSET(node,0,6,5)
96#define	XLP_IO_JTAG_OFFSET(node)	XLP_HDR_OFFSET(node,0,6,6)
97
98#define	XLP_IO_NOR_OFFSET(node)		XLP_HDR_OFFSET(node,0,7,0)
99#define	XLP_IO_NAND_OFFSET(node)	XLP_HDR_OFFSET(node,0,7,1)
100#define	XLP_IO_SPI_OFFSET(node)		XLP_HDR_OFFSET(node,0,7,2)
101/* SD flash */
102#define	XLP_IO_SD_OFFSET(node)		XLP_HDR_OFFSET(node,0,7,3)
103#define XLP_IO_MMC_OFFSET(node, slot)	((XLP_IO_SD_OFFSET(node))+(slot*0x100)+XLP_IO_PCI_HDRSZ)
104/* PCI config header register id's */
105#define XLP_PCI_CFGREG0			0x00
106#define XLP_PCI_CFGREG1			0x01
107#define XLP_PCI_CFGREG2			0x02
108#define XLP_PCI_CFGREG3			0x03
109#define XLP_PCI_CFGREG4			0x04
110#define XLP_PCI_CFGREG5			0x05
111#define XLP_PCI_DEVINFO_REG0		0x30
112#define XLP_PCI_DEVINFO_REG1		0x31
113#define XLP_PCI_DEVINFO_REG2		0x32
114#define XLP_PCI_DEVINFO_REG3		0x33
115#define XLP_PCI_DEVINFO_REG4		0x34
116#define XLP_PCI_DEVINFO_REG5		0x35
117#define XLP_PCI_DEVINFO_REG6		0x36
118#define XLP_PCI_DEVINFO_REG7		0x37
119#define XLP_PCI_DEVSCRATCH_REG0		0x38
120#define XLP_PCI_DEVSCRATCH_REG1		0x39
121#define XLP_PCI_DEVSCRATCH_REG2		0x3a
122#define XLP_PCI_DEVSCRATCH_REG3		0x3b
123#define XLP_PCI_MSGSTN_REG		0x3c
124#define XLP_PCI_IRTINFO_REG		0x3d
125#define XLP_PCI_UCODEINFO_REG		0x3e
126#define XLP_PCI_SBB_WT_REG		0x3f
127
128#if !defined(LOCORE) && !defined(__ASSEMBLY__)
129
130#ifndef __NLM_NLMIO_H__
131#error iomap.h needs mmio.h to be included
132#endif
133
134static __inline__ uint32_t
135nlm_read_reg_kseg(uint64_t base, uint32_t reg)
136{
137	volatile uint32_t *addr = (volatile uint32_t *)(intptr_t)base + reg;
138
139	return (*addr);
140}
141
142static __inline__ void
143nlm_write_reg_kseg(uint64_t base, uint32_t reg, uint32_t val)
144{
145	volatile uint32_t *addr = (volatile uint32_t *)(intptr_t)base + reg;
146
147	*addr = val;
148}
149
150static __inline__ uint64_t
151nlm_read_reg64_kseg(uint64_t base, uint32_t reg)
152{
153	volatile uint64_t *addr = (volatile uint64_t *)(intptr_t)base + (reg >> 1);
154
155	return (nlm_load_dword(addr));
156}
157
158static __inline__ void
159nlm_write_reg64_kseg(uint64_t base, uint32_t reg, uint64_t val)
160{
161	volatile uint64_t *addr = (volatile uint64_t *)(intptr_t)base + (reg >> 1);
162
163	return (nlm_store_dword(addr, val));
164}
165
166/*
167 * Routines to store 32/64 bit values to 64 bit addresses,
168 * used when going thru XKPHYS to access registers
169 */
170static __inline__ uint32_t
171nlm_read_reg_xkseg(uint64_t base, uint32_t reg)
172{
173	uint64_t addr = base + reg * sizeof(uint32_t);
174
175	return (nlm_load_word_daddr(addr));
176}
177
178static __inline__ void
179nlm_write_reg_xkseg(uint64_t base, uint32_t reg, uint32_t val)
180{
181	uint64_t addr = base + reg * sizeof(uint32_t);
182
183	return (nlm_store_word_daddr(addr, val));
184}
185
186static __inline__ uint64_t
187nlm_read_reg64_xkseg(uint64_t base, uint32_t reg)
188{
189	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
190
191	return (nlm_load_dword_daddr(addr));
192}
193
194static __inline__ void
195nlm_write_reg64_xkseg(uint64_t base, uint32_t reg, uint64_t val)
196{
197	uint64_t addr = base + (reg >> 1) * sizeof(uint64_t);
198
199	return (nlm_store_dword_daddr(addr, val));
200}
201
202/* Location where IO base is mapped */
203extern uint64_t nlm_pcicfg_baseaddr;
204
205static __inline__ uint64_t
206nlm_pcicfg_base(uint32_t devoffset)
207{
208	return (nlm_pcicfg_baseaddr + devoffset);
209}
210
211static __inline__ uint64_t
212nlm_pcibar0_base_xkphys(uint64_t pcibase)
213{
214	uint64_t paddr;
215
216	paddr = nlm_read_reg_kseg(pcibase, XLP_PCI_CFGREG4) & ~0xfu;
217	return (0x9000000000000000 | paddr);
218}
219#define	nlm_pci_rdreg(b, r)	nlm_read_reg_kseg(b, r)
220#define	nlm_pci_wreg(b, r, v)	nlm_write_reg_kseg(b, r, v)
221
222#endif /* !LOCORE && !__ASSEMBLY__*/
223
224
225/* COMPAT stuff - TODO remove */
226#define bit_set(p, m) ((p) |= (m))
227#define bit_clear(p, m) ((p) &= ~(m))
228#define bit_get(p,m) ((p) & (m))
229#define BIT(x) (0x01 << (x))
230
231#define XLP_MAX_NODES		4
232#define	XLP_MAX_CORES		8
233#define	XLP_MAX_THREADS		4
234#define	XLP_CACHELINE_SIZE	64
235#define XLP_NUM_NODES		1   /* we support only one now */
236
237#endif
238