mtk_soc.h revision 297666 
1/*-
2 * Copyright (c) 2016 Stanislav Galabov.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: head/sys/mips/mediatek/mtk_soc.h 297666 2016-04-07 11:02:49Z sgalabov $
28 */
29
30#ifndef _MTK_SOC_H_
31#define _MTK_SOC_H_
32
33enum mtk_soc_id {
34	MTK_SOC_UNKNOWN,
35	MTK_SOC_RT3050,
36	MTK_SOC_RT3052,
37	MTK_SOC_RT3350,
38	MTK_SOC_RT3352,
39	MTK_SOC_RT3662,
40	MTK_SOC_RT3883,
41	MTK_SOC_RT5350,
42	MTK_SOC_MT7620A,
43	MTK_SOC_MT7620N,
44	MTK_SOC_MT7621,
45	MTK_SOC_MT7628,
46	MTK_SOC_MT7688,
47	MTK_SOC_MAX
48};
49
50#define RT305X_CPU_CLKSEL_OFF	18
51#define RT305X_CPU_CLKSEL_MSK	0x1
52#define RT3352_CPU_CLKSEL_OFF	8
53#define RT3352_CPU_CLKSEL_MSK	0x1
54#define RT3883_CPU_CLKSEL_OFF	8
55#define RT3883_CPU_CLKSEL_MSK	0x3
56#define RT5350_CPU_CLKSEL_OFF1	8
57#define RT5350_CPU_CLKSEL_OFF2	10
58#define RT5350_CPU_CLKSEL_MSK	0x1
59#define MT7628_CPU_CLKSEL_OFF	6
60#define MT7628_CPU_CLKSEL_MSK	0x1
61
62#define MT7620_CPU_CLK_AUX0	(1u<<24)
63#define MT7620_CPLL_SW_CFG	(1u<<31)
64#define MT7620_PLL_MULT_RATIO_OFF	16
65#define MT7620_PLL_MULT_RATIO_MSK	0x7
66#define MT7620_PLL_MULT_RATIO_BASE	24
67#define MT7620_PLL_DIV_RATIO_OFF	10
68#define MT7620_PLL_DIV_RATIO_MSK	0x3
69#define MT7620_PLL_DIV_RATIO_BASE	2
70#define MT7620_PLL_DIV_RATIO_MAX	8
71#define MT7620_XTAL_40			40
72
73#define MT7621_USES_MEMDIV	(1u<<30)
74#define MT7621_MEMDIV_OFF	4
75#define MT7621_MEMDIV_MSK	0x7f
76#define MT7621_MEMDIV_BASE	1
77#define MT7621_CLKSEL_OFF	6
78#define MT7621_CLKSEL_MSK	0x7
79#define MT7621_CLKSEL_25MHZ_VAL	6
80#define MT7621_CLKSEL_20MHZ_VAL	3
81#define MT7621_CLKSEL_20MHZ	20
82#define MT7621_CLKSEL_25MHZ	25
83#define MT7621_CLK_STS_DIV_OFF	8
84#define MT7621_CLK_STS_MSK	0x1f
85#define MT7621_CLK_STS_BASE	500
86
87#define MTK_MT7621_CLKDIV_REG	0x5648
88#define MTK_MT7621_CLKDIV_OFF	4
89#define MTK_MT7621_CLKDIV_MSK	0x7f
90
91#define MTK_MHZ(x)		((x) * 1000 * 1000)
92
93#define MTK_CPU_CLK_UNKNOWN	0
94#define MTK_CPU_CLK_250MHZ	250000000
95#define MTK_CPU_CLK_300MHZ	300000000
96#define MTK_CPU_CLK_320MHZ	320000000
97#define MTK_CPU_CLK_360MHZ	360000000
98#define MTK_CPU_CLK_384MHZ	384000000
99#define MTK_CPU_CLK_400MHZ	400000000
100#define MTK_CPU_CLK_480MHZ	480000000
101#define MTK_CPU_CLK_500MHZ	500000000
102#define MTK_CPU_CLK_575MHZ	575000000
103#define MTK_CPU_CLK_580MHZ	580000000
104#define MTK_CPU_CLK_600MHZ	600000000
105#define MTK_CPU_CLK_880MHZ	880000000
106
107#define MTK_UART_CLK_40MHZ	40000000
108#define MTK_UART_CLK_50MHZ	50000000
109
110#define MTK_UARTDIV_2		2
111#define MTK_UARTDIV_3		3
112
113#define MTK_DEFAULT_BASE	0x10000000
114#define MTK_MT7621_BASE		0x1e000000
115#define MTK_DEFAULT_SIZE	0x6000
116
117extern void     mtk_soc_try_early_detect(void);
118extern uint32_t mtk_soc_get_uartclk(void);
119extern uint32_t mtk_soc_get_cpuclk(void);
120extern uint32_t mtk_soc_get_timerclk(void);
121extern uint32_t mtk_soc_get_socid(void);
122
123extern int	mtk_soc_reset_device(device_t);
124extern int	mtk_soc_stop_clock(device_t);
125extern int	mtk_soc_start_clock(device_t);
126extern int	mtk_soc_assert_reset(device_t);
127extern int	mtk_soc_deassert_reset(device_t);
128extern void     mtk_soc_reset(void);
129
130#endif /* _MTK_SOC_H_ */
131