cache_mipsNN.h revision 178172 
1/*	$NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $	*/
2
3/*
4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed for the NetBSD Project by
20 *	Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 * $FreeBSD: head/sys/mips/include/cache_mipsNN.h 178172 2008-04-13 07:27:37Z imp $
38 */
39
40void	mipsNN_cache_init(struct mips_cpuinfo *);
41
42void	mipsNN_icache_sync_all_16(void);
43void	mipsNN_icache_sync_all_32(void);
44void	mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t);
45void	mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t);
46void	mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t);
47void	mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t);
48void	mipsNN_pdcache_wbinv_all_16(void);
49void	mipsNN_pdcache_wbinv_all_32(void);
50void	mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t);
51void	mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t);
52void	mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t);
53void	mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
54void	mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t);
55void	mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t);
56void	mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t);
57void	mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t);
58#ifdef TARGET_OCTEON
59void	mipsNN_icache_sync_all_128(void);
60void	mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t);
61void	mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t);
62void	mipsNN_pdcache_wbinv_all_128(void);
63void	mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t);
64void	mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
65void	mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t);
66void	mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t);
67#endif
68