ar71xx_ehci.c revision 195985 
1/*-
2 * Copyright (c) 2008 Sam Leffler.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD$");
31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/condvar.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41
42#include <machine/bus.h>
43
44#include <dev/usb/usb.h>
45#include <dev/usb/usbdi.h>
46
47#include <dev/usb/usb_core.h>
48#include <dev/usb/usb_busdma.h>
49#include <dev/usb/usb_process.h>
50#include <dev/usb/usb_util.h>
51
52#include <dev/usb/usb_controller.h>
53#include <dev/usb/usb_bus.h>
54#include <dev/usb/controller/ehci.h>
55
56#include <mips/atheros/ar71xx_bus_space_reversed.h>
57
58#define EHCI_HC_DEVSTR		"AR71XX Integrated USB 2.0 controller"
59
60struct ar71xx_ehci_softc {
61	ehci_softc_t		base;	/* storage for EHCI code */
62};
63
64static device_attach_t ar71xx_ehci_attach;
65static device_detach_t ar71xx_ehci_detach;
66static device_shutdown_t ar71xx_ehci_shutdown;
67static device_suspend_t ar71xx_ehci_suspend;
68static device_resume_t ar71xx_ehci_resume;
69
70bs_r_1_proto(reversed);
71bs_w_1_proto(reversed);
72
73static int
74ar71xx_ehci_suspend(device_t self)
75{
76	ehci_softc_t *sc = device_get_softc(self);
77	int err;
78
79	err = bus_generic_suspend(self);
80	if (err)
81		return (err);
82	ehci_suspend(sc);
83	return (0);
84}
85
86static int
87ar71xx_ehci_resume(device_t self)
88{
89	ehci_softc_t *sc = device_get_softc(self);
90
91	ehci_resume(sc);
92
93	bus_generic_resume(self);
94
95	return (0);
96}
97
98static int
99ar71xx_ehci_shutdown(device_t self)
100{
101	ehci_softc_t *sc = device_get_softc(self);
102	int err;
103
104	err = bus_generic_shutdown(self);
105	if (err)
106		return (err);
107	ehci_shutdown(sc);
108
109	return (0);
110}
111
112static int
113ar71xx_ehci_probe(device_t self)
114{
115
116	device_set_desc(self, EHCI_HC_DEVSTR);
117
118	return (BUS_PROBE_DEFAULT);
119}
120
121static int
122ar71xx_ehci_attach(device_t self)
123{
124	struct ar71xx_ehci_softc *isc = device_get_softc(self);
125	ehci_softc_t *sc = &isc->base;
126	int err;
127	int rid;
128
129	/* initialise some bus fields */
130	sc->sc_bus.parent = self;
131	sc->sc_bus.devices = sc->sc_devices;
132	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
133
134	/* get all DMA memory */
135	if (usb_bus_mem_alloc_all(&sc->sc_bus,
136	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
137		return (ENOMEM);
138	}
139
140	sc->sc_bus.usbrev = USB_REV_2_0;
141
142	/* NB: hints fix the memory location and irq */
143
144	rid = 0;
145	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
146	if (!sc->sc_io_res) {
147		device_printf(self, "Could not map memory\n");
148		goto error;
149	}
150
151	/*
152	 * Craft special resource for bus space ops that handle
153	 * byte-alignment of non-word addresses.
154	 */
155	sc->sc_io_tag = ar71xx_bus_space_reversed;
156	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
157	sc->sc_io_size = rman_get_size(sc->sc_io_res);
158
159	rid = 0;
160	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
161	    RF_ACTIVE);
162	if (sc->sc_irq_res == NULL) {
163		device_printf(self, "Could not allocate irq\n");
164		goto error;
165	}
166	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
167	if (!sc->sc_bus.bdev) {
168		device_printf(self, "Could not add USB device\n");
169		goto error;
170	}
171	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
172	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
173
174	sprintf(sc->sc_vendor, "Atheros");
175
176
177	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
178	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
179	if (err) {
180		device_printf(self, "Could not setup irq, %d\n", err);
181		sc->sc_intr_hdl = NULL;
182		goto error;
183	}
184
185	/*
186	 * Arrange to force Host mode, select big-endian byte alignment,
187	 * and arrange to not terminate reset operations (the adapter
188	 * will ignore it if we do but might as well save a reg write).
189	 * Also, the controller has an embedded Transaction Translator
190	 * which means port speed must be read from the Port Status
191	 * register following a port enable.
192	 */
193	sc->sc_flags |= EHCI_SCFLG_TT
194		     | EHCI_SCFLG_SETMODE
195		     | EHCI_SCFLG_BIGEDESC
196		     | EHCI_SCFLG_BIGEMMIO
197		     | EHCI_SCFLG_NORESTERM
198		     ;
199	(void) ehci_reset(sc);
200
201	err = ehci_init(sc);
202	if (!err) {
203		err = device_probe_and_attach(sc->sc_bus.bdev);
204	}
205	if (err) {
206		device_printf(self, "USB init failed err=%d\n", err);
207		goto error;
208	}
209	return (0);
210
211error:
212	ar71xx_ehci_detach(self);
213	return (ENXIO);
214}
215
216static int
217ar71xx_ehci_detach(device_t self)
218{
219	struct ar71xx_ehci_softc *isc = device_get_softc(self);
220	ehci_softc_t *sc = &isc->base;
221	device_t bdev;
222	int err;
223
224 	if (sc->sc_bus.bdev) {
225		bdev = sc->sc_bus.bdev;
226		device_detach(bdev);
227		device_delete_child(self, bdev);
228	}
229	/* during module unload there are lots of children leftover */
230	device_delete_all_children(self);
231
232	/*
233	 * disable interrupts that might have been switched on in ehci_init
234	 */
235	if (sc->sc_io_res) {
236		EWRITE4(sc, EHCI_USBINTR, 0);
237	}
238
239 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
240		/*
241		 * only call ehci_detach() after ehci_init()
242		 */
243		ehci_detach(sc);
244
245		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
246
247		if (err)
248			/* XXX or should we panic? */
249			device_printf(self, "Could not tear down irq, %d\n",
250			    err);
251		sc->sc_intr_hdl = NULL;
252	}
253
254 	if (sc->sc_irq_res) {
255		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
256		sc->sc_irq_res = NULL;
257	}
258	if (sc->sc_io_res) {
259		bus_release_resource(self, SYS_RES_MEMORY, 0,
260		    sc->sc_io_res);
261		sc->sc_io_res = NULL;
262	}
263	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
264
265	return (0);
266}
267
268static device_method_t ehci_methods[] = {
269	/* Device interface */
270	DEVMETHOD(device_probe, ar71xx_ehci_probe),
271	DEVMETHOD(device_attach, ar71xx_ehci_attach),
272	DEVMETHOD(device_detach, ar71xx_ehci_detach),
273	DEVMETHOD(device_suspend, ar71xx_ehci_suspend),
274	DEVMETHOD(device_resume, ar71xx_ehci_resume),
275	DEVMETHOD(device_shutdown, ar71xx_ehci_shutdown),
276
277	/* Bus interface */
278	DEVMETHOD(bus_print_child, bus_generic_print_child),
279
280	{0, 0}
281};
282
283static driver_t ehci_driver = {
284	"ehci",
285	ehci_methods,
286	sizeof(struct ar71xx_ehci_softc),
287};
288
289static devclass_t ehci_devclass;
290
291DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
292MODULE_DEPEND(ehci, usb, 1, 1, 1);
293