kern_clocksource.c revision 239034
1/*- 2 * Copyright (c) 2010-2012 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/kern/kern_clocksource.c 239034 2012-08-04 07:46:58Z mav $"); 29 30/* 31 * Common routines to manage event timers hardware. 32 */ 33 34#include "opt_device_polling.h" 35#include "opt_kdtrace.h" 36 37#include <sys/param.h> 38#include <sys/systm.h> 39#include <sys/bus.h> 40#include <sys/lock.h> 41#include <sys/kdb.h> 42#include <sys/ktr.h> 43#include <sys/mutex.h> 44#include <sys/proc.h> 45#include <sys/kernel.h> 46#include <sys/sched.h> 47#include <sys/smp.h> 48#include <sys/sysctl.h> 49#include <sys/timeet.h> 50#include <sys/timetc.h> 51 52#include <machine/atomic.h> 53#include <machine/clock.h> 54#include <machine/cpu.h> 55#include <machine/smp.h> 56 57#ifdef KDTRACE_HOOKS 58#include <sys/dtrace_bsd.h> 59cyclic_clock_func_t cyclic_clock_func = NULL; 60#endif 61 62int cpu_can_deep_sleep = 0; /* C3 state is available. */ 63int cpu_disable_deep_sleep = 0; /* Timer dies in C3. */ 64 65static void setuptimer(void); 66static void loadtimer(struct bintime *now, int first); 67static int doconfigtimer(void); 68static void configtimer(int start); 69static int round_freq(struct eventtimer *et, int freq); 70 71static void getnextcpuevent(struct bintime *event, int idle); 72static void getnextevent(struct bintime *event); 73static int handleevents(struct bintime *now, int fake); 74#ifdef SMP 75static void cpu_new_callout(int cpu, int ticks); 76#endif 77 78static struct mtx et_hw_mtx; 79 80#define ET_HW_LOCK(state) \ 81 { \ 82 if (timer->et_flags & ET_FLAGS_PERCPU) \ 83 mtx_lock_spin(&(state)->et_hw_mtx); \ 84 else \ 85 mtx_lock_spin(&et_hw_mtx); \ 86 } 87 88#define ET_HW_UNLOCK(state) \ 89 { \ 90 if (timer->et_flags & ET_FLAGS_PERCPU) \ 91 mtx_unlock_spin(&(state)->et_hw_mtx); \ 92 else \ 93 mtx_unlock_spin(&et_hw_mtx); \ 94 } 95 96static struct eventtimer *timer = NULL; 97static struct bintime timerperiod; /* Timer period for periodic mode. */ 98static struct bintime hardperiod; /* hardclock() events period. */ 99static struct bintime statperiod; /* statclock() events period. */ 100static struct bintime profperiod; /* profclock() events period. */ 101static struct bintime nexttick; /* Next global timer tick time. */ 102static struct bintime nexthard; /* Next global hardlock() event. */ 103static u_int busy = 0; /* Reconfiguration is in progress. */ 104static int profiling = 0; /* Profiling events enabled. */ 105 106static char timername[32]; /* Wanted timer. */ 107TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername)); 108 109static int singlemul = 0; /* Multiplier for periodic mode. */ 110TUNABLE_INT("kern.eventtimer.singlemul", &singlemul); 111SYSCTL_INT(_kern_eventtimer, OID_AUTO, singlemul, CTLFLAG_RW, &singlemul, 112 0, "Multiplier for periodic mode"); 113 114static u_int idletick = 0; /* Run periodic events when idle. */ 115TUNABLE_INT("kern.eventtimer.idletick", &idletick); 116SYSCTL_UINT(_kern_eventtimer, OID_AUTO, idletick, CTLFLAG_RW, &idletick, 117 0, "Run periodic events when idle"); 118 119static u_int activetick = 1; /* Run all periodic events when active. */ 120TUNABLE_INT("kern.eventtimer.activetick", &activetick); 121SYSCTL_UINT(_kern_eventtimer, OID_AUTO, activetick, CTLFLAG_RW, &activetick, 122 0, "Run all periodic events when active"); 123 124static int periodic = 0; /* Periodic or one-shot mode. */ 125static int want_periodic = 0; /* What mode to prefer. */ 126TUNABLE_INT("kern.eventtimer.periodic", &want_periodic); 127 128struct pcpu_state { 129 struct mtx et_hw_mtx; /* Per-CPU timer mutex. */ 130 u_int action; /* Reconfiguration requests. */ 131 u_int handle; /* Immediate handle resuests. */ 132 struct bintime now; /* Last tick time. */ 133 struct bintime nextevent; /* Next scheduled event on this CPU. */ 134 struct bintime nexttick; /* Next timer tick time. */ 135 struct bintime nexthard; /* Next hardlock() event. */ 136 struct bintime nextstat; /* Next statclock() event. */ 137 struct bintime nextprof; /* Next profclock() event. */ 138#ifdef KDTRACE_HOOKS 139 struct bintime nextcyc; /* Next OpenSolaris cyclics event. */ 140#endif 141 int ipi; /* This CPU needs IPI. */ 142 int idle; /* This CPU is in idle mode. */ 143}; 144 145static DPCPU_DEFINE(struct pcpu_state, timerstate); 146 147#define FREQ2BT(freq, bt) \ 148{ \ 149 (bt)->sec = 0; \ 150 (bt)->frac = ((uint64_t)0x8000000000000000 / (freq)) << 1; \ 151} 152#define BT2FREQ(bt) \ 153 (((uint64_t)0x8000000000000000 + ((bt)->frac >> 2)) / \ 154 ((bt)->frac >> 1)) 155 156/* 157 * Timer broadcast IPI handler. 158 */ 159int 160hardclockintr(void) 161{ 162 struct bintime now; 163 struct pcpu_state *state; 164 int done; 165 166 if (doconfigtimer() || busy) 167 return (FILTER_HANDLED); 168 state = DPCPU_PTR(timerstate); 169 now = state->now; 170 CTR4(KTR_SPARE2, "ipi at %d: now %d.%08x%08x", 171 curcpu, now.sec, (u_int)(now.frac >> 32), 172 (u_int)(now.frac & 0xffffffff)); 173 done = handleevents(&now, 0); 174 return (done ? FILTER_HANDLED : FILTER_STRAY); 175} 176 177/* 178 * Handle all events for specified time on this CPU 179 */ 180static int 181handleevents(struct bintime *now, int fake) 182{ 183 struct bintime t; 184 struct trapframe *frame; 185 struct pcpu_state *state; 186 uintfptr_t pc; 187 int usermode; 188 int done, runs; 189 190 CTR4(KTR_SPARE2, "handle at %d: now %d.%08x%08x", 191 curcpu, now->sec, (u_int)(now->frac >> 32), 192 (u_int)(now->frac & 0xffffffff)); 193 done = 0; 194 if (fake) { 195 frame = NULL; 196 usermode = 0; 197 pc = 0; 198 } else { 199 frame = curthread->td_intr_frame; 200 usermode = TRAPF_USERMODE(frame); 201 pc = TRAPF_PC(frame); 202 } 203 204 state = DPCPU_PTR(timerstate); 205 206 runs = 0; 207 while (bintime_cmp(now, &state->nexthard, >=)) { 208 bintime_addx(&state->nexthard, hardperiod.frac); 209 runs++; 210 } 211 if (runs) { 212 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 && 213 bintime_cmp(&state->nexthard, &nexthard, >)) 214 nexthard = state->nexthard; 215 if (fake < 2) { 216 hardclock_cnt(runs, usermode); 217 done = 1; 218 } 219 } 220 runs = 0; 221 while (bintime_cmp(now, &state->nextstat, >=)) { 222 bintime_addx(&state->nextstat, statperiod.frac); 223 runs++; 224 } 225 if (runs && fake < 2) { 226 statclock_cnt(runs, usermode); 227 done = 1; 228 } 229 if (profiling) { 230 runs = 0; 231 while (bintime_cmp(now, &state->nextprof, >=)) { 232 bintime_addx(&state->nextprof, profperiod.frac); 233 runs++; 234 } 235 if (runs && !fake) { 236 profclock_cnt(runs, usermode, pc); 237 done = 1; 238 } 239 } else 240 state->nextprof = state->nextstat; 241 242#ifdef KDTRACE_HOOKS 243 if (fake == 0 && cyclic_clock_func != NULL && 244 state->nextcyc.sec != -1 && 245 bintime_cmp(now, &state->nextcyc, >=)) { 246 state->nextcyc.sec = -1; 247 (*cyclic_clock_func)(frame); 248 } 249#endif 250 251 getnextcpuevent(&t, 0); 252 if (fake == 2) { 253 state->nextevent = t; 254 return (done); 255 } 256 ET_HW_LOCK(state); 257 if (!busy) { 258 state->idle = 0; 259 state->nextevent = t; 260 loadtimer(now, 0); 261 } 262 ET_HW_UNLOCK(state); 263 return (done); 264} 265 266/* 267 * Schedule binuptime of the next event on current CPU. 268 */ 269static void 270getnextcpuevent(struct bintime *event, int idle) 271{ 272 struct bintime tmp; 273 struct pcpu_state *state; 274 int skip; 275 276 state = DPCPU_PTR(timerstate); 277 /* Handle hardclock() events. */ 278 *event = state->nexthard; 279 if (idle || (!activetick && !profiling && 280 (timer->et_flags & ET_FLAGS_PERCPU) == 0)) { 281 skip = idle ? 4 : (stathz / 2); 282 if (curcpu == CPU_FIRST() && tc_min_ticktock_freq > skip) 283 skip = tc_min_ticktock_freq; 284 skip = callout_tickstofirst(hz / skip) - 1; 285 CTR2(KTR_SPARE2, "skip at %d: %d", curcpu, skip); 286 tmp = hardperiod; 287 bintime_mul(&tmp, skip); 288 bintime_add(event, &tmp); 289 } 290 if (!idle) { /* If CPU is active - handle other types of events. */ 291 if (bintime_cmp(event, &state->nextstat, >)) 292 *event = state->nextstat; 293 if (profiling && bintime_cmp(event, &state->nextprof, >)) 294 *event = state->nextprof; 295 } 296#ifdef KDTRACE_HOOKS 297 if (state->nextcyc.sec != -1 && bintime_cmp(event, &state->nextcyc, >)) 298 *event = state->nextcyc; 299#endif 300} 301 302/* 303 * Schedule binuptime of the next event on all CPUs. 304 */ 305static void 306getnextevent(struct bintime *event) 307{ 308 struct pcpu_state *state; 309#ifdef SMP 310 int cpu; 311#endif 312 int c, nonidle; 313 314 state = DPCPU_PTR(timerstate); 315 *event = state->nextevent; 316 c = curcpu; 317 nonidle = !state->idle; 318 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) { 319#ifdef SMP 320 CPU_FOREACH(cpu) { 321 if (curcpu == cpu) 322 continue; 323 state = DPCPU_ID_PTR(cpu, timerstate); 324 nonidle += !state->idle; 325 if (bintime_cmp(event, &state->nextevent, >)) { 326 *event = state->nextevent; 327 c = cpu; 328 } 329 } 330#endif 331 if (nonidle != 0 && bintime_cmp(event, &nexthard, >)) 332 *event = nexthard; 333 } 334 CTR5(KTR_SPARE2, "next at %d: next %d.%08x%08x by %d", 335 curcpu, event->sec, (u_int)(event->frac >> 32), 336 (u_int)(event->frac & 0xffffffff), c); 337} 338 339/* Hardware timer callback function. */ 340static void 341timercb(struct eventtimer *et, void *arg) 342{ 343 struct bintime now; 344 struct bintime *next; 345 struct pcpu_state *state; 346#ifdef SMP 347 int cpu, bcast; 348#endif 349 350 /* Do not touch anything if somebody reconfiguring timers. */ 351 if (busy) 352 return; 353 /* Update present and next tick times. */ 354 state = DPCPU_PTR(timerstate); 355 if (et->et_flags & ET_FLAGS_PERCPU) { 356 next = &state->nexttick; 357 } else 358 next = &nexttick; 359 if (periodic) { 360 now = *next; /* Ex-next tick time becomes present time. */ 361 bintime_addx(next, timerperiod.frac); /* Next tick in 1 period. */ 362 } else { 363 binuptime(&now); /* Get present time from hardware. */ 364 next->sec = -1; /* Next tick is not scheduled yet. */ 365 } 366 state->now = now; 367 CTR4(KTR_SPARE2, "intr at %d: now %d.%08x%08x", 368 curcpu, (int)(now.sec), (u_int)(now.frac >> 32), 369 (u_int)(now.frac & 0xffffffff)); 370 371#ifdef SMP 372 /* Prepare broadcasting to other CPUs for non-per-CPU timers. */ 373 bcast = 0; 374 if ((et->et_flags & ET_FLAGS_PERCPU) == 0 && smp_started) { 375 CPU_FOREACH(cpu) { 376 state = DPCPU_ID_PTR(cpu, timerstate); 377 ET_HW_LOCK(state); 378 state->now = now; 379 if (bintime_cmp(&now, &state->nextevent, >=)) { 380 state->nextevent.sec++; 381 if (curcpu != cpu) { 382 state->ipi = 1; 383 bcast = 1; 384 } 385 } 386 ET_HW_UNLOCK(state); 387 } 388 } 389#endif 390 391 /* Handle events for this time on this CPU. */ 392 handleevents(&now, 0); 393 394#ifdef SMP 395 /* Broadcast interrupt to other CPUs for non-per-CPU timers. */ 396 if (bcast) { 397 CPU_FOREACH(cpu) { 398 if (curcpu == cpu) 399 continue; 400 state = DPCPU_ID_PTR(cpu, timerstate); 401 if (state->ipi) { 402 state->ipi = 0; 403 ipi_cpu(cpu, IPI_HARDCLOCK); 404 } 405 } 406 } 407#endif 408} 409 410/* 411 * Load new value into hardware timer. 412 */ 413static void 414loadtimer(struct bintime *now, int start) 415{ 416 struct pcpu_state *state; 417 struct bintime new; 418 struct bintime *next; 419 uint64_t tmp; 420 int eq; 421 422 if (timer->et_flags & ET_FLAGS_PERCPU) { 423 state = DPCPU_PTR(timerstate); 424 next = &state->nexttick; 425 } else 426 next = &nexttick; 427 if (periodic) { 428 if (start) { 429 /* 430 * Try to start all periodic timers aligned 431 * to period to make events synchronous. 432 */ 433 tmp = ((uint64_t)now->sec << 36) + (now->frac >> 28); 434 tmp = (tmp % (timerperiod.frac >> 28)) << 28; 435 new.sec = 0; 436 new.frac = timerperiod.frac - tmp; 437 if (new.frac < tmp) /* Left less then passed. */ 438 bintime_addx(&new, timerperiod.frac); 439 CTR5(KTR_SPARE2, "load p at %d: now %d.%08x first in %d.%08x", 440 curcpu, now->sec, (u_int)(now->frac >> 32), 441 new.sec, (u_int)(new.frac >> 32)); 442 *next = new; 443 bintime_add(next, now); 444 et_start(timer, &new, &timerperiod); 445 } 446 } else { 447 getnextevent(&new); 448 eq = bintime_cmp(&new, next, ==); 449 CTR5(KTR_SPARE2, "load at %d: next %d.%08x%08x eq %d", 450 curcpu, new.sec, (u_int)(new.frac >> 32), 451 (u_int)(new.frac & 0xffffffff), 452 eq); 453 if (!eq) { 454 *next = new; 455 bintime_sub(&new, now); 456 et_start(timer, &new, NULL); 457 } 458 } 459} 460 461/* 462 * Prepare event timer parameters after configuration changes. 463 */ 464static void 465setuptimer(void) 466{ 467 int freq; 468 469 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0) 470 periodic = 0; 471 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0) 472 periodic = 1; 473 singlemul = MIN(MAX(singlemul, 1), 20); 474 freq = hz * singlemul; 475 while (freq < (profiling ? profhz : stathz)) 476 freq += hz; 477 freq = round_freq(timer, freq); 478 FREQ2BT(freq, &timerperiod); 479} 480 481/* 482 * Reconfigure specified per-CPU timer on other CPU. Called from IPI handler. 483 */ 484static int 485doconfigtimer(void) 486{ 487 struct bintime now; 488 struct pcpu_state *state; 489 490 state = DPCPU_PTR(timerstate); 491 switch (atomic_load_acq_int(&state->action)) { 492 case 1: 493 binuptime(&now); 494 ET_HW_LOCK(state); 495 loadtimer(&now, 1); 496 ET_HW_UNLOCK(state); 497 state->handle = 0; 498 atomic_store_rel_int(&state->action, 0); 499 return (1); 500 case 2: 501 ET_HW_LOCK(state); 502 et_stop(timer); 503 ET_HW_UNLOCK(state); 504 state->handle = 0; 505 atomic_store_rel_int(&state->action, 0); 506 return (1); 507 } 508 if (atomic_readandclear_int(&state->handle) && !busy) { 509 binuptime(&now); 510 handleevents(&now, 0); 511 return (1); 512 } 513 return (0); 514} 515 516/* 517 * Reconfigure specified timer. 518 * For per-CPU timers use IPI to make other CPUs to reconfigure. 519 */ 520static void 521configtimer(int start) 522{ 523 struct bintime now, next; 524 struct pcpu_state *state; 525 int cpu; 526 527 if (start) { 528 setuptimer(); 529 binuptime(&now); 530 } 531 critical_enter(); 532 ET_HW_LOCK(DPCPU_PTR(timerstate)); 533 if (start) { 534 /* Initialize time machine parameters. */ 535 next = now; 536 bintime_addx(&next, timerperiod.frac); 537 if (periodic) 538 nexttick = next; 539 else 540 nexttick.sec = -1; 541 CPU_FOREACH(cpu) { 542 state = DPCPU_ID_PTR(cpu, timerstate); 543 state->now = now; 544 state->nextevent = next; 545 if (periodic) 546 state->nexttick = next; 547 else 548 state->nexttick.sec = -1; 549 state->nexthard = next; 550 state->nextstat = next; 551 state->nextprof = next; 552 hardclock_sync(cpu); 553 } 554 busy = 0; 555 /* Start global timer or per-CPU timer of this CPU. */ 556 loadtimer(&now, 1); 557 } else { 558 busy = 1; 559 /* Stop global timer or per-CPU timer of this CPU. */ 560 et_stop(timer); 561 } 562 ET_HW_UNLOCK(DPCPU_PTR(timerstate)); 563#ifdef SMP 564 /* If timer is global or there is no other CPUs yet - we are done. */ 565 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || !smp_started) { 566 critical_exit(); 567 return; 568 } 569 /* Set reconfigure flags for other CPUs. */ 570 CPU_FOREACH(cpu) { 571 state = DPCPU_ID_PTR(cpu, timerstate); 572 atomic_store_rel_int(&state->action, 573 (cpu == curcpu) ? 0 : ( start ? 1 : 2)); 574 } 575 /* Broadcast reconfigure IPI. */ 576 ipi_all_but_self(IPI_HARDCLOCK); 577 /* Wait for reconfiguration completed. */ 578restart: 579 cpu_spinwait(); 580 CPU_FOREACH(cpu) { 581 if (cpu == curcpu) 582 continue; 583 state = DPCPU_ID_PTR(cpu, timerstate); 584 if (atomic_load_acq_int(&state->action)) 585 goto restart; 586 } 587#endif 588 critical_exit(); 589} 590 591/* 592 * Calculate nearest frequency supported by hardware timer. 593 */ 594static int 595round_freq(struct eventtimer *et, int freq) 596{ 597 uint64_t div; 598 599 if (et->et_frequency != 0) { 600 div = lmax((et->et_frequency + freq / 2) / freq, 1); 601 if (et->et_flags & ET_FLAGS_POW2DIV) 602 div = 1 << (flsl(div + div / 2) - 1); 603 freq = (et->et_frequency + div / 2) / div; 604 } 605 if (et->et_min_period.sec > 0) 606 freq = 0; 607 else if (et->et_min_period.frac != 0) 608 freq = min(freq, BT2FREQ(&et->et_min_period)); 609 if (et->et_max_period.sec == 0 && et->et_max_period.frac != 0) 610 freq = max(freq, BT2FREQ(&et->et_max_period)); 611 return (freq); 612} 613 614/* 615 * Configure and start event timers (BSP part). 616 */ 617void 618cpu_initclocks_bsp(void) 619{ 620 struct pcpu_state *state; 621 int base, div, cpu; 622 623 mtx_init(&et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN); 624 CPU_FOREACH(cpu) { 625 state = DPCPU_ID_PTR(cpu, timerstate); 626 mtx_init(&state->et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN); 627#ifdef KDTRACE_HOOKS 628 state->nextcyc.sec = -1; 629#endif 630 } 631#ifdef SMP 632 callout_new_inserted = cpu_new_callout; 633#endif 634 periodic = want_periodic; 635 /* Grab requested timer or the best of present. */ 636 if (timername[0]) 637 timer = et_find(timername, 0, 0); 638 if (timer == NULL && periodic) { 639 timer = et_find(NULL, 640 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC); 641 } 642 if (timer == NULL) { 643 timer = et_find(NULL, 644 ET_FLAGS_ONESHOT, ET_FLAGS_ONESHOT); 645 } 646 if (timer == NULL && !periodic) { 647 timer = et_find(NULL, 648 ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC); 649 } 650 if (timer == NULL) 651 panic("No usable event timer found!"); 652 et_init(timer, timercb, NULL, NULL); 653 654 /* Adapt to timer capabilities. */ 655 if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0) 656 periodic = 0; 657 else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0) 658 periodic = 1; 659 if (timer->et_flags & ET_FLAGS_C3STOP) 660 cpu_disable_deep_sleep++; 661 662 /* 663 * We honor the requested 'hz' value. 664 * We want to run stathz in the neighborhood of 128hz. 665 * We would like profhz to run as often as possible. 666 */ 667 if (singlemul <= 0 || singlemul > 20) { 668 if (hz >= 1500 || (hz % 128) == 0) 669 singlemul = 1; 670 else if (hz >= 750) 671 singlemul = 2; 672 else 673 singlemul = 4; 674 } 675 if (periodic) { 676 base = round_freq(timer, hz * singlemul); 677 singlemul = max((base + hz / 2) / hz, 1); 678 hz = (base + singlemul / 2) / singlemul; 679 if (base <= 128) 680 stathz = base; 681 else { 682 div = base / 128; 683 if (div >= singlemul && (div % singlemul) == 0) 684 div++; 685 stathz = base / div; 686 } 687 profhz = stathz; 688 while ((profhz + stathz) <= 128 * 64) 689 profhz += stathz; 690 profhz = round_freq(timer, profhz); 691 } else { 692 hz = round_freq(timer, hz); 693 stathz = round_freq(timer, 127); 694 profhz = round_freq(timer, stathz * 64); 695 } 696 tick = 1000000 / hz; 697 FREQ2BT(hz, &hardperiod); 698 FREQ2BT(stathz, &statperiod); 699 FREQ2BT(profhz, &profperiod); 700 ET_LOCK(); 701 configtimer(1); 702 ET_UNLOCK(); 703} 704 705/* 706 * Start per-CPU event timers on APs. 707 */ 708void 709cpu_initclocks_ap(void) 710{ 711 struct bintime now; 712 struct pcpu_state *state; 713 714 state = DPCPU_PTR(timerstate); 715 binuptime(&now); 716 ET_HW_LOCK(state); 717 if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 && periodic) { 718 state->now = nexttick; 719 bintime_sub(&state->now, &timerperiod); 720 } else 721 state->now = now; 722 hardclock_sync(curcpu); 723 handleevents(&state->now, 2); 724 if (timer->et_flags & ET_FLAGS_PERCPU) 725 loadtimer(&now, 1); 726 ET_HW_UNLOCK(state); 727} 728 729/* 730 * Switch to profiling clock rates. 731 */ 732void 733cpu_startprofclock(void) 734{ 735 736 ET_LOCK(); 737 if (periodic) { 738 configtimer(0); 739 profiling = 1; 740 configtimer(1); 741 } else 742 profiling = 1; 743 ET_UNLOCK(); 744} 745 746/* 747 * Switch to regular clock rates. 748 */ 749void 750cpu_stopprofclock(void) 751{ 752 753 ET_LOCK(); 754 if (periodic) { 755 configtimer(0); 756 profiling = 0; 757 configtimer(1); 758 } else 759 profiling = 0; 760 ET_UNLOCK(); 761} 762 763/* 764 * Switch to idle mode (all ticks handled). 765 */ 766void 767cpu_idleclock(void) 768{ 769 struct bintime now, t; 770 struct pcpu_state *state; 771 772 if (idletick || busy || 773 (periodic && (timer->et_flags & ET_FLAGS_PERCPU)) 774#ifdef DEVICE_POLLING 775 || curcpu == CPU_FIRST() 776#endif 777 ) 778 return; 779 state = DPCPU_PTR(timerstate); 780 if (periodic) 781 now = state->now; 782 else 783 binuptime(&now); 784 CTR4(KTR_SPARE2, "idle at %d: now %d.%08x%08x", 785 curcpu, now.sec, (u_int)(now.frac >> 32), 786 (u_int)(now.frac & 0xffffffff)); 787 getnextcpuevent(&t, 1); 788 ET_HW_LOCK(state); 789 state->idle = 1; 790 state->nextevent = t; 791 if (!periodic) 792 loadtimer(&now, 0); 793 ET_HW_UNLOCK(state); 794} 795 796/* 797 * Switch to active mode (skip empty ticks). 798 */ 799void 800cpu_activeclock(void) 801{ 802 struct bintime now; 803 struct pcpu_state *state; 804 struct thread *td; 805 806 state = DPCPU_PTR(timerstate); 807 if (state->idle == 0 || busy) 808 return; 809 if (periodic) 810 now = state->now; 811 else 812 binuptime(&now); 813 CTR4(KTR_SPARE2, "active at %d: now %d.%08x%08x", 814 curcpu, now.sec, (u_int)(now.frac >> 32), 815 (u_int)(now.frac & 0xffffffff)); 816 spinlock_enter(); 817 td = curthread; 818 td->td_intr_nesting_level++; 819 handleevents(&now, 1); 820 td->td_intr_nesting_level--; 821 spinlock_exit(); 822} 823 824#ifdef KDTRACE_HOOKS 825void 826clocksource_cyc_set(const struct bintime *t) 827{ 828 struct bintime now; 829 struct pcpu_state *state; 830 831 state = DPCPU_PTR(timerstate); 832 if (periodic) 833 now = state->now; 834 else 835 binuptime(&now); 836 837 CTR4(KTR_SPARE2, "set_cyc at %d: now %d.%08x%08x", 838 curcpu, now.sec, (u_int)(now.frac >> 32), 839 (u_int)(now.frac & 0xffffffff)); 840 CTR4(KTR_SPARE2, "set_cyc at %d: t %d.%08x%08x", 841 curcpu, t->sec, (u_int)(t->frac >> 32), 842 (u_int)(t->frac & 0xffffffff)); 843 844 ET_HW_LOCK(state); 845 if (bintime_cmp(t, &state->nextcyc, ==)) { 846 ET_HW_UNLOCK(state); 847 return; 848 } 849 state->nextcyc = *t; 850 if (bintime_cmp(&state->nextcyc, &state->nextevent, >=)) { 851 ET_HW_UNLOCK(state); 852 return; 853 } 854 state->nextevent = state->nextcyc; 855 if (!periodic) 856 loadtimer(&now, 0); 857 ET_HW_UNLOCK(state); 858} 859#endif 860 861#ifdef SMP 862static void 863cpu_new_callout(int cpu, int ticks) 864{ 865 struct bintime tmp; 866 struct pcpu_state *state; 867 868 CTR3(KTR_SPARE2, "new co at %d: on %d in %d", 869 curcpu, cpu, ticks); 870 state = DPCPU_ID_PTR(cpu, timerstate); 871 ET_HW_LOCK(state); 872 if (state->idle == 0 || busy) { 873 ET_HW_UNLOCK(state); 874 return; 875 } 876 /* 877 * If timer is periodic - just update next event time for target CPU. 878 * If timer is global - there is chance it is already programmed. 879 */ 880 if (periodic || (timer->et_flags & ET_FLAGS_PERCPU) == 0) { 881 tmp = hardperiod; 882 bintime_mul(&tmp, ticks - 1); 883 bintime_add(&tmp, &state->nexthard); 884 if (bintime_cmp(&tmp, &state->nextevent, <)) 885 state->nextevent = tmp; 886 if (periodic || 887 bintime_cmp(&state->nextevent, &nexttick, >=)) { 888 ET_HW_UNLOCK(state); 889 return; 890 } 891 } 892 /* 893 * Otherwise we have to wake that CPU up, as we can't get present 894 * bintime to reprogram global timer from here. If timer is per-CPU, 895 * we by definition can't do it from here. 896 */ 897 ET_HW_UNLOCK(state); 898 if (timer->et_flags & ET_FLAGS_PERCPU) { 899 state->handle = 1; 900 ipi_cpu(cpu, IPI_HARDCLOCK); 901 } else { 902 if (!cpu_idle_wakeup(cpu)) 903 ipi_cpu(cpu, IPI_AST); 904 } 905} 906#endif 907 908/* 909 * Report or change the active event timers hardware. 910 */ 911static int 912sysctl_kern_eventtimer_timer(SYSCTL_HANDLER_ARGS) 913{ 914 char buf[32]; 915 struct eventtimer *et; 916 int error; 917 918 ET_LOCK(); 919 et = timer; 920 snprintf(buf, sizeof(buf), "%s", et->et_name); 921 ET_UNLOCK(); 922 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 923 ET_LOCK(); 924 et = timer; 925 if (error != 0 || req->newptr == NULL || 926 strcasecmp(buf, et->et_name) == 0) { 927 ET_UNLOCK(); 928 return (error); 929 } 930 et = et_find(buf, 0, 0); 931 if (et == NULL) { 932 ET_UNLOCK(); 933 return (ENOENT); 934 } 935 configtimer(0); 936 et_free(timer); 937 if (et->et_flags & ET_FLAGS_C3STOP) 938 cpu_disable_deep_sleep++; 939 if (timer->et_flags & ET_FLAGS_C3STOP) 940 cpu_disable_deep_sleep--; 941 periodic = want_periodic; 942 timer = et; 943 et_init(timer, timercb, NULL, NULL); 944 configtimer(1); 945 ET_UNLOCK(); 946 return (error); 947} 948SYSCTL_PROC(_kern_eventtimer, OID_AUTO, timer, 949 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, 950 0, 0, sysctl_kern_eventtimer_timer, "A", "Chosen event timer"); 951 952/* 953 * Report or change the active event timer periodicity. 954 */ 955static int 956sysctl_kern_eventtimer_periodic(SYSCTL_HANDLER_ARGS) 957{ 958 int error, val; 959 960 val = periodic; 961 error = sysctl_handle_int(oidp, &val, 0, req); 962 if (error != 0 || req->newptr == NULL) 963 return (error); 964 ET_LOCK(); 965 configtimer(0); 966 periodic = want_periodic = val; 967 configtimer(1); 968 ET_UNLOCK(); 969 return (error); 970} 971SYSCTL_PROC(_kern_eventtimer, OID_AUTO, periodic, 972 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 973 0, 0, sysctl_kern_eventtimer_periodic, "I", "Enable event timer periodic mode"); 974