rtc.h revision 128019
110217Sphk/*- 215284Snate * Copyright (c) 1990 The Regents of the University of California. 315284Snate * All rights reserved. 415284Snate * 515284Snate * This code is derived from software contributed to Berkeley by 615284Snate * William Jolitz. 715284Snate * 815284Snate * Redistribution and use in source and binary forms, with or without 915284Snate * modification, are permitted provided that the following conditions 1015284Snate * are met: 1115284Snate * 1. Redistributions of source code must retain the above copyright 1215284Snate * notice, this list of conditions and the following disclaimer. 1315284Snate * 2. Redistributions in binary form must reproduce the above copyright 1415284Snate * notice, this list of conditions and the following disclaimer in the 1515284Snate * documentation and/or other materials provided with the distribution. 1615284Snate * 4. Neither the name of the University nor the names of its contributors 1715284Snate * may be used to endorse or promote products derived from this software 1815284Snate * without specific prior written permission. 1915284Snate * 2015284Snate * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2115284Snate * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2215284Snate * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2315284Snate * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2415284Snate * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2515284Snate * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2650479Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2710217Sphk * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2815284Snate * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2915177Snate * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3010217Sphk * SUCH DAMAGE. 3110217Sphk * 3215177Snate * from: @(#)rtc.h 7.1 (Berkeley) 5/12/91 3310217Sphk * $FreeBSD: head/sys/isa/rtc.h 128019 2004-04-07 20:46:16Z imp $ 3415177Snate */ 3510217Sphk 3615177Snate#ifndef _I386_ISA_RTC_H_ 3710217Sphk#define _I386_ISA_RTC_H_ 1 3810217Sphk 3915177Snate/* 4015177Snate * MC146818 RTC Register locations 4115177Snate */ 4210217Sphk 4315177Snate#define RTC_SEC 0x00 /* seconds */ 44185033Simp#define RTC_SECALRM 0x01 /* seconds alarm */ 4510217Sphk#define RTC_MIN 0x02 /* minutes */ 4615177Snate#define RTC_MINALRM 0x03 /* minutes alarm */ 4715177Snate#define RTC_HRS 0x04 /* hours */ 4815177Snate#define RTC_HRSALRM 0x05 /* hours alarm */ 4959656Siwasaki#define RTC_WDAY 0x06 /* week day */ 5059656Siwasaki#define RTC_DAY 0x07 /* day of month */ 5159656Siwasaki#define RTC_MONTH 0x08 /* month of year */ 5259656Siwasaki#define RTC_YEAR 0x09 /* month of year */ 5359656Siwasaki 5459656Siwasaki#define RTC_STATUSA 0x0a /* status register A */ 5559656Siwasaki#define RTCSA_TUP 0x80 /* time update, don't look now */ 56185121Simp#define RTCSA_RESET 0x70 /* reset divider */ 57185121Simp#define RTCSA_DIVIDER 0x20 /* divider correct for 32768 Hz */ 58185121Simp#define RTCSA_8192 0x03 /* 8192 Hz interrupt */ 5916484Snate#define RTCSA_4096 0x04 60185033Simp#define RTCSA_2048 0x05 6159656Siwasaki#define RTCSA_1024 0x06 /* default for profiling */ 62#define RTCSA_PROF RTCSA_1024 63#define RTC_PROFRATE 1024 64#define RTCSA_512 0x07 65#define RTCSA_256 0x08 66#define RTCSA_128 0x09 67#define RTCSA_NOPROF RTCSA_128 68#define RTC_NOPROFRATE 128 69#define RTCSA_64 0x0a 70#define RTCSA_32 0x0b /* 32 Hz interrupt */ 71 72#define RTC_STATUSB 0x0b /* status register B */ 73#define RTCSB_DST 0x01 /* USA Daylight Savings Time enable */ 74#define RTCSB_24HR 0x02 /* 0 = 12 hours, 1 = 24 hours */ 75#define RTCSB_BCD 0x04 /* 0 = BCD, 1 = Binary coded time */ 76#define RTCSB_SQWE 0x08 /* 1 = output sqare wave at SQW pin */ 77#define RTCSB_UINTR 0x10 /* 1 = enable update-ended interrupt */ 78#define RTCSB_AINTR 0x20 /* 1 = enable alarm interrupt */ 79#define RTCSB_PINTR 0x40 /* 1 = enable periodic clock interrupt */ 80#define RTCSB_HALT 0x80 /* stop clock updates */ 81 82#define RTC_INTR 0x0c /* status register C (R) interrupt source */ 83#define RTCIR_UPDATE 0x10 /* update intr */ 84#define RTCIR_ALARM 0x20 /* alarm intr */ 85#define RTCIR_PERIOD 0x40 /* periodic intr */ 86#define RTCIR_INT 0x80 /* interrupt output signal */ 87 88#define RTC_STATUSD 0x0d /* status register D (R) Lost Power */ 89#define RTCSD_PWR 0x80 /* clock power OK */ 90 91#define RTC_DIAG 0x0e /* status register E - bios diagnostic */ 92#define RTCDG_BITS "\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time" 93 94#define RTC_RESET 0x0f /* status register F - reset code byte */ 95#define RTCRS_RST 0x00 /* normal reset */ 96#define RTCRS_LOAD 0x04 /* load system */ 97 98#define RTC_FDISKETTE 0x10 /* diskette drive type in upper/lower nibble */ 99#define RTCFDT_NONE 0 /* none present */ 100#define RTCFDT_360K 0x10 /* 360K */ 101#define RTCFDT_12M 0x20 /* 1.2M */ 102#define RTCFDT_720K 0x30 /* 720K */ 103#define RTCFDT_144M 0x40 /* 1.44M */ 104#define RTCFDT_288M_1 0x50 /* 2.88M, some BIOSes */ 105#define RTCFDT_288M 0x60 /* 2.88M */ 106 107#define RTC_BASELO 0x15 /* low byte of basemem size */ 108#define RTC_BASEHI 0x16 /* high byte of basemem size */ 109#define RTC_EXTLO 0x17 /* low byte of extended mem size */ 110#define RTC_EXTHI 0x18 /* low byte of extended mem size */ 111 112#define RTC_CENTURY 0x32 /* current century */ 113#endif /* _I386_ISA_RTC_H_ */ 114