10SN/A/*- 20SN/A * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. 30SN/A * 40SN/A * Redistribution and use in source and binary forms, with or without 50SN/A * modification, are permitted provided that the following conditions 62362SN/A * are met: 70SN/A * 1. Redistributions of source code must retain the above copyright 82362SN/A * notice, this list of conditions and the following disclaimer. 90SN/A * 2. Redistributions in binary form must reproduce the above copyright 100SN/A * notice, this list of conditions and the following disclaimer in the 110SN/A * documentation and/or other materials provided with the distribution. 120SN/A * 130SN/A * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 140SN/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 150SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 160SN/A * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 170SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 180SN/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 190SN/A * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 202362SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 212362SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 222362SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 230SN/A * SUCH DAMAGE. 240SN/A * 250SN/A * $FreeBSD: releng/11.0/sys/i386/include/timerreg.h 177642 2008-03-26 20:09:21Z phk $ 260SN/A */ 270SN/A 280SN/A/* 290SN/A * The outputs of the three timers are connected as follows: 300SN/A * 310SN/A * timer 0 -> irq 0 320SN/A * timer 1 -> dma chan 0 (for dram refresh) 333984SN/A * timer 2 -> speaker (via keyboard controller) 340SN/A * 350SN/A * Timer 0 is used to call hardclock. 360SN/A * Timer 2 is used to generate console beeps. 370SN/A */ 380SN/A 390SN/A#ifndef _MACHINE_TIMERREG_H_ 400SN/A#define _MACHINE_TIMERREG_H_ 4112876Sdl 4212876Sdl#ifdef _KERNEL 430SN/A 440SN/A#include <dev/ic/i8253reg.h> 450SN/A 4612876Sdl#define IO_TIMER1 0x40 /* 8253 Timer #1 */ 4712876Sdl#define TIMER_CNTR0 (IO_TIMER1 + TIMER_REG_CNTR0) 480SN/A#define TIMER_CNTR1 (IO_TIMER1 + TIMER_REG_CNTR1) 490SN/A#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2) 500SN/A#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE) 5112876Sdl 520SN/A#endif /* _KERNEL */ 530SN/A 540SN/A#endif /* _MACHINE_TIMERREG_H_ */ 5512876Sdl