intr_machdep.h revision 163219
1168404Spjd/*- 2168404Spjd * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3168404Spjd * All rights reserved. 4168404Spjd * 5168404Spjd * Redistribution and use in source and binary forms, with or without 6168404Spjd * modification, are permitted provided that the following conditions 7168404Spjd * are met: 8168404Spjd * 1. Redistributions of source code must retain the above copyright 9168404Spjd * notice, this list of conditions and the following disclaimer. 10168404Spjd * 2. Redistributions in binary form must reproduce the above copyright 11168404Spjd * notice, this list of conditions and the following disclaimer in the 12168404Spjd * documentation and/or other materials provided with the distribution. 13168404Spjd * 14168404Spjd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15168404Spjd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16168404Spjd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17168404Spjd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18168404Spjd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19168404Spjd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20168404Spjd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21168404Spjd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22168404Spjd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23168404Spjd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24168404Spjd * SUCH DAMAGE. 25168404Spjd * 26168404Spjd * $FreeBSD: head/sys/i386/include/intr_machdep.h 163219 2006-10-10 23:23:12Z jhb $ 27168404Spjd */ 28168404Spjd 29168404Spjd#ifndef __MACHINE_INTR_MACHDEP_H__ 30168404Spjd#define __MACHINE_INTR_MACHDEP_H__ 31168404Spjd 32168404Spjd#ifdef _KERNEL 33168404Spjd 34168404Spjd/* 35168404Spjd * The maximum number of I/O interrupts we allow. This number is rather 36168404Spjd * arbitrary as it is just the maximum IRQ resource value. The interrupt 37168404Spjd * source for a given IRQ maps that I/O interrupt to device interrupt 38168404Spjd * source whether it be a pin on an interrupt controller or an MSI interrupt. 39168404Spjd * The 16 ISA IRQs are assigned fixed IDT vectors, but all other device 40168404Spjd * interrupts allocate IDT vectors on demand. Currently we have 191 IDT 41168404Spjd * vectors available for device interrupts. On many systems with I/O APICs, 42168404Spjd * a lot of the IRQs are not used, so this number can be much larger than 43168404Spjd * 191 and still be safe since only interrupt sources in actual use will 44168404Spjd * allocate IDT vectors. 45168404Spjd * 46168404Spjd * For now we stick with 255 as ISA IRQs and PCI intline IRQs only allow 47168404Spjd * for IRQs in the range 0 - 254. When MSI support is added this number 48168404Spjd * will likely increase. 49168404Spjd */ 50168404Spjd#define NUM_IO_INTS 255 51168404Spjd 52168404Spjd/* 53168404Spjd * - 1 ??? dummy counter. 54168404Spjd * - 2 counters for each I/O interrupt. 55168404Spjd * - 1 counter for each CPU for lapic timer. 56168404Spjd * - 7 counters for each CPU for IPI counters for SMP. 57168404Spjd */ 58168404Spjd#ifdef SMP 59168404Spjd#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + (1 + 7) * MAXCPU) 60168404Spjd#else 61168404Spjd#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + 1) 62168404Spjd#endif 63168404Spjd 64168404Spjd#ifndef LOCORE 65168404Spjd 66168404Spjdtypedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss); 67168404Spjd 68168404Spjd#define IDTVEC(name) __CONCAT(X,name) 69168404Spjd 70168404Spjdstruct intsrc; 71168404Spjd 72168404Spjd/* 73168404Spjd * Methods that a PIC provides to mask/unmask a given interrupt source, 74168404Spjd * "turn on" the interrupt on the CPU side by setting up an IDT entry, and 75168404Spjd * return the vector associated with this source. 76168404Spjd */ 77168404Spjdstruct pic { 78168404Spjd void (*pic_enable_source)(struct intsrc *); 79168404Spjd void (*pic_disable_source)(struct intsrc *, int); 80168404Spjd void (*pic_eoi_source)(struct intsrc *); 81168404Spjd void (*pic_enable_intr)(struct intsrc *); 82168404Spjd int (*pic_vector)(struct intsrc *); 83168404Spjd int (*pic_source_pending)(struct intsrc *); 84168404Spjd void (*pic_suspend)(struct pic *); 85168404Spjd void (*pic_resume)(struct pic *); 86168404Spjd int (*pic_config_intr)(struct intsrc *, enum intr_trigger, 87168404Spjd enum intr_polarity); 88168404Spjd void (*pic_assign_cpu)(struct intsrc *, u_int apic_id); 89168404Spjd STAILQ_ENTRY(pic) pics; 90168404Spjd}; 91168404Spjd 92168404Spjd/* Flags for pic_disable_source() */ 93168404Spjdenum { 94168404Spjd PIC_EOI, 95168404Spjd PIC_NO_EOI, 96168404Spjd}; 97168404Spjd 98168404Spjd/* 99168404Spjd * An interrupt source. The upper-layer code uses the PIC methods to 100168404Spjd * control a given source. The lower-layer PIC drivers can store additional 101168404Spjd * private data in a given interrupt source such as an interrupt pin number 102168404Spjd * or an I/O APIC pointer. 103168404Spjd */ 104168404Spjdstruct intsrc { 105168404Spjd struct pic *is_pic; 106168404Spjd struct intr_event *is_event; 107168404Spjd u_long *is_count; 108168404Spjd u_long *is_straycount; 109168404Spjd u_int is_index; 110168404Spjd u_int is_enabled:1; 111168404Spjd}; 112168404Spjd 113168404Spjdstruct trapframe; 114168404Spjd 115168404Spjdextern struct mtx icu_lock; 116168404Spjdextern int elcr_found; 117168404Spjd 118168404Spjd/* XXX: The elcr_* prototypes probably belong somewhere else. */ 119168404Spjdint elcr_probe(void); 120168404Spjdenum intr_trigger elcr_read_trigger(u_int irq); 121168404Spjdvoid elcr_resume(void); 122168404Spjdvoid elcr_write_trigger(u_int irq, enum intr_trigger trigger); 123168404Spjd#ifdef SMP 124168404Spjdvoid intr_add_cpu(u_int apic_id); 125168404Spjd#else 126168404Spjd#define intr_add_cpu(apic_id) 127168404Spjd#endif 128168404Spjdint intr_add_handler(const char *name, int vector, driver_intr_t handler, 129168404Spjd void *arg, enum intr_type flags, void **cookiep); 130168404Spjdint intr_config_intr(int vector, enum intr_trigger trig, 131168404Spjd enum intr_polarity pol); 132168404Spjdvoid intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame); 133168404Spjdstruct intsrc *intr_lookup_source(int vector); 134168404Spjdint intr_register_pic(struct pic *pic); 135168404Spjdint intr_register_source(struct intsrc *isrc); 136168404Spjdint intr_remove_handler(void *cookie); 137168404Spjdvoid intr_resume(void); 138168404Spjdvoid intr_suspend(void); 139168404Spjdvoid intrcnt_add(const char *name, u_long **countp); 140168404Spjd 141168404Spjd#endif /* !LOCORE */ 142168404Spjd#endif /* _KERNEL */ 143168404Spjd#endif /* !__MACHINE_INTR_MACHDEP_H__ */ 144168404Spjd