cpufunc.h revision 88118
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/i386/include/cpufunc.h 88118 2001-12-18 08:54:39Z jhb $
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 */
39
40#ifndef _MACHINE_CPUFUNC_H_
41#define	_MACHINE_CPUFUNC_H_
42
43#include <sys/cdefs.h>
44#include <machine/psl.h>
45
46__BEGIN_DECLS
47#define readb(va)	(*(volatile u_int8_t *) (va))
48#define readw(va)	(*(volatile u_int16_t *) (va))
49#define readl(va)	(*(volatile u_int32_t *) (va))
50
51#define writeb(va, d)	(*(volatile u_int8_t *) (va) = (d))
52#define writew(va, d)	(*(volatile u_int16_t *) (va) = (d))
53#define writel(va, d)	(*(volatile u_int32_t *) (va) = (d))
54
55#define	CRITICAL_FORK	(read_eflags() | PSL_I)
56
57#ifdef	__GNUC__
58
59#ifdef SWTCH_OPTIM_STATS
60extern	int	tlb_flush_count;	/* XXX */
61#endif
62
63static __inline void
64breakpoint(void)
65{
66	__asm __volatile("int $3");
67}
68
69static __inline u_int
70bsfl(u_int mask)
71{
72	u_int	result;
73
74	__asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
75	return (result);
76}
77
78static __inline u_int
79bsrl(u_int mask)
80{
81	u_int	result;
82
83	__asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
84	return (result);
85}
86
87static __inline void
88disable_intr(void)
89{
90	__asm __volatile("cli" : : : "memory");
91}
92
93static __inline void
94enable_intr(void)
95{
96	__asm __volatile("sti");
97}
98
99#define	HAVE_INLINE_FFS
100
101static __inline int
102ffs(int mask)
103{
104	/*
105	 * Note that gcc-2's builtin ffs would be used if we didn't declare
106	 * this inline or turn off the builtin.  The builtin is faster but
107	 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
108	 * versions.
109	 */
110	 return (mask == 0 ? mask : bsfl((u_int)mask) + 1);
111}
112
113#define	HAVE_INLINE_FLS
114
115static __inline int
116fls(int mask)
117{
118	return (mask == 0 ? mask : bsrl((u_int)mask) + 1);
119}
120
121#if __GNUC__ < 2
122
123#define	inb(port)		inbv(port)
124#define	outb(port, data)	outbv(port, data)
125
126#else /* __GNUC >= 2 */
127
128/*
129 * The following complications are to get around gcc not having a
130 * constraint letter for the range 0..255.  We still put "d" in the
131 * constraint because "i" isn't a valid constraint when the port
132 * isn't constant.  This only matters for -O0 because otherwise
133 * the non-working version gets optimized away.
134 *
135 * Use an expression-statement instead of a conditional expression
136 * because gcc-2.6.0 would promote the operands of the conditional
137 * and produce poor code for "if ((inb(var) & const1) == const2)".
138 *
139 * The unnecessary test `(port) < 0x10000' is to generate a warning if
140 * the `port' has type u_short or smaller.  Such types are pessimal.
141 * This actually only works for signed types.  The range check is
142 * careful to avoid generating warnings.
143 */
144#define	inb(port) __extension__ ({					\
145	u_char	_data;							\
146	if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100	\
147	    && (port) < 0x10000)					\
148		_data = inbc(port);					\
149	else								\
150		_data = inbv(port);					\
151	_data; })
152
153#define	outb(port, data) (						\
154	__builtin_constant_p(port) && ((port) & 0xffff) < 0x100		\
155	&& (port) < 0x10000						\
156	? outbc(port, data) : outbv(port, data))
157
158static __inline u_char
159inbc(u_int port)
160{
161	u_char	data;
162
163	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
164	return (data);
165}
166
167static __inline void
168outbc(u_int port, u_char data)
169{
170	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
171}
172
173#endif /* __GNUC <= 2 */
174
175static __inline u_char
176inbv(u_int port)
177{
178	u_char	data;
179	/*
180	 * We use %%dx and not %1 here because i/o is done at %dx and not at
181	 * %edx, while gcc generates inferior code (movw instead of movl)
182	 * if we tell it to load (u_short) port.
183	 */
184	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
185	return (data);
186}
187
188static __inline u_int
189inl(u_int port)
190{
191	u_int	data;
192
193	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
194	return (data);
195}
196
197static __inline void
198insb(u_int port, void *addr, size_t cnt)
199{
200	__asm __volatile("cld; rep; insb"
201			 : "+D" (addr), "+c" (cnt)
202			 : "d" (port)
203			 : "memory");
204}
205
206static __inline void
207insw(u_int port, void *addr, size_t cnt)
208{
209	__asm __volatile("cld; rep; insw"
210			 : "+D" (addr), "+c" (cnt)
211			 : "d" (port)
212			 : "memory");
213}
214
215static __inline void
216insl(u_int port, void *addr, size_t cnt)
217{
218	__asm __volatile("cld; rep; insl"
219			 : "+D" (addr), "+c" (cnt)
220			 : "d" (port)
221			 : "memory");
222}
223
224static __inline void
225invd(void)
226{
227	__asm __volatile("invd");
228}
229
230#if defined(SMP) && defined(_KERNEL)
231
232/*
233 * When using APIC IPI's, invlpg() is not simply the invlpg instruction
234 * (this is a bug) and the inlining cost is prohibitive since the call
235 * executes into the IPI transmission system.
236 */
237void	invlpg		__P((u_int addr));
238void	invltlb		__P((void));
239
240static __inline void
241cpu_invlpg(void *addr)
242{
243	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
244}
245
246static __inline void
247cpu_invltlb(void)
248{
249	u_int	temp;
250	/*
251	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
252	 * is inlined.
253	 */
254	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
255			 : : "memory");
256#if defined(SWTCH_OPTIM_STATS)
257	++tlb_flush_count;
258#endif
259}
260
261#else /* !(SMP && _KERNEL) */
262
263static __inline void
264invlpg(u_int addr)
265{
266	__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
267}
268
269static __inline void
270invltlb(void)
271{
272	u_int	temp;
273	/*
274	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
275	 * is inlined.
276	 */
277	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
278			 : : "memory");
279#ifdef SWTCH_OPTIM_STATS
280	++tlb_flush_count;
281#endif
282}
283
284#endif /* SMP && _KERNEL */
285
286static __inline u_short
287inw(u_int port)
288{
289	u_short	data;
290
291	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
292	return (data);
293}
294
295static __inline void
296outbv(u_int port, u_char data)
297{
298	u_char	al;
299	/*
300	 * Use an unnecessary assignment to help gcc's register allocator.
301	 * This make a large difference for gcc-1.40 and a tiny difference
302	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
303	 * best results.  gcc-2.6.0 can't handle this.
304	 */
305	al = data;
306	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
307}
308
309static __inline void
310outl(u_int port, u_int data)
311{
312	/*
313	 * outl() and outw() aren't used much so we haven't looked at
314	 * possible micro-optimizations such as the unnecessary
315	 * assignment for them.
316	 */
317	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
318}
319
320static __inline void
321outsb(u_int port, const void *addr, size_t cnt)
322{
323	__asm __volatile("cld; rep; outsb"
324			 : "+S" (addr), "+c" (cnt)
325			 : "d" (port));
326}
327
328static __inline void
329outsw(u_int port, const void *addr, size_t cnt)
330{
331	__asm __volatile("cld; rep; outsw"
332			 : "+S" (addr), "+c" (cnt)
333			 : "d" (port));
334}
335
336static __inline void
337outsl(u_int port, const void *addr, size_t cnt)
338{
339	__asm __volatile("cld; rep; outsl"
340			 : "+S" (addr), "+c" (cnt)
341			 : "d" (port));
342}
343
344static __inline void
345outw(u_int port, u_short data)
346{
347	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
348}
349
350static __inline u_int
351rcr2(void)
352{
353	u_int	data;
354
355	__asm __volatile("movl %%cr2,%0" : "=r" (data));
356	return (data);
357}
358
359static __inline u_int
360read_eflags(void)
361{
362	u_int	ef;
363
364	__asm __volatile("pushfl; popl %0" : "=r" (ef));
365	return (ef);
366}
367
368static __inline u_int64_t
369rdmsr(u_int msr)
370{
371	u_int64_t rv;
372
373	__asm __volatile("rdmsr" : "=A" (rv) : "c" (msr));
374	return (rv);
375}
376
377static __inline u_int64_t
378rdpmc(u_int pmc)
379{
380	u_int64_t rv;
381
382	__asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc));
383	return (rv);
384}
385
386static __inline u_int64_t
387rdtsc(void)
388{
389	u_int64_t rv;
390
391	__asm __volatile("rdtsc" : "=A" (rv));
392	return (rv);
393}
394
395static __inline void
396wbinvd(void)
397{
398	__asm __volatile("wbinvd");
399}
400
401static __inline void
402write_eflags(u_int ef)
403{
404	__asm __volatile("pushl %0; popfl" : : "r" (ef));
405}
406
407static __inline void
408wrmsr(u_int msr, u_int64_t newval)
409{
410	__asm __volatile("wrmsr" : : "A" (newval), "c" (msr));
411}
412
413static __inline u_int
414rfs(void)
415{
416	u_int sel;
417	__asm __volatile("movl %%fs,%0" : "=rm" (sel));
418	return (sel);
419}
420
421static __inline u_int
422rgs(void)
423{
424	u_int sel;
425	__asm __volatile("movl %%gs,%0" : "=rm" (sel));
426	return (sel);
427}
428
429static __inline void
430load_fs(u_int sel)
431{
432	__asm __volatile("movl %0,%%fs" : : "rm" (sel));
433}
434
435static __inline void
436load_gs(u_int sel)
437{
438	__asm __volatile("movl %0,%%gs" : : "rm" (sel));
439}
440
441static __inline u_int
442rdr0(void)
443{
444	u_int	data;
445	__asm __volatile("movl %%dr0,%0" : "=r" (data));
446	return (data);
447}
448
449static __inline void
450load_dr0(u_int sel)
451{
452	__asm __volatile("movl %0,%%dr0" : : "r" (sel));
453}
454
455static __inline u_int
456rdr1(void)
457{
458	u_int	data;
459	__asm __volatile("movl %%dr1,%0" : "=r" (data));
460	return (data);
461}
462
463static __inline void
464load_dr1(u_int sel)
465{
466	__asm __volatile("movl %0,%%dr1" : : "r" (sel));
467}
468
469static __inline u_int
470rdr2(void)
471{
472	u_int	data;
473	__asm __volatile("movl %%dr2,%0" : "=r" (data));
474	return (data);
475}
476
477static __inline void
478load_dr2(u_int sel)
479{
480	__asm __volatile("movl %0,%%dr2" : : "r" (sel));
481}
482
483static __inline u_int
484rdr3(void)
485{
486	u_int	data;
487	__asm __volatile("movl %%dr3,%0" : "=r" (data));
488	return (data);
489}
490
491static __inline void
492load_dr3(u_int sel)
493{
494	__asm __volatile("movl %0,%%dr3" : : "r" (sel));
495}
496
497static __inline u_int
498rdr4(void)
499{
500	u_int	data;
501	__asm __volatile("movl %%dr4,%0" : "=r" (data));
502	return (data);
503}
504
505static __inline void
506load_dr4(u_int sel)
507{
508	__asm __volatile("movl %0,%%dr4" : : "r" (sel));
509}
510
511static __inline u_int
512rdr5(void)
513{
514	u_int	data;
515	__asm __volatile("movl %%dr5,%0" : "=r" (data));
516	return (data);
517}
518
519static __inline void
520load_dr5(u_int sel)
521{
522	__asm __volatile("movl %0,%%dr5" : : "r" (sel));
523}
524
525static __inline u_int
526rdr6(void)
527{
528	u_int	data;
529	__asm __volatile("movl %%dr6,%0" : "=r" (data));
530	return (data);
531}
532
533static __inline void
534load_dr6(u_int sel)
535{
536	__asm __volatile("movl %0,%%dr6" : : "r" (sel));
537}
538
539static __inline u_int
540rdr7(void)
541{
542	u_int	data;
543	__asm __volatile("movl %%dr7,%0" : "=r" (data));
544	return (data);
545}
546
547static __inline void
548load_dr7(u_int sel)
549{
550	__asm __volatile("movl %0,%%dr7" : : "r" (sel));
551}
552
553static __inline critical_t
554cpu_critical_enter(void)
555{
556	critical_t eflags;
557
558	eflags = read_eflags();
559	disable_intr();
560	return (eflags);
561}
562
563static __inline void
564cpu_critical_exit(critical_t eflags)
565{
566	write_eflags(eflags);
567}
568
569#else /* !__GNUC__ */
570
571int	breakpoint	__P((void));
572u_int	bsfl		__P((u_int mask));
573u_int	bsrl		__P((u_int mask));
574void	disable_intr	__P((void));
575void	enable_intr	__P((void));
576u_char	inb		__P((u_int port));
577u_int	inl		__P((u_int port));
578void	insb		__P((u_int port, void *addr, size_t cnt));
579void	insl		__P((u_int port, void *addr, size_t cnt));
580void	insw		__P((u_int port, void *addr, size_t cnt));
581void	invd		__P((void));
582void	invlpg		__P((u_int addr));
583void	invltlb		__P((void));
584u_short	inw		__P((u_int port));
585void	outb		__P((u_int port, u_char data));
586void	outl		__P((u_int port, u_int data));
587void	outsb		__P((u_int port, void *addr, size_t cnt));
588void	outsl		__P((u_int port, void *addr, size_t cnt));
589void	outsw		__P((u_int port, void *addr, size_t cnt));
590void	outw		__P((u_int port, u_short data));
591u_int	rcr2		__P((void));
592u_int64_t rdmsr		__P((u_int msr));
593u_int64_t rdpmc		__P((u_int pmc));
594u_int64_t rdtsc		__P((void));
595u_int	read_eflags	__P((void));
596void	wbinvd		__P((void));
597void	write_eflags	__P((u_int ef));
598void	wrmsr		__P((u_int msr, u_int64_t newval));
599u_int	rfs		__P((void));
600u_int	rgs		__P((void));
601void	load_fs		__P((u_int sel));
602void	load_gs		__P((u_int sel));
603critical_t cpu_critical_enter __P((void));
604void	cpu_critical_exit __P((critical_t eflags));
605
606#endif	/* __GNUC__ */
607
608void	load_cr0	__P((u_int cr0));
609void	load_cr3	__P((u_int cr3));
610void	load_cr4	__P((u_int cr4));
611void	ltr		__P((u_short sel));
612u_int	rcr0		__P((void));
613u_int	rcr3		__P((void));
614u_int	rcr4		__P((void));
615void    reset_dbregs    __P((void));
616__END_DECLS
617
618#endif /* !_MACHINE_CPUFUNC_H_ */
619