exception.s revision 90515
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/i386/i386/exception.s 90515 2002-02-11 03:41:59Z bde $
34 */
35
36#include "opt_npx.h"
37
38#include <machine/asmacros.h>
39#include <sys/mutex.h>
40#include <machine/psl.h>
41#include <machine/trap.h>
42#ifdef SMP
43#include <machine/smptests.h>		/** various SMP options */
44#endif
45
46#include "assym.s"
47
48#define	SEL_RPL_MASK	0x0003
49
50	.text
51
52/*****************************************************************************/
53/* Trap handling                                                             */
54/*****************************************************************************/
55/*
56 * Trap and fault vector routines.
57 *
58 * Most traps are 'trap gates', SDT_SYS386TGT.  A trap gate pushes state on
59 * the stack that mostly looks like an interrupt, but does not disable
60 * interrupts.  A few of the traps we are use are interrupt gates,
61 * SDT_SYS386IGT, which are nearly the same thing except interrupts are
62 * disabled on entry.
63 *
64 * The cpu will push a certain amount of state onto the kernel stack for
65 * the current process.  The amount of state depends on the type of trap
66 * and whether the trap crossed rings or not.  See i386/include/frame.h.
67 * At the very least the current EFLAGS (status register, which includes
68 * the interrupt disable state prior to the trap), the code segment register,
69 * and the return instruction pointer are pushed by the cpu.  The cpu
70 * will also push an 'error' code for certain traps.  We push a dummy
71 * error code for those traps where the cpu doesn't in order to maintain
72 * a consistent frame.  We also push a contrived 'trap number'.
73 *
74 * The cpu does not push the general registers, we must do that, and we
75 * must restore them prior to calling 'iret'.  The cpu adjusts the %cs and
76 * %ss segment registers, but does not mess with %ds, %es, or %fs.  Thus we
77 * must load them with appropriate values for supervisor mode operation.
78 */
79#define	IDTVEC(name)	ALIGN_TEXT; .globl __CONCAT(X,name); \
80			.type __CONCAT(X,name),@function; __CONCAT(X,name):
81#define	TRAP(a)		pushl $(a) ; jmp alltraps
82
83#ifdef BDE_DEBUGGER
84#define	BDBTRAP(name) \
85	ss ; \
86	cmpb	$0,_bdb_exists ; \
87	je	1f ; \
88	testb	$SEL_RPL_MASK,4(%esp) ; \
89	jne	1f ; \
90	ss ; \
91	.globl	__CONCAT(__CONCAT(bdb_,name),_ljmp); \
92__CONCAT(__CONCAT(bdb_,name),_ljmp): \
93	ljmp	$0,$0 ; \
941:
95#else
96#define BDBTRAP(name)
97#endif
98
99MCOUNT_LABEL(user)
100MCOUNT_LABEL(btrap)
101
102IDTVEC(div)
103	pushl $0; TRAP(T_DIVIDE)
104IDTVEC(dbg)
105	BDBTRAP(dbg)
106	pushl $0; TRAP(T_TRCTRAP)
107IDTVEC(nmi)
108	pushl $0; TRAP(T_NMI)
109IDTVEC(bpt)
110	BDBTRAP(bpt)
111	pushl $0; TRAP(T_BPTFLT)
112IDTVEC(ofl)
113	pushl $0; TRAP(T_OFLOW)
114IDTVEC(bnd)
115	pushl $0; TRAP(T_BOUND)
116IDTVEC(ill)
117	pushl $0; TRAP(T_PRIVINFLT)
118IDTVEC(dna)
119	pushl $0; TRAP(T_DNA)
120IDTVEC(fpusegm)
121	pushl $0; TRAP(T_FPOPFLT)
122IDTVEC(tss)
123	TRAP(T_TSSFLT)
124IDTVEC(missing)
125	TRAP(T_SEGNPFLT)
126IDTVEC(stk)
127	TRAP(T_STKFLT)
128IDTVEC(prot)
129	TRAP(T_PROTFLT)
130IDTVEC(page)
131	TRAP(T_PAGEFLT)
132IDTVEC(mchk)
133	pushl $0; TRAP(T_MCHK)
134IDTVEC(rsvd)
135	pushl $0; TRAP(T_RESERVED)
136IDTVEC(fpu)
137	pushl $0; TRAP(T_ARITHTRAP)
138IDTVEC(align)
139	TRAP(T_ALIGNFLT)
140
141IDTVEC(xmm)
142	pushl $0; TRAP(T_XMMFLT)
143
144	/*
145	 * alltraps entry point.  Interrupts are enabled if this was a trap
146	 * gate (TGT), else disabled if this was an interrupt gate (IGT).
147	 * Note that int0x80_syscall is a trap gate.  Only page faults
148	 * use an interrupt gate.
149	 */
150
151	SUPERALIGN_TEXT
152	.globl	alltraps
153	.type	alltraps,@function
154alltraps:
155	pushal
156	pushl	%ds
157	pushl	%es
158	pushl	%fs
159alltraps_with_regs_pushed:
160	mov	$KDSEL,%ax
161	mov	%ax,%ds
162	mov	%ax,%es
163	mov	$KPSEL,%ax
164	mov	%ax,%fs
165	FAKE_MCOUNT(13*4(%esp))
166calltrap:
167	FAKE_MCOUNT(btrap)		/* init "from" btrap -> calltrap */
168	call	trap
169
170	/*
171	 * Return via doreti to handle ASTs.
172	 */
173	MEXITCOUNT
174	jmp	doreti
175
176/*
177 * SYSCALL CALL GATE (old entry point for a.out binaries)
178 *
179 * The intersegment call has been set up to specify one dummy parameter.
180 *
181 * This leaves a place to put eflags so that the call frame can be
182 * converted to a trap frame. Note that the eflags is (semi-)bogusly
183 * pushed into (what will be) tf_err and then copied later into the
184 * final spot. It has to be done this way because esp can't be just
185 * temporarily altered for the pushfl - an interrupt might come in
186 * and clobber the saved cs/eip.
187 */
188	SUPERALIGN_TEXT
189IDTVEC(lcall_syscall)
190	pushfl				/* save eflags */
191	popl	8(%esp)			/* shuffle into tf_eflags */
192	pushl	$7			/* sizeof "lcall 7,0" */
193	jmp	syscall_with_err_pushed
194
195/*
196 * Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
197 *
198 * Even though the name says 'int0x80', this is actually a TGT (trap gate)
199 * rather then an IGT (interrupt gate).  Thus interrupts are enabled on
200 * entry just as they are for a normal syscall.
201 */
202	SUPERALIGN_TEXT
203IDTVEC(int0x80_syscall)
204	pushl	$2			/* sizeof "int 0x80" */
205syscall_with_err_pushed:
206	subl	$4,%esp			/* skip over tf_trapno */
207	pushal
208	pushl	%ds
209	pushl	%es
210	pushl	%fs
211	mov	$KDSEL,%ax		/* switch to kernel segments */
212	mov	%ax,%ds
213	mov	%ax,%es
214	mov	$KPSEL,%ax
215	mov	%ax,%fs
216	FAKE_MCOUNT(13*4(%esp))
217	call	syscall
218	MEXITCOUNT
219	jmp	doreti
220
221ENTRY(fork_trampoline)
222	pushl	%esp			/* trapframe pointer */
223	pushl	%ebx			/* arg1 */
224	pushl	%esi			/* function */
225	call	fork_exit
226	addl	$12,%esp
227	/* cut from syscall */
228
229	/*
230	 * Return via doreti to handle ASTs.
231	 */
232	MEXITCOUNT
233	jmp	doreti
234
235
236/*
237 * Include vm86 call routines, which want to call doreti.
238 */
239#include "i386/i386/vm86bios.s"
240
241/*
242 * Include what was once config+isa-dependent code.
243 * XXX it should be in a stand-alone file.  It's still icu-dependent and
244 * belongs in i386/isa.
245 */
246#include "i386/isa/vector.s"
247
248/*
249 * Include what was once icu-dependent code.
250 * XXX it should be merged into this file (also move the definition of
251 * imen to vector.s or isa.c).
252 * Before including it, set up a normal asm environment so that vector.s
253 * doesn't have to know that stuff is included after it.
254 */
255	.data
256	ALIGN_DATA
257	.text
258	SUPERALIGN_TEXT
259#include "i386/isa/ipl.s"
260