1262569Simp/*
2262569Simp * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3262569Simp *
4262569Simp * This software is licensed under the terms of the GNU General Public
5262569Simp * License version 2, as published by the Free Software Foundation, and
6262569Simp * may be copied, distributed, and modified under those terms.
7262569Simp *
8262569Simp * This program is distributed in the hope that it will be useful,
9262569Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of
10262569Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11262569Simp * GNU General Public License for more details.
12262569Simp */
13262569Simp
14262569Simp#ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
15262569Simp#define _DT_BINDINGS_RESET_MSM_GCC_8660_H
16262569Simp
17262569Simp#define AFAB_CORE_RESET					0
18262569Simp#define SCSS_SYS_RESET					1
19262569Simp#define SCSS_SYS_POR_RESET				2
20262569Simp#define AFAB_SMPSS_S_RESET				3
21262569Simp#define AFAB_SMPSS_M1_RESET				4
22262569Simp#define AFAB_SMPSS_M0_RESET				5
23262569Simp#define AFAB_EBI1_S_RESET				6
24262569Simp#define SFAB_CORE_RESET					7
25262569Simp#define SFAB_ADM0_M0_RESET				8
26262569Simp#define SFAB_ADM0_M1_RESET				9
27262569Simp#define SFAB_ADM0_M2_RESET				10
28262569Simp#define ADM0_C2_RESET					11
29262569Simp#define ADM0_C1_RESET					12
30262569Simp#define ADM0_C0_RESET					13
31262569Simp#define ADM0_PBUS_RESET					14
32262569Simp#define ADM0_RESET					15
33262569Simp#define SFAB_ADM1_M0_RESET				16
34262569Simp#define SFAB_ADM1_M1_RESET				17
35262569Simp#define SFAB_ADM1_M2_RESET				18
36262569Simp#define MMFAB_ADM1_M3_RESET				19
37262569Simp#define ADM1_C3_RESET					20
38262569Simp#define ADM1_C2_RESET					21
39262569Simp#define ADM1_C1_RESET					22
40262569Simp#define ADM1_C0_RESET					23
41262569Simp#define ADM1_PBUS_RESET					24
42262569Simp#define ADM1_RESET					25
43262569Simp#define IMEM0_RESET					26
44262569Simp#define SFAB_LPASS_Q6_RESET				27
45262569Simp#define SFAB_AFAB_M_RESET				28
46262569Simp#define AFAB_SFAB_M0_RESET				29
47262569Simp#define AFAB_SFAB_M1_RESET				30
48262569Simp#define DFAB_CORE_RESET					31
49262569Simp#define SFAB_DFAB_M_RESET				32
50262569Simp#define DFAB_SFAB_M_RESET				33
51262569Simp#define DFAB_SWAY0_RESET				34
52262569Simp#define DFAB_SWAY1_RESET				35
53262569Simp#define DFAB_ARB0_RESET					36
54262569Simp#define DFAB_ARB1_RESET					37
55262569Simp#define PPSS_PROC_RESET					38
56262569Simp#define PPSS_RESET					39
57262569Simp#define PMEM_RESET					40
58262569Simp#define DMA_BAM_RESET					41
59262569Simp#define SIC_RESET					42
60262569Simp#define SPS_TIC_RESET					43
61262569Simp#define CFBP0_RESET					44
62262569Simp#define CFBP1_RESET					45
63262569Simp#define CFBP2_RESET					46
64262569Simp#define EBI2_RESET					47
65262569Simp#define SFAB_CFPB_M_RESET				48
66262569Simp#define CFPB_MASTER_RESET				49
67262569Simp#define SFAB_CFPB_S_RESET				50
68262569Simp#define CFPB_SPLITTER_RESET				51
69262569Simp#define TSIF_RESET					52
70262569Simp#define CE1_RESET					53
71262569Simp#define CE2_RESET					54
72262569Simp#define SFAB_SFPB_M_RESET				55
73262569Simp#define SFAB_SFPB_S_RESET				56
74262569Simp#define RPM_PROC_RESET					57
75262569Simp#define RPM_BUS_RESET					58
76262569Simp#define RPM_MSG_RAM_RESET				59
77262569Simp#define PMIC_ARB0_RESET					60
78262569Simp#define PMIC_ARB1_RESET					61
79262569Simp#define PMIC_SSBI2_RESET				62
80262569Simp#define SDC1_RESET					63
81262569Simp#define SDC2_RESET					64
82262569Simp#define SDC3_RESET					65
83262569Simp#define SDC4_RESET					66
84262569Simp#define SDC5_RESET					67
85262569Simp#define USB_HS1_RESET					68
86262569Simp#define USB_HS2_XCVR_RESET				69
87262569Simp#define USB_HS2_RESET					70
88262569Simp#define USB_FS1_XCVR_RESET				71
89262569Simp#define USB_FS1_RESET					72
90262569Simp#define USB_FS2_XCVR_RESET				73
91262569Simp#define USB_FS2_RESET					74
92262569Simp#define GSBI1_RESET					75
93262569Simp#define GSBI2_RESET					76
94262569Simp#define GSBI3_RESET					77
95262569Simp#define GSBI4_RESET					78
96262569Simp#define GSBI5_RESET					79
97262569Simp#define GSBI6_RESET					80
98262569Simp#define GSBI7_RESET					81
99262569Simp#define GSBI8_RESET					82
100262569Simp#define GSBI9_RESET					83
101262569Simp#define GSBI10_RESET					84
102262569Simp#define GSBI11_RESET					85
103262569Simp#define GSBI12_RESET					86
104262569Simp#define SPDM_RESET					87
105262569Simp#define SEC_CTRL_RESET					88
106262569Simp#define TLMM_H_RESET					89
107262569Simp#define TLMM_RESET					90
108262569Simp#define MARRM_PWRON_RESET				91
109262569Simp#define MARM_RESET					92
110262569Simp#define MAHB1_RESET					93
111262569Simp#define SFAB_MSS_S_RESET				94
112262569Simp#define MAHB2_RESET					95
113262569Simp#define MODEM_SW_AHB_RESET				96
114262569Simp#define MODEM_RESET					97
115262569Simp#define SFAB_MSS_MDM1_RESET				98
116262569Simp#define SFAB_MSS_MDM0_RESET				99
117262569Simp#define MSS_SLP_RESET					100
118262569Simp#define MSS_MARM_SAW_RESET				101
119262569Simp#define MSS_WDOG_RESET					102
120262569Simp#define TSSC_RESET					103
121262569Simp#define PDM_RESET					104
122262569Simp#define SCSS_CORE0_RESET				105
123262569Simp#define SCSS_CORE0_POR_RESET				106
124262569Simp#define SCSS_CORE1_RESET				107
125262569Simp#define SCSS_CORE1_POR_RESET				108
126262569Simp#define MPM_RESET					109
127262569Simp#define EBI1_1X_DIV_RESET				110
128262569Simp#define EBI1_RESET					111
129262569Simp#define SFAB_SMPSS_S_RESET				112
130262569Simp#define USB_PHY0_RESET					113
131262569Simp#define USB_PHY1_RESET					114
132262569Simp#define PRNG_RESET					115
133262569Simp
134262569Simp#endif
135